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root/cebix/BasiliskII/src/include/serial.h
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Comparing BasiliskII/src/include/serial.h (file contents):
Revision 1.3 by cebix, 2000-04-10T18:53:36Z vs.
Revision 1.11 by gbeauche, 2008-01-01T09:40:35Z

# Line 1 | Line 1
1   /*
2   *  serial.h - Serial device driver
3   *
4 < *  Basilisk II (C) 1997-2000 Christian Bauer
4 > *  Basilisk II (C) 1997-2008 Christian Bauer
5   *
6   *  This program is free software; you can redistribute it and/or modify
7   *  it under the terms of the GNU General Public License as published by
# Line 29 | Line 29
29   *    3 - .BOut
30   */
31  
32 + #ifdef POWERPC_ROM
33 + extern int16 SerialOpen(uint32 pb, uint32 dce);
34 + extern int16 SerialPrimeIn(uint32 pb, uint32 dce);
35 + extern int16 SerialPrimeOut(uint32 pb, uint32 dce);
36 + extern int16 SerialControl(uint32 pb, uint32 dce);
37 + extern int16 SerialStatus(uint32 pb, uint32 dce);
38 + extern int16 SerialClose(uint32 pb, uint32 dce);
39 + extern int16 SerialNothing(uint32 pb, uint32 dce);
40 + #else
41   extern int16 SerialOpen(uint32 pb, uint32 dce, int port);
42   extern int16 SerialPrime(uint32 pb, uint32 dce, int port);
43   extern int16 SerialControl(uint32 pb, uint32 dce, int port);
44   extern int16 SerialStatus(uint32 pb, uint32 dce, int port);
45   extern int16 SerialClose(uint32 pb, uint32 dce, int port);
46 + #endif
47  
48   extern void SerialInterrupt(void);
49  
# Line 59 | Line 69 | public:
69                  input_dt = output_dt = 0;
70          }
71  
72 +        virtual ~SERDPort() {}
73 +
74          virtual int16 open(uint16 config) = 0;
75          virtual int16 prime_in(uint32 pb, uint32 dce) = 0;
76          virtual int16 prime_out(uint32 pb, uint32 dce) = 0;
# Line 76 | Line 88 | public:
88          bool write_pending;     // Write operation pending
89          bool write_done;        // Write operation complete
90          uint32 output_dt;       // Mac address of Deferred Task for writing
91 +
92 + #ifdef POWERPC_ROM
93 +        uint32 dt_store;
94 + #endif
95   };
96  
97   extern SERDPort *the_serd_port[2];

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