src/Windows/sysdeps.h

/*
 *  sysdeps.h - System dependent definitions for Windows
 *
 *  Basilisk II (C) 1997-2005 Christian Bauer
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
 *  the Free Software Foundation; either version 2 of the License, or
 *  (at your option) any later version.
 *
 *  This program is distributed in the hope that it will be useful,
 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *  GNU General Public License for more details.
 *
 *  You should have received a copy of the GNU General Public License
 *  along with this program; if not, write to the Free Software
 *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 */

#ifndef SYSDEPS_H
#define SYSDEPS_H

#ifndef __STDC__
#error "Your compiler is not ANSI. Get a real one."
#endif

#include "config.h"
#include "user_strings_windows.h"

#ifndef STDC_HEADERS
#error "You don't have ANSI C header files."
#endif

#ifndef WIN32
#define WIN32
#endif

#include <assert.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <time.h>
#ifdef __WIN32__
#include <windows.h>
#endif
#include <sys/types.h>


/* Mac and host address space are distinct */
#ifndef REAL_ADDRESSING
#define REAL_ADDRESSING 0
#endif
#if REAL_ADDRESSING
#error "Real Addressing mode can't work without proper kernel support"
#endif

/* Using 68k emulator */
#define EMULATED_68K 1

/* The m68k emulator uses a prefetch buffer ? */
#define USE_PREFETCH_BUFFER 0

/* Mac ROM is write protected when banked memory is used */
#if REAL_ADDRESSING || DIRECT_ADDRESSING
# define ROM_IS_WRITE_PROTECTED 0
# define USE_SCRATCHMEM_SUBTERFUGE 1
#else
# define ROM_IS_WRITE_PROTECTED 1
#endif

/* Direct Addressing requires Video on SEGV signals in plain X11 mode */
#if DIRECT_ADDRESSING && (!ENABLE_VOSF && !USE_SDL_VIDEO)
# undef  ENABLE_VOSF
# define ENABLE_VOSF 1
#endif

/* ExtFS is supported */
#define SUPPORTS_EXTFS 1


/* Data types */
typedef unsigned char uint8;
typedef signed char int8;
#if SIZEOF_SHORT == 2
typedef unsigned short uint16;
typedef short int16;
#elif SIZEOF_INT == 2
typedef unsigned int uint16;
typedef int int16;
#else
#error "No 2 byte type, you lose."
#endif
#if SIZEOF_INT == 4
typedef unsigned int uint32;
typedef int int32;
#elif SIZEOF_LONG == 4
typedef unsigned long uint32;
typedef long int32;
#else
#error "No 4 byte type, you lose."
#endif
#if SIZEOF_LONG == 8
typedef unsigned long uint64;
typedef long int64;
#define VAL64(a) (a ## l)
#define UVAL64(a) (a ## ul)
#elif SIZEOF_LONG_LONG == 8
typedef unsigned long long uint64;
typedef long long int64;
#define VAL64(a) (a ## LL)
#define UVAL64(a) (a ## uLL)
#else
#error "No 8 byte type, you lose."
#endif
#if SIZEOF_VOID_P == 4
typedef uint32 uintptr;
typedef int32 intptr;
#elif SIZEOF_VOID_P == 8
typedef uint64 uintptr;
typedef int64 intptr;
#else
#error "Unsupported size of pointer"
#endif

#ifdef __WIN32__
typedef int64 loff_t;
#endif
#ifndef HAVE_CADDR_T
typedef char * caddr_t;
#endif

/* Time data type for Time Manager emulation */
typedef int64 tm_time_t;

/* Define codes for all the float formats that we know of.
 * Though we only handle IEEE format.  */
#define UNKNOWN_FLOAT_FORMAT 0
#define IEEE_FLOAT_FORMAT 1
#define VAX_FLOAT_FORMAT 2
#define IBM_FLOAT_FORMAT 3
#define C4X_FLOAT_FORMAT 4

/* UAE CPU data types */
#define uae_s8 int8
#define uae_u8 uint8
#define uae_s16 int16
#define uae_u16 uint16
#define uae_s32 int32
#define uae_u32 uint32
#define uae_s64 int64
#define uae_u64 uint64
typedef uae_u32 uaecptr;

/* Alignment restrictions */
#if defined(__i386__) || defined(__powerpc__) || defined(__m68k__) || defined(__x86_64__)
# define CPU_CAN_ACCESS_UNALIGNED
#endif

/* Timing functions */
extern void timer_init(void);
extern uint64 GetTicks_usec(void);
extern void Delay_usec(uint32 usec);

/* Spinlocks */
#ifdef __GNUC__

#if defined(__powerpc__) || defined(__ppc__)
#define HAVE_TEST_AND_SET 1
static inline int testandset(volatile int *p)
{
        int ret;
        __asm__ __volatile__("0:    lwarx       %0,0,%1\n"
                                                 "      xor.    %0,%3,%0\n"
                                                 "      bne             1f\n"
                                                 "      stwcx.  %2,0,%1\n"
                                                 "      bne-    0b\n"
                                                 "1:    "
                                                 : "=&r" (ret)
                                                 : "r" (p), "r" (1), "r" (0)
                                                 : "cr0", "memory");
        return ret;
}
#endif

#if defined(__i386__) || defined(__x86_64__)
#define HAVE_TEST_AND_SET 1
static inline int testandset(volatile int *p)
{
        long int ret;
        /* Note: the "xchg" instruction does not need a "lock" prefix */
        __asm__ __volatile__("xchgl %k0, %1"
                                                 : "=r" (ret), "=m" (*p)
                                                 : "0" (1), "m" (*p)
                                                 : "memory");
        return ret;
}
#endif

#ifdef __alpha__
#define HAVE_TEST_AND_SET 1
static inline int testandset(volatile int *p)
{
        int ret;
        unsigned long one;

        __asm__ __volatile__("0:        mov 1,%2\n"
                                                 "      ldl_l %0,%1\n"
                                                 "      stl_c %2,%1\n"
                                                 "      beq %2,1f\n"
                                                 ".subsection 2\n"
                                                 "1:    br 0b\n"
                                                 ".previous"
                                                 : "=r" (ret), "=m" (*p), "=r" (one)
                                                 : "m" (*p));
        return ret;
}
#endif

#endif /* __GNUC__ */

typedef volatile int spinlock_t;

static const spinlock_t SPIN_LOCK_UNLOCKED = 0;

#if HAVE_TEST_AND_SET
#define HAVE_SPINLOCKS 1
static inline void spin_lock(spinlock_t *lock)
{
        while (testandset(lock));
}

static inline void spin_unlock(spinlock_t *lock)
{
        *lock = 0;
}

static inline int spin_trylock(spinlock_t *lock)
{
        return !testandset(lock);
}
#else
static inline void spin_lock(spinlock_t *lock)
{
}

static inline void spin_unlock(spinlock_t *lock)
{
}

static inline int spin_trylock(spinlock_t *lock)
{
        return 1;
}
#endif

/* UAE CPU defines */
#ifdef WORDS_BIGENDIAN

#ifdef CPU_CAN_ACCESS_UNALIGNED

/* Big-endian CPUs which can do unaligned accesses */
static inline uae_u32 do_get_mem_long(uae_u32 *a) {return *a;}
static inline uae_u32 do_get_mem_word(uae_u16 *a) {return *a;}
static inline void do_put_mem_long(uae_u32 *a, uae_u32 v) {*a = v;}
static inline void do_put_mem_word(uae_u16 *a, uae_u32 v) {*a = v;}

#else /* CPU_CAN_ACCESS_UNALIGNED */

/* Big-endian CPUs which can not do unaligned accesses (this is not the most efficient way to do this...) */
static inline uae_u32 do_get_mem_long(uae_u32 *a) {uint8 *b = (uint8 *)a; return (b[0] << 24) | (b[1] << 16) | (b[2] << 8) | b[3];}
static inline uae_u32 do_get_mem_word(uae_u16 *a) {uint8 *b = (uint8 *)a; return (b[0] << 8) | b[1];}
static inline void do_put_mem_long(uae_u32 *a, uae_u32 v) {uint8 *b = (uint8 *)a; b[0] = v >> 24; b[1] = v >> 16; b[2] = v >> 8; b[3] = v;}
static inline void do_put_mem_word(uae_u16 *a, uae_u32 v) {uint8 *b = (uint8 *)a; b[0] = v >> 8; b[1] = v;}

#endif /* CPU_CAN_ACCESS_UNALIGNED */

#else /* WORDS_BIGENDIAN */

#if defined(__i386__) || defined(__x86_64__)

/* Intel x86 */
#define X86_PPRO_OPT
static inline uae_u32 do_get_mem_long(uae_u32 *a) {uint32 retval; __asm__ ("bswap %0" : "=r" (retval) : "0" (*a) : "cc"); return retval;}
#ifdef X86_PPRO_OPT
static inline uae_u32 do_get_mem_word(uae_u16 *a) {uint32 retval; __asm__ ("movzwl %w1,%k0\n\tshll $16,%k0\n\tbswapl %k0\n" : "=&r" (retval) : "m" (*a) : "cc"); return retval;}
#else
static inline uae_u32 do_get_mem_word(uae_u16 *a) {uint32 retval; __asm__ ("xorl %k0,%k0\n\tmovw %w1,%w0\n\trolw $8,%w0" : "=&r" (retval) : "m" (*a) : "cc"); return retval;}
#endif
#define HAVE_GET_WORD_UNSWAPPED
#define do_get_mem_word_unswapped(a) ((uae_u32)*((uae_u16 *)(a)))
static inline void do_put_mem_long(uae_u32 *a, uae_u32 v) {__asm__ ("bswap %0" : "=r" (v) : "0" (v) : "cc"); *a = v;}
#ifdef X86_PPRO_OPT
static inline void do_put_mem_word(uae_u16 *a, uae_u32 v) {__asm__ ("bswapl %0" : "=&r" (v) : "0" (v << 16) : "cc"); *a = v;}
#else
static inline void do_put_mem_word(uae_u16 *a, uae_u32 v) {__asm__ ("rolw $8,%0" : "=r" (v) : "0" (v) : "cc"); *a = v;}
#endif
#define HAVE_OPTIMIZED_BYTESWAP_32
/* bswap doesn't affect condition codes */
static inline uae_u32 do_byteswap_32_g(uae_u32 v) {__asm__ ("bswap %0" : "=r" (v) : "0" (v)); return v;}
#define HAVE_OPTIMIZED_BYTESWAP_16
#ifdef X86_PPRO_OPT
static inline uae_u32 do_byteswap_16_g(uae_u32 v) {__asm__ ("bswapl %0" : "=&r" (v) : "0" (v << 16) : "cc"); return v;}
#else
static inline uae_u32 do_byteswap_16_g(uae_u32 v) {__asm__ ("rolw $8,%0" : "=r" (v) : "0" (v) : "cc"); return v;}
#endif

#elif defined(CPU_CAN_ACCESS_UNALIGNED)

/* Other little-endian CPUs which can do unaligned accesses */
static inline uae_u32 do_get_mem_long(uae_u32 *a) {uint32 x = *a; return (x >> 24) | (x >> 8) & 0xff00 | (x << 8) & 0xff0000 | (x << 24);}
static inline uae_u32 do_get_mem_word(uae_u16 *a) {uint16 x = *a; return (x >> 8) | (x << 8);}
static inline void do_put_mem_long(uae_u32 *a, uae_u32 v) {*a = (v >> 24) | (v >> 8) & 0xff00 | (v << 8) & 0xff0000 | (v << 24);}
static inline void do_put_mem_word(uae_u16 *a, uae_u32 v) {*a = (v >> 8) | (v << 8);}

#else /* CPU_CAN_ACCESS_UNALIGNED */

/* Other little-endian CPUs which can not do unaligned accesses (this needs optimization) */
static inline uae_u32 do_get_mem_long(uae_u32 *a) {uint8 *b = (uint8 *)a; return (b[0] << 24) | (b[1] << 16) | (b[2] << 8) | b[3];}
static inline uae_u32 do_get_mem_word(uae_u16 *a) {uint8 *b = (uint8 *)a; return (b[0] << 8) | b[1];}
static inline void do_put_mem_long(uae_u32 *a, uae_u32 v) {uint8 *b = (uint8 *)a; b[0] = v >> 24; b[1] = v >> 16; b[2] = v >> 8; b[3] = v;}
static inline void do_put_mem_word(uae_u16 *a, uae_u32 v) {uint8 *b = (uint8 *)a; b[0] = v >> 8; b[1] = v;}

#endif /* CPU_CAN_ACCESS_UNALIGNED */

#endif /* WORDS_BIGENDIAN */

#ifndef HAVE_OPTIMIZED_BYTESWAP_32
static inline uae_u32 do_byteswap_32_g(uae_u32 v)
        { return (((v >> 24) & 0xff) | ((v >> 8) & 0xff00) | ((v & 0xff) << 24) | ((v & 0xff00) << 8)); }
#endif

#ifndef HAVE_OPTIMIZED_BYTESWAP_16
static inline uae_u32 do_byteswap_16_g(uae_u32 v)
        { return (((v >> 8) & 0xff) | ((v & 0xff) << 8)); }
#endif

#define do_byteswap_16_c(x) \
     ((((x) >> 8) & 0xff) | (((x) & 0xff) << 8))

#define do_byteswap_32_c(x) \
     ((((x) & 0xff000000) >> 24) | (((x) & 0x00ff0000) >>  8) | \
      (((x) & 0x0000ff00) <<  8) | (((x) & 0x000000ff) << 24))

#if defined(__GNUC__)
#define do_byteswap_16(x)                                               \
                (__extension__                                                  \
                 ({ register uint16 __v, __x = (x);             \
                 if (__builtin_constant_p(__x))                 \
                   __v = do_byteswap_16_c(__x);                 \
                 else                                                                   \
                   __v = do_byteswap_16_g(__x);                 \
                 __v; }))

#define do_byteswap_32(x)                                               \
                (__extension__                                                  \
                 ({ register uint32 __v, __x = (x);             \
                 if (__builtin_constant_p(__x))                 \
                   __v = do_byteswap_32_c(__x);                 \
                 else                                                                   \
                   __v = do_byteswap_32_g(__x);                 \
                 __v; }))
#else
#define do_byteswap_16(x) do_byteswap_16_g(x)
#define do_byteswap_32(x) do_byteswap_32_g(x)
#endif

/* Byte-swapping routines */
#if defined(__i386__) || defined(__x86_64__)
#define ntohl(x) do_byteswap_32(x)
#define ntohs(x) do_byteswap_16(x)
#define htonl(x) do_byteswap_32(x)
#define htons(x) do_byteswap_16(x)
#endif

#define do_get_mem_byte(a) ((uae_u32)*((uae_u8 *)(a)))
#define do_put_mem_byte(a, v) (*(uae_u8 *)(a) = (v))

#define call_mem_get_func(func, addr) ((*func)(addr))
#define call_mem_put_func(func, addr, v) ((*func)(addr, v))
#define __inline__ inline
#define CPU_EMU_SIZE 0
#undef NO_INLINE_MEMORY_ACCESS
#undef MD_HAVE_MEM_1_FUNCS
#define ENUMDECL typedef enum
#define ENUMNAME(name) name
#define write_log printf

#define ATTRIBUTE_PACKED __attribute__((packed))

#if defined(X86_ASSEMBLY) || defined(X86_64_ASSEMBLY)
#define ASM_SYM_FOR_FUNC(a) __asm__(a)
#else
#define ASM_SYM_FOR_FUNC(a)
#endif

#ifndef REGPARAM
# define REGPARAM
#endif
#define REGPARAM2

#endif
Revision:	1.1
Committed:	2005-03-17T00:24:25Z (19 years, 6 months ago) by gbeauche
Content type:	text/plain
Branch:	MAIN
CVS Tags:	nigel-build-17
Log Message:	Windows specific sysdeps.h
#	User	Rev	Content
1	gbeauche	1.1	/*
2			* sysdeps.h - System dependent definitions for Windows
3			*
4			* Basilisk II (C) 1997-2005 Christian Bauer
5			*
6			* This program is free software; you can redistribute it and/or modify
7			* it under the terms of the GNU General Public License as published by
8			* the Free Software Foundation; either version 2 of the License, or
9			* (at your option) any later version.
10			*
11			* This program is distributed in the hope that it will be useful,
12			* but WITHOUT ANY WARRANTY; without even the implied warranty of
13			* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14			* GNU General Public License for more details.
15			*
16			* You should have received a copy of the GNU General Public License
17			* along with this program; if not, write to the Free Software
18			* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19			*/
20
21			#ifndef SYSDEPS_H
22			#define SYSDEPS_H
23
24			#ifndef __STDC__
25			#error "Your compiler is not ANSI. Get a real one."
26			#endif
27
28			#include "config.h"
29			#include "user_strings_windows.h"
30
31			#ifndef STDC_HEADERS
32			#error "You don't have ANSI C header files."
33			#endif
34
35			#ifndef WIN32
36			#define WIN32
37			#endif
38
39			#include <assert.h>
40			#include <stdio.h>
41			#include <stdlib.h>
42			#include <string.h>
43			#include <time.h>
44			#ifdef __WIN32__
45			#include <windows.h>
46			#endif
47			#include <sys/types.h>
48
49
50			/* Mac and host address space are distinct */
51			#ifndef REAL_ADDRESSING
52			#define REAL_ADDRESSING 0
53			#endif
54			#if REAL_ADDRESSING
55			#error "Real Addressing mode can't work without proper kernel support"
56			#endif
57
58			/* Using 68k emulator */
59			#define EMULATED_68K 1
60
61			/* The m68k emulator uses a prefetch buffer ? */
62			#define USE_PREFETCH_BUFFER 0
63
64			/* Mac ROM is write protected when banked memory is used */
65			#if REAL_ADDRESSING \|\| DIRECT_ADDRESSING
66			# define ROM_IS_WRITE_PROTECTED 0
67			# define USE_SCRATCHMEM_SUBTERFUGE 1
68			#else
69			# define ROM_IS_WRITE_PROTECTED 1
70			#endif
71
72			/* Direct Addressing requires Video on SEGV signals in plain X11 mode */
73			#if DIRECT_ADDRESSING && (!ENABLE_VOSF && !USE_SDL_VIDEO)
74			# undef ENABLE_VOSF
75			# define ENABLE_VOSF 1
76			#endif
77
78			/* ExtFS is supported */
79			#define SUPPORTS_EXTFS 1
80
81
82			/* Data types */
83			typedef unsigned char uint8;
84			typedef signed char int8;
85			#if SIZEOF_SHORT == 2
86			typedef unsigned short uint16;
87			typedef short int16;
88			#elif SIZEOF_INT == 2
89			typedef unsigned int uint16;
90			typedef int int16;
91			#else
92			#error "No 2 byte type, you lose."
93			#endif
94			#if SIZEOF_INT == 4
95			typedef unsigned int uint32;
96			typedef int int32;
97			#elif SIZEOF_LONG == 4
98			typedef unsigned long uint32;
99			typedef long int32;
100			#else
101			#error "No 4 byte type, you lose."
102			#endif
103			#if SIZEOF_LONG == 8
104			typedef unsigned long uint64;
105			typedef long int64;
106			#define VAL64(a) (a ## l)
107			#define UVAL64(a) (a ## ul)
108			#elif SIZEOF_LONG_LONG == 8
109			typedef unsigned long long uint64;
110			typedef long long int64;
111			#define VAL64(a) (a ## LL)
112			#define UVAL64(a) (a ## uLL)
113			#else
114			#error "No 8 byte type, you lose."
115			#endif
116			#if SIZEOF_VOID_P == 4
117			typedef uint32 uintptr;
118			typedef int32 intptr;
119			#elif SIZEOF_VOID_P == 8
120			typedef uint64 uintptr;
121			typedef int64 intptr;
122			#else
123			#error "Unsupported size of pointer"
124			#endif
125
126			#ifdef __WIN32__
127			typedef int64 loff_t;
128			#endif
129			#ifndef HAVE_CADDR_T
130			typedef char * caddr_t;
131			#endif
132
133			/* Time data type for Time Manager emulation */
134			typedef int64 tm_time_t;
135
136			/* Define codes for all the float formats that we know of.
137			* Though we only handle IEEE format. */
138			#define UNKNOWN_FLOAT_FORMAT 0
139			#define IEEE_FLOAT_FORMAT 1
140			#define VAX_FLOAT_FORMAT 2
141			#define IBM_FLOAT_FORMAT 3
142			#define C4X_FLOAT_FORMAT 4
143
144			/* UAE CPU data types */
145			#define uae_s8 int8
146			#define uae_u8 uint8
147			#define uae_s16 int16
148			#define uae_u16 uint16
149			#define uae_s32 int32
150			#define uae_u32 uint32
151			#define uae_s64 int64
152			#define uae_u64 uint64
153			typedef uae_u32 uaecptr;
154
155			/* Alignment restrictions */
156			#if defined(__i386__) \|\| defined(__powerpc__) \|\| defined(__m68k__) \|\| defined(__x86_64__)
157			# define CPU_CAN_ACCESS_UNALIGNED
158			#endif
159
160			/* Timing functions */
161			extern void timer_init(void);
162			extern uint64 GetTicks_usec(void);
163			extern void Delay_usec(uint32 usec);
164
165			/* Spinlocks */
166			#ifdef __GNUC__
167
168			#if defined(__powerpc__) \|\| defined(__ppc__)
169			#define HAVE_TEST_AND_SET 1
170			static inline int testandset(volatile int *p)
171			{
172			int ret;
173			__asm__ __volatile__("0: lwarx %0,0,%1\n"
174			" xor. %0,%3,%0\n"
175			" bne 1f\n"
176			" stwcx. %2,0,%1\n"
177			" bne- 0b\n"
178			"1: "
179			: "=&r" (ret)
180			: "r" (p), "r" (1), "r" (0)
181			: "cr0", "memory");
182			return ret;
183			}
184			#endif
185
186			#if defined(__i386__) \|\| defined(__x86_64__)
187			#define HAVE_TEST_AND_SET 1
188			static inline int testandset(volatile int *p)
189			{
190			long int ret;
191			/* Note: the "xchg" instruction does not need a "lock" prefix */
192			__asm__ __volatile__("xchgl %k0, %1"
193			: "=r" (ret), "=m" (*p)
194			: "0" (1), "m" (*p)
195			: "memory");
196			return ret;
197			}
198			#endif
199
200			#ifdef __alpha__
201			#define HAVE_TEST_AND_SET 1
202			static inline int testandset(volatile int *p)
203			{
204			int ret;
205			unsigned long one;
206
207			__asm__ __volatile__("0: mov 1,%2\n"
208			" ldl_l %0,%1\n"
209			" stl_c %2,%1\n"
210			" beq %2,1f\n"
211			".subsection 2\n"
212			"1: br 0b\n"
213			".previous"
214			: "=r" (ret), "=m" (*p), "=r" (one)
215			: "m" (*p));
216			return ret;
217			}
218			#endif
219
220			#endif /* __GNUC__ */
221
222			typedef volatile int spinlock_t;
223
224			static const spinlock_t SPIN_LOCK_UNLOCKED = 0;
225
226			#if HAVE_TEST_AND_SET
227			#define HAVE_SPINLOCKS 1
228			static inline void spin_lock(spinlock_t *lock)
229			{
230			while (testandset(lock));
231			}
232
233			static inline void spin_unlock(spinlock_t *lock)
234			{
235			*lock = 0;
236			}
237
238			static inline int spin_trylock(spinlock_t *lock)
239			{
240			return !testandset(lock);
241			}
242			#else
243			static inline void spin_lock(spinlock_t *lock)
244			{
245			}
246
247			static inline void spin_unlock(spinlock_t *lock)
248			{
249			}
250
251			static inline int spin_trylock(spinlock_t *lock)
252			{
253			return 1;
254			}
255			#endif
256
257			/* UAE CPU defines */
258			#ifdef WORDS_BIGENDIAN
259
260			#ifdef CPU_CAN_ACCESS_UNALIGNED
261
262			/* Big-endian CPUs which can do unaligned accesses */
263			static inline uae_u32 do_get_mem_long(uae_u32 a) {return a;}
264			static inline uae_u32 do_get_mem_word(uae_u16 a) {return a;}
265			static inline void do_put_mem_long(uae_u32 a, uae_u32 v) {a = v;}
266			static inline void do_put_mem_word(uae_u16 a, uae_u32 v) {a = v;}
267
268			#else /* CPU_CAN_ACCESS_UNALIGNED */
269
270			/* Big-endian CPUs which can not do unaligned accesses (this is not the most efficient way to do this...) */
271			static inline uae_u32 do_get_mem_long(uae_u32 a) {uint8 b = (uint8 *)a; return (b[0] << 24) \| (b[1] << 16) \| (b[2] << 8) \| b[3];}
272			static inline uae_u32 do_get_mem_word(uae_u16 a) {uint8 b = (uint8 *)a; return (b[0] << 8) \| b[1];}
273			static inline void do_put_mem_long(uae_u32 a, uae_u32 v) {uint8 b = (uint8 *)a; b[0] = v >> 24; b[1] = v >> 16; b[2] = v >> 8; b[3] = v;}
274			static inline void do_put_mem_word(uae_u16 a, uae_u32 v) {uint8 b = (uint8 *)a; b[0] = v >> 8; b[1] = v;}
275
276			#endif /* CPU_CAN_ACCESS_UNALIGNED */
277
278			#else /* WORDS_BIGENDIAN */
279
280			#if defined(__i386__) \|\| defined(__x86_64__)
281
282			/* Intel x86 */
283			#define X86_PPRO_OPT
284			static inline uae_u32 do_get_mem_long(uae_u32 a) {uint32 retval; __asm__ ("bswap %0" : "=r" (retval) : "0" (a) : "cc"); return retval;}
285			#ifdef X86_PPRO_OPT
286			static inline uae_u32 do_get_mem_word(uae_u16 a) {uint32 retval; __asm__ ("movzwl %w1,%k0\n\tshll $16,%k0\n\tbswapl %k0\n" : "=&r" (retval) : "m" (a) : "cc"); return retval;}
287			#else
288			static inline uae_u32 do_get_mem_word(uae_u16 a) {uint32 retval; __asm__ ("xorl %k0,%k0\n\tmovw %w1,%w0\n\trolw $8,%w0" : "=&r" (retval) : "m" (a) : "cc"); return retval;}
289			#endif
290			#define HAVE_GET_WORD_UNSWAPPED
291			#define do_get_mem_word_unswapped(a) ((uae_u32)((uae_u16 )(a)))
292			static inline void do_put_mem_long(uae_u32 a, uae_u32 v) {__asm__ ("bswap %0" : "=r" (v) : "0" (v) : "cc"); a = v;}
293			#ifdef X86_PPRO_OPT
294			static inline void do_put_mem_word(uae_u16 a, uae_u32 v) {__asm__ ("bswapl %0" : "=&r" (v) : "0" (v << 16) : "cc"); a = v;}
295			#else
296			static inline void do_put_mem_word(uae_u16 a, uae_u32 v) {__asm__ ("rolw $8,%0" : "=r" (v) : "0" (v) : "cc"); a = v;}
297			#endif
298			#define HAVE_OPTIMIZED_BYTESWAP_32
299			/* bswap doesn't affect condition codes */
300			static inline uae_u32 do_byteswap_32_g(uae_u32 v) {__asm__ ("bswap %0" : "=r" (v) : "0" (v)); return v;}
301			#define HAVE_OPTIMIZED_BYTESWAP_16
302			#ifdef X86_PPRO_OPT
303			static inline uae_u32 do_byteswap_16_g(uae_u32 v) {__asm__ ("bswapl %0" : "=&r" (v) : "0" (v << 16) : "cc"); return v;}
304			#else
305			static inline uae_u32 do_byteswap_16_g(uae_u32 v) {__asm__ ("rolw $8,%0" : "=r" (v) : "0" (v) : "cc"); return v;}
306			#endif
307
308			#elif defined(CPU_CAN_ACCESS_UNALIGNED)
309
310			/* Other little-endian CPUs which can do unaligned accesses */
311			static inline uae_u32 do_get_mem_long(uae_u32 a) {uint32 x = a; return (x >> 24) \| (x >> 8) & 0xff00 \| (x << 8) & 0xff0000 \| (x << 24);}
312			static inline uae_u32 do_get_mem_word(uae_u16 a) {uint16 x = a; return (x >> 8) \| (x << 8);}
313			static inline void do_put_mem_long(uae_u32 a, uae_u32 v) {a = (v >> 24) \| (v >> 8) & 0xff00 \| (v << 8) & 0xff0000 \| (v << 24);}
314			static inline void do_put_mem_word(uae_u16 a, uae_u32 v) {a = (v >> 8) \| (v << 8);}
315
316			#else /* CPU_CAN_ACCESS_UNALIGNED */
317
318			/* Other little-endian CPUs which can not do unaligned accesses (this needs optimization) */
319			static inline uae_u32 do_get_mem_long(uae_u32 a) {uint8 b = (uint8 *)a; return (b[0] << 24) \| (b[1] << 16) \| (b[2] << 8) \| b[3];}
320			static inline uae_u32 do_get_mem_word(uae_u16 a) {uint8 b = (uint8 *)a; return (b[0] << 8) \| b[1];}
321			static inline void do_put_mem_long(uae_u32 a, uae_u32 v) {uint8 b = (uint8 *)a; b[0] = v >> 24; b[1] = v >> 16; b[2] = v >> 8; b[3] = v;}
322			static inline void do_put_mem_word(uae_u16 a, uae_u32 v) {uint8 b = (uint8 *)a; b[0] = v >> 8; b[1] = v;}
323
324			#endif /* CPU_CAN_ACCESS_UNALIGNED */
325
326			#endif /* WORDS_BIGENDIAN */
327
328			#ifndef HAVE_OPTIMIZED_BYTESWAP_32
329			static inline uae_u32 do_byteswap_32_g(uae_u32 v)
330			{ return (((v >> 24) & 0xff) \| ((v >> 8) & 0xff00) \| ((v & 0xff) << 24) \| ((v & 0xff00) << 8)); }
331			#endif
332
333			#ifndef HAVE_OPTIMIZED_BYTESWAP_16
334			static inline uae_u32 do_byteswap_16_g(uae_u32 v)
335			{ return (((v >> 8) & 0xff) \| ((v & 0xff) << 8)); }
336			#endif
337
338			#define do_byteswap_16_c(x) \
339			((((x) >> 8) & 0xff) \| (((x) & 0xff) << 8))
340
341			#define do_byteswap_32_c(x) \
342			((((x) & 0xff000000) >> 24) \| (((x) & 0x00ff0000) >> 8) \| \
343			(((x) & 0x0000ff00) << 8) \| (((x) & 0x000000ff) << 24))
344
345			#if defined(__GNUC__)
346			#define do_byteswap_16(x) \
347			(__extension__ \
348			({ register uint16 __v, __x = (x); \
349			if (__builtin_constant_p(__x)) \
350			__v = do_byteswap_16_c(__x); \
351			else \
352			__v = do_byteswap_16_g(__x); \
353			__v; }))
354
355			#define do_byteswap_32(x) \
356			(__extension__ \
357			({ register uint32 __v, __x = (x); \
358			if (__builtin_constant_p(__x)) \
359			__v = do_byteswap_32_c(__x); \
360			else \
361			__v = do_byteswap_32_g(__x); \
362			__v; }))
363			#else
364			#define do_byteswap_16(x) do_byteswap_16_g(x)
365			#define do_byteswap_32(x) do_byteswap_32_g(x)
366			#endif
367
368			/* Byte-swapping routines */
369			#if defined(__i386__) \|\| defined(__x86_64__)
370			#define ntohl(x) do_byteswap_32(x)
371			#define ntohs(x) do_byteswap_16(x)
372			#define htonl(x) do_byteswap_32(x)
373			#define htons(x) do_byteswap_16(x)
374			#endif
375
376			#define do_get_mem_byte(a) ((uae_u32)((uae_u8 )(a)))
377			#define do_put_mem_byte(a, v) ((uae_u8 )(a) = (v))
378
379			#define call_mem_get_func(func, addr) ((*func)(addr))
380			#define call_mem_put_func(func, addr, v) ((*func)(addr, v))
381			#define __inline__ inline
382			#define CPU_EMU_SIZE 0
383			#undef NO_INLINE_MEMORY_ACCESS
384			#undef MD_HAVE_MEM_1_FUNCS
385			#define ENUMDECL typedef enum
386			#define ENUMNAME(name) name
387			#define write_log printf
388
389			#define ATTRIBUTE_PACKED __attribute__((packed))
390
391			#if defined(X86_ASSEMBLY) \|\| defined(X86_64_ASSEMBLY)
392			#define ASM_SYM_FOR_FUNC(a) __asm__(a)
393			#else
394			#define ASM_SYM_FOR_FUNC(a)
395			#endif
396
397			#ifndef REGPARAM
398			# define REGPARAM
399			#endif
400			#define REGPARAM2
401
402			#endif