1 |
cebix |
1.1 |
/* |
2 |
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* sysdeps.h - System dependent definitions for Unix |
3 |
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* |
4 |
gbeauche |
1.34 |
* Basilisk II (C) 1997-2008 Christian Bauer |
5 |
cebix |
1.1 |
* |
6 |
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* This program is free software; you can redistribute it and/or modify |
7 |
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* it under the terms of the GNU General Public License as published by |
8 |
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* the Free Software Foundation; either version 2 of the License, or |
9 |
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* (at your option) any later version. |
10 |
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* |
11 |
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* This program is distributed in the hope that it will be useful, |
12 |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
13 |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
14 |
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* GNU General Public License for more details. |
15 |
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* |
16 |
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* You should have received a copy of the GNU General Public License |
17 |
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* along with this program; if not, write to the Free Software |
18 |
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
19 |
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*/ |
20 |
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21 |
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#ifndef SYSDEPS_H |
22 |
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#define SYSDEPS_H |
23 |
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24 |
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#ifndef __STDC__ |
25 |
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#error "Your compiler is not ANSI. Get a real one." |
26 |
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#endif |
27 |
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28 |
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#include "config.h" |
29 |
cebix |
1.3 |
#include "user_strings_unix.h" |
30 |
cebix |
1.1 |
|
31 |
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#ifndef STDC_HEADERS |
32 |
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#error "You don't have ANSI C header files." |
33 |
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#endif |
34 |
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35 |
cebix |
1.2 |
#ifdef HAVE_UNISTD_H |
36 |
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# include <sys/types.h> |
37 |
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# include <unistd.h> |
38 |
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#endif |
39 |
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40 |
cebix |
1.1 |
#include <netinet/in.h> |
41 |
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#include <assert.h> |
42 |
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#include <stdio.h> |
43 |
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#include <stdlib.h> |
44 |
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#include <string.h> |
45 |
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46 |
gbeauche |
1.24 |
#ifdef HAVE_PTHREADS |
47 |
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# include <pthread.h> |
48 |
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#endif |
49 |
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50 |
cebix |
1.1 |
#ifdef HAVE_FCNTL_H |
51 |
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# include <fcntl.h> |
52 |
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#endif |
53 |
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54 |
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#ifdef TIME_WITH_SYS_TIME |
55 |
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# include <sys/time.h> |
56 |
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# include <time.h> |
57 |
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#else |
58 |
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# ifdef HAVE_SYS_TIME_H |
59 |
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# include <sys/time.h> |
60 |
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# else |
61 |
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# include <time.h> |
62 |
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# endif |
63 |
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#endif |
64 |
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65 |
asvitkine |
1.35 |
#if defined(__MACH__) |
66 |
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#include <mach/clock.h> |
67 |
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#endif |
68 |
cebix |
1.1 |
|
69 |
cebix |
1.11 |
#ifdef ENABLE_NATIVE_M68K |
70 |
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71 |
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/* Mac and host address space are the same */ |
72 |
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#define REAL_ADDRESSING 1 |
73 |
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74 |
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/* Using 68k natively */ |
75 |
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#define EMULATED_68K 0 |
76 |
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77 |
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/* Mac ROM is not write protected */ |
78 |
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#define ROM_IS_WRITE_PROTECTED 0 |
79 |
cebix |
1.14 |
#define USE_SCRATCHMEM_SUBTERFUGE 1 |
80 |
cebix |
1.11 |
|
81 |
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#else |
82 |
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83 |
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/* Mac and host address space are distinct */ |
84 |
gbeauche |
1.13 |
#ifndef REAL_ADDRESSING |
85 |
cebix |
1.1 |
#define REAL_ADDRESSING 0 |
86 |
gbeauche |
1.13 |
#endif |
87 |
cebix |
1.1 |
|
88 |
cebix |
1.11 |
/* Using 68k emulator */ |
89 |
cebix |
1.1 |
#define EMULATED_68K 1 |
90 |
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91 |
gbeauche |
1.13 |
/* The m68k emulator uses a prefetch buffer ? */ |
92 |
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#define USE_PREFETCH_BUFFER 0 |
93 |
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94 |
cebix |
1.14 |
/* Mac ROM is write protected when banked memory is used */ |
95 |
gbeauche |
1.13 |
#if REAL_ADDRESSING || DIRECT_ADDRESSING |
96 |
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# define ROM_IS_WRITE_PROTECTED 0 |
97 |
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# define USE_SCRATCHMEM_SUBTERFUGE 1 |
98 |
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#else |
99 |
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# define ROM_IS_WRITE_PROTECTED 1 |
100 |
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#endif |
101 |
cebix |
1.1 |
|
102 |
cebix |
1.11 |
#endif |
103 |
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104 |
gbeauche |
1.30 |
/* Direct Addressing requires Video on SEGV signals in plain X11 mode */ |
105 |
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#if DIRECT_ADDRESSING && (!ENABLE_VOSF && !USE_SDL_VIDEO) |
106 |
gbeauche |
1.13 |
# undef ENABLE_VOSF |
107 |
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# define ENABLE_VOSF 1 |
108 |
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#endif |
109 |
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110 |
cebix |
1.6 |
/* ExtFS is supported */ |
111 |
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#define SUPPORTS_EXTFS 1 |
112 |
cebix |
1.11 |
|
113 |
cebix |
1.20 |
/* BSD socket API supported */ |
114 |
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#define SUPPORTS_UDP_TUNNEL 1 |
115 |
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116 |
gbeauche |
1.33 |
/* Use the CPU emulator to check for periodic tasks? */ |
117 |
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#ifdef HAVE_PTHREADS |
118 |
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#define USE_PTHREADS_SERVICES |
119 |
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#endif |
120 |
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#if EMULATED_68K |
121 |
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#if defined(__NetBSD__) |
122 |
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#define USE_CPU_EMUL_SERVICES |
123 |
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#endif |
124 |
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#endif |
125 |
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#ifdef USE_CPU_EMUL_SERVICES |
126 |
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#undef USE_PTHREADS_SERVICES |
127 |
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#endif |
128 |
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129 |
cebix |
1.6 |
|
130 |
cebix |
1.1 |
/* Data types */ |
131 |
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typedef unsigned char uint8; |
132 |
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typedef signed char int8; |
133 |
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#if SIZEOF_SHORT == 2 |
134 |
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typedef unsigned short uint16; |
135 |
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typedef short int16; |
136 |
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#elif SIZEOF_INT == 2 |
137 |
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typedef unsigned int uint16; |
138 |
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typedef int int16; |
139 |
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#else |
140 |
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#error "No 2 byte type, you lose." |
141 |
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#endif |
142 |
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#if SIZEOF_INT == 4 |
143 |
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typedef unsigned int uint32; |
144 |
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typedef int int32; |
145 |
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#elif SIZEOF_LONG == 4 |
146 |
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typedef unsigned long uint32; |
147 |
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typedef long int32; |
148 |
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#else |
149 |
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#error "No 4 byte type, you lose." |
150 |
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#endif |
151 |
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#if SIZEOF_LONG == 8 |
152 |
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typedef unsigned long uint64; |
153 |
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typedef long int64; |
154 |
cebix |
1.8 |
#define VAL64(a) (a ## l) |
155 |
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#define UVAL64(a) (a ## ul) |
156 |
cebix |
1.1 |
#elif SIZEOF_LONG_LONG == 8 |
157 |
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typedef unsigned long long uint64; |
158 |
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typedef long long int64; |
159 |
cebix |
1.8 |
#define VAL64(a) (a ## LL) |
160 |
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#define UVAL64(a) (a ## uLL) |
161 |
cebix |
1.1 |
#else |
162 |
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#error "No 8 byte type, you lose." |
163 |
gbeauche |
1.13 |
#endif |
164 |
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#if SIZEOF_VOID_P == 4 |
165 |
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typedef uint32 uintptr; |
166 |
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typedef int32 intptr; |
167 |
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#elif SIZEOF_VOID_P == 8 |
168 |
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typedef uint64 uintptr; |
169 |
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typedef int64 intptr; |
170 |
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#else |
171 |
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#error "Unsupported size of pointer" |
172 |
cebix |
1.1 |
#endif |
173 |
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174 |
nigel |
1.27 |
#ifndef HAVE_LOFF_T |
175 |
gbeauche |
1.28 |
typedef off_t loff_t; |
176 |
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#endif |
177 |
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#ifndef HAVE_CADDR_T |
178 |
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typedef char * caddr_t; |
179 |
nigel |
1.27 |
#endif |
180 |
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181 |
cebix |
1.1 |
/* Time data type for Time Manager emulation */ |
182 |
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#ifdef HAVE_CLOCK_GETTIME |
183 |
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typedef struct timespec tm_time_t; |
184 |
asvitkine |
1.35 |
#elif defined(__MACH__) |
185 |
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typedef mach_timespec_t tm_time_t; |
186 |
cebix |
1.1 |
#else |
187 |
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typedef struct timeval tm_time_t; |
188 |
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#endif |
189 |
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|
190 |
gbeauche |
1.23 |
/* Define codes for all the float formats that we know of. |
191 |
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* Though we only handle IEEE format. */ |
192 |
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#define UNKNOWN_FLOAT_FORMAT 0 |
193 |
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#define IEEE_FLOAT_FORMAT 1 |
194 |
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#define VAX_FLOAT_FORMAT 2 |
195 |
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#define IBM_FLOAT_FORMAT 3 |
196 |
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#define C4X_FLOAT_FORMAT 4 |
197 |
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|
198 |
cebix |
1.1 |
/* UAE CPU data types */ |
199 |
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#define uae_s8 int8 |
200 |
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#define uae_u8 uint8 |
201 |
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#define uae_s16 int16 |
202 |
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#define uae_u16 uint16 |
203 |
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#define uae_s32 int32 |
204 |
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#define uae_u32 uint32 |
205 |
cebix |
1.7 |
#define uae_s64 int64 |
206 |
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#define uae_u64 uint64 |
207 |
cebix |
1.1 |
typedef uae_u32 uaecptr; |
208 |
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209 |
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/* Alignment restrictions */ |
210 |
gbeauche |
1.25 |
#if defined(__i386__) || defined(__powerpc__) || defined(__m68k__) || defined(__x86_64__) |
211 |
cebix |
1.1 |
# define CPU_CAN_ACCESS_UNALIGNED |
212 |
|
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#endif |
213 |
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214 |
cebix |
1.12 |
/* Timing functions */ |
215 |
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extern uint64 GetTicks_usec(void); |
216 |
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extern void Delay_usec(uint32 usec); |
217 |
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218 |
gbeauche |
1.31 |
/* Spinlocks */ |
219 |
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#ifdef __GNUC__ |
220 |
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221 |
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#if defined(__powerpc__) || defined(__ppc__) |
222 |
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#define HAVE_TEST_AND_SET 1 |
223 |
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static inline int testandset(volatile int *p) |
224 |
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{ |
225 |
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int ret; |
226 |
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__asm__ __volatile__("0: lwarx %0,0,%1\n" |
227 |
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" xor. %0,%3,%0\n" |
228 |
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" bne 1f\n" |
229 |
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" stwcx. %2,0,%1\n" |
230 |
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" bne- 0b\n" |
231 |
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"1: " |
232 |
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: "=&r" (ret) |
233 |
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: "r" (p), "r" (1), "r" (0) |
234 |
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: "cr0", "memory"); |
235 |
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return ret; |
236 |
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} |
237 |
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#endif |
238 |
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239 |
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/* FIXME: SheepShaver occasionnally hangs with those locks */ |
240 |
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#if 0 && (defined(__i386__) || defined(__x86_64__)) |
241 |
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#define HAVE_TEST_AND_SET 1 |
242 |
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static inline int testandset(volatile int *p) |
243 |
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{ |
244 |
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long int ret; |
245 |
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/* Note: the "xchg" instruction does not need a "lock" prefix */ |
246 |
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__asm__ __volatile__("xchgl %k0, %1" |
247 |
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: "=r" (ret), "=m" (*p) |
248 |
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: "0" (1), "m" (*p) |
249 |
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: "memory"); |
250 |
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return ret; |
251 |
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} |
252 |
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#endif |
253 |
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254 |
|
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#ifdef __s390__ |
255 |
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#define HAVE_TEST_AND_SET 1 |
256 |
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static inline int testandset(volatile int *p) |
257 |
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{ |
258 |
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int ret; |
259 |
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260 |
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__asm__ __volatile__("0: cs %0,%1,0(%2)\n" |
261 |
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" jl 0b" |
262 |
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: "=&d" (ret) |
263 |
|
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: "r" (1), "a" (p), "0" (*p) |
264 |
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: "cc", "memory" ); |
265 |
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return ret; |
266 |
|
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} |
267 |
|
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#endif |
268 |
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269 |
|
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#ifdef __alpha__ |
270 |
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#define HAVE_TEST_AND_SET 1 |
271 |
|
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static inline int testandset(volatile int *p) |
272 |
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{ |
273 |
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int ret; |
274 |
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unsigned long one; |
275 |
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|
276 |
|
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__asm__ __volatile__("0: mov 1,%2\n" |
277 |
|
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" ldl_l %0,%1\n" |
278 |
|
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" stl_c %2,%1\n" |
279 |
|
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" beq %2,1f\n" |
280 |
|
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".subsection 2\n" |
281 |
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"1: br 0b\n" |
282 |
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".previous" |
283 |
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: "=r" (ret), "=m" (*p), "=r" (one) |
284 |
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: "m" (*p)); |
285 |
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return ret; |
286 |
|
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} |
287 |
|
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#endif |
288 |
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|
289 |
|
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#ifdef __sparc__ |
290 |
|
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#define HAVE_TEST_AND_SET 1 |
291 |
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static inline int testandset(volatile int *p) |
292 |
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{ |
293 |
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int ret; |
294 |
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|
295 |
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__asm__ __volatile__("ldstub [%1], %0" |
296 |
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: "=r" (ret) |
297 |
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: "r" (p) |
298 |
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: "memory"); |
299 |
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|
300 |
|
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return (ret ? 1 : 0); |
301 |
|
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} |
302 |
|
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#endif |
303 |
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|
304 |
|
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#ifdef __arm__ |
305 |
|
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#define HAVE_TEST_AND_SET 1 |
306 |
|
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static inline int testandset(volatile int *p) |
307 |
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{ |
308 |
|
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register unsigned int ret; |
309 |
|
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__asm__ __volatile__("swp %0, %1, [%2]" |
310 |
|
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: "=r"(ret) |
311 |
|
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: "0"(1), "r"(p)); |
312 |
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|
313 |
|
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return ret; |
314 |
|
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} |
315 |
|
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#endif |
316 |
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|
317 |
|
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#endif /* __GNUC__ */ |
318 |
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|
319 |
|
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typedef volatile int spinlock_t; |
320 |
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|
321 |
|
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static const spinlock_t SPIN_LOCK_UNLOCKED = 0; |
322 |
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323 |
|
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#if HAVE_TEST_AND_SET |
324 |
|
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#define HAVE_SPINLOCKS 1 |
325 |
|
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static inline void spin_lock(spinlock_t *lock) |
326 |
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{ |
327 |
|
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while (testandset(lock)); |
328 |
|
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} |
329 |
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|
330 |
|
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static inline void spin_unlock(spinlock_t *lock) |
331 |
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{ |
332 |
|
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*lock = 0; |
333 |
|
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} |
334 |
|
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|
335 |
|
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static inline int spin_trylock(spinlock_t *lock) |
336 |
|
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{ |
337 |
|
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return !testandset(lock); |
338 |
|
|
} |
339 |
|
|
#else |
340 |
|
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static inline void spin_lock(spinlock_t *lock) |
341 |
|
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{ |
342 |
|
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} |
343 |
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|
344 |
|
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static inline void spin_unlock(spinlock_t *lock) |
345 |
|
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{ |
346 |
|
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} |
347 |
|
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|
348 |
|
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static inline int spin_trylock(spinlock_t *lock) |
349 |
|
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{ |
350 |
|
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return 1; |
351 |
|
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} |
352 |
|
|
#endif |
353 |
|
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|
354 |
|
|
/* X11 display fast locks */ |
355 |
|
|
#ifdef HAVE_SPINLOCKS |
356 |
|
|
#define X11_LOCK_TYPE spinlock_t |
357 |
|
|
#define X11_LOCK_INIT SPIN_LOCK_UNLOCKED |
358 |
|
|
#define XDisplayLock() spin_lock(&x_display_lock) |
359 |
|
|
#define XDisplayUnlock() spin_unlock(&x_display_lock) |
360 |
|
|
#elif defined(HAVE_PTHREADS) |
361 |
|
|
#define X11_LOCK_TYPE pthread_mutex_t |
362 |
|
|
#define X11_LOCK_INIT PTHREAD_MUTEX_INITIALIZER |
363 |
|
|
#define XDisplayLock() pthread_mutex_lock(&x_display_lock); |
364 |
|
|
#define XDisplayUnlock() pthread_mutex_unlock(&x_display_lock); |
365 |
|
|
#else |
366 |
|
|
#define XDisplayLock() |
367 |
|
|
#define XDisplayUnlock() |
368 |
|
|
#endif |
369 |
|
|
#ifdef X11_LOCK_TYPE |
370 |
|
|
extern X11_LOCK_TYPE x_display_lock; |
371 |
|
|
#endif |
372 |
|
|
|
373 |
cebix |
1.22 |
#ifdef HAVE_PTHREADS |
374 |
|
|
/* Centralized pthread attribute setup */ |
375 |
|
|
void Set_pthread_attr(pthread_attr_t *attr, int priority); |
376 |
|
|
#endif |
377 |
|
|
|
378 |
cebix |
1.1 |
/* UAE CPU defines */ |
379 |
|
|
#ifdef WORDS_BIGENDIAN |
380 |
|
|
|
381 |
|
|
#ifdef CPU_CAN_ACCESS_UNALIGNED |
382 |
|
|
|
383 |
|
|
/* Big-endian CPUs which can do unaligned accesses */ |
384 |
|
|
static inline uae_u32 do_get_mem_long(uae_u32 *a) {return *a;} |
385 |
|
|
static inline uae_u32 do_get_mem_word(uae_u16 *a) {return *a;} |
386 |
|
|
static inline void do_put_mem_long(uae_u32 *a, uae_u32 v) {*a = v;} |
387 |
|
|
static inline void do_put_mem_word(uae_u16 *a, uae_u32 v) {*a = v;} |
388 |
|
|
|
389 |
|
|
#else /* CPU_CAN_ACCESS_UNALIGNED */ |
390 |
|
|
|
391 |
|
|
#ifdef sgi |
392 |
|
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/* The SGI MIPSPro compilers can do unaligned accesses given enough hints. |
393 |
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* They will automatically inline these routines. */ |
394 |
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#ifdef __cplusplus |
395 |
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extern "C" { /* only the C compiler does unaligned accesses */ |
396 |
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#endif |
397 |
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extern uae_u32 do_get_mem_long(uae_u32 *a); |
398 |
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extern uae_u32 do_get_mem_word(uae_u16 *a); |
399 |
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extern void do_put_mem_long(uae_u32 *a, uae_u32 v); |
400 |
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extern void do_put_mem_word(uae_u16 *a, uae_u32 v); |
401 |
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#ifdef __cplusplus |
402 |
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} |
403 |
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#endif |
404 |
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405 |
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#else /* sgi */ |
406 |
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407 |
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/* Big-endian CPUs which can not do unaligned accesses (this is not the most efficient way to do this...) */ |
408 |
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static inline uae_u32 do_get_mem_long(uae_u32 *a) {uint8 *b = (uint8 *)a; return (b[0] << 24) | (b[1] << 16) | (b[2] << 8) | b[3];} |
409 |
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static inline uae_u32 do_get_mem_word(uae_u16 *a) {uint8 *b = (uint8 *)a; return (b[0] << 8) | b[1];} |
410 |
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static inline void do_put_mem_long(uae_u32 *a, uae_u32 v) {uint8 *b = (uint8 *)a; b[0] = v >> 24; b[1] = v >> 16; b[2] = v >> 8; b[3] = v;} |
411 |
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static inline void do_put_mem_word(uae_u16 *a, uae_u32 v) {uint8 *b = (uint8 *)a; b[0] = v >> 8; b[1] = v;} |
412 |
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#endif /* sgi */ |
413 |
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414 |
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#endif /* CPU_CAN_ACCESS_UNALIGNED */ |
415 |
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416 |
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#else /* WORDS_BIGENDIAN */ |
417 |
|
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|
418 |
gbeauche |
1.25 |
#if defined(__i386__) || defined(__x86_64__) |
419 |
cebix |
1.1 |
|
420 |
|
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/* Intel x86 */ |
421 |
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#define X86_PPRO_OPT |
422 |
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static inline uae_u32 do_get_mem_long(uae_u32 *a) {uint32 retval; __asm__ ("bswap %0" : "=r" (retval) : "0" (*a) : "cc"); return retval;} |
423 |
|
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#ifdef X86_PPRO_OPT |
424 |
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static inline uae_u32 do_get_mem_word(uae_u16 *a) {uint32 retval; __asm__ ("movzwl %w1,%k0\n\tshll $16,%k0\n\tbswapl %k0\n" : "=&r" (retval) : "m" (*a) : "cc"); return retval;} |
425 |
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#else |
426 |
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static inline uae_u32 do_get_mem_word(uae_u16 *a) {uint32 retval; __asm__ ("xorl %k0,%k0\n\tmovw %w1,%w0\n\trolw $8,%w0" : "=&r" (retval) : "m" (*a) : "cc"); return retval;} |
427 |
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#endif |
428 |
|
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#define HAVE_GET_WORD_UNSWAPPED |
429 |
|
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#define do_get_mem_word_unswapped(a) ((uae_u32)*((uae_u16 *)(a))) |
430 |
|
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static inline void do_put_mem_long(uae_u32 *a, uae_u32 v) {__asm__ ("bswap %0" : "=r" (v) : "0" (v) : "cc"); *a = v;} |
431 |
|
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#ifdef X86_PPRO_OPT |
432 |
|
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static inline void do_put_mem_word(uae_u16 *a, uae_u32 v) {__asm__ ("bswapl %0" : "=&r" (v) : "0" (v << 16) : "cc"); *a = v;} |
433 |
|
|
#else |
434 |
|
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static inline void do_put_mem_word(uae_u16 *a, uae_u32 v) {__asm__ ("rolw $8,%0" : "=r" (v) : "0" (v) : "cc"); *a = v;} |
435 |
|
|
#endif |
436 |
gbeauche |
1.16 |
#define HAVE_OPTIMIZED_BYTESWAP_32 |
437 |
|
|
/* bswap doesn't affect condition codes */ |
438 |
|
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static inline uae_u32 do_byteswap_32(uae_u32 v) {__asm__ ("bswap %0" : "=r" (v) : "0" (v)); return v;} |
439 |
|
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#define HAVE_OPTIMIZED_BYTESWAP_16 |
440 |
|
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#ifdef X86_PPRO_OPT |
441 |
|
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static inline uae_u32 do_byteswap_16(uae_u32 v) {__asm__ ("bswapl %0" : "=&r" (v) : "0" (v << 16) : "cc"); return v;} |
442 |
|
|
#else |
443 |
|
|
static inline uae_u32 do_byteswap_16(uae_u32 v) {__asm__ ("rolw $8,%0" : "=r" (v) : "0" (v) : "cc"); return v;} |
444 |
|
|
#endif |
445 |
cebix |
1.1 |
|
446 |
|
|
#elif defined(CPU_CAN_ACCESS_UNALIGNED) |
447 |
|
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|
448 |
|
|
/* Other little-endian CPUs which can do unaligned accesses */ |
449 |
|
|
static inline uae_u32 do_get_mem_long(uae_u32 *a) {uint32 x = *a; return (x >> 24) | (x >> 8) & 0xff00 | (x << 8) & 0xff0000 | (x << 24);} |
450 |
|
|
static inline uae_u32 do_get_mem_word(uae_u16 *a) {uint16 x = *a; return (x >> 8) | (x << 8);} |
451 |
|
|
static inline void do_put_mem_long(uae_u32 *a, uae_u32 v) {*a = (v >> 24) | (v >> 8) & 0xff00 | (v << 8) & 0xff0000 | (v << 24);} |
452 |
|
|
static inline void do_put_mem_word(uae_u16 *a, uae_u32 v) {*a = (v >> 8) | (v << 8);} |
453 |
|
|
|
454 |
|
|
#else /* CPU_CAN_ACCESS_UNALIGNED */ |
455 |
|
|
|
456 |
|
|
/* Other little-endian CPUs which can not do unaligned accesses (this needs optimization) */ |
457 |
|
|
static inline uae_u32 do_get_mem_long(uae_u32 *a) {uint8 *b = (uint8 *)a; return (b[0] << 24) | (b[1] << 16) | (b[2] << 8) | b[3];} |
458 |
|
|
static inline uae_u32 do_get_mem_word(uae_u16 *a) {uint8 *b = (uint8 *)a; return (b[0] << 8) | b[1];} |
459 |
|
|
static inline void do_put_mem_long(uae_u32 *a, uae_u32 v) {uint8 *b = (uint8 *)a; b[0] = v >> 24; b[1] = v >> 16; b[2] = v >> 8; b[3] = v;} |
460 |
|
|
static inline void do_put_mem_word(uae_u16 *a, uae_u32 v) {uint8 *b = (uint8 *)a; b[0] = v >> 8; b[1] = v;} |
461 |
|
|
|
462 |
|
|
#endif /* CPU_CAN_ACCESS_UNALIGNED */ |
463 |
|
|
|
464 |
|
|
#endif /* WORDS_BIGENDIAN */ |
465 |
gbeauche |
1.16 |
|
466 |
|
|
#ifndef HAVE_OPTIMIZED_BYTESWAP_32 |
467 |
|
|
static inline uae_u32 do_byteswap_32(uae_u32 v) |
468 |
|
|
{ return (((v >> 24) & 0xff) | ((v >> 8) & 0xff00) | ((v & 0xff) << 24) | ((v & 0xff00) << 8)); } |
469 |
|
|
#endif |
470 |
|
|
|
471 |
|
|
#ifndef HAVE_OPTIMIZED_BYTESWAP_16 |
472 |
|
|
static inline uae_u32 do_byteswap_16(uae_u32 v) |
473 |
|
|
{ return (((v >> 8) & 0xff) | ((v & 0xff) << 8)); } |
474 |
|
|
#endif |
475 |
cebix |
1.1 |
|
476 |
|
|
#define do_get_mem_byte(a) ((uae_u32)*((uae_u8 *)(a))) |
477 |
|
|
#define do_put_mem_byte(a, v) (*(uae_u8 *)(a) = (v)) |
478 |
|
|
|
479 |
|
|
#define call_mem_get_func(func, addr) ((*func)(addr)) |
480 |
|
|
#define call_mem_put_func(func, addr, v) ((*func)(addr, v)) |
481 |
|
|
#define __inline__ inline |
482 |
|
|
#define CPU_EMU_SIZE 0 |
483 |
|
|
#undef NO_INLINE_MEMORY_ACCESS |
484 |
|
|
#undef MD_HAVE_MEM_1_FUNCS |
485 |
|
|
#define ENUMDECL typedef enum |
486 |
|
|
#define ENUMNAME(name) name |
487 |
|
|
#define write_log printf |
488 |
|
|
|
489 |
gbeauche |
1.26 |
#if defined(X86_ASSEMBLY) || defined(X86_64_ASSEMBLY) |
490 |
cebix |
1.1 |
#define ASM_SYM_FOR_FUNC(a) __asm__(a) |
491 |
|
|
#else |
492 |
|
|
#define ASM_SYM_FOR_FUNC(a) |
493 |
|
|
#endif |
494 |
|
|
|
495 |
|
|
#ifndef REGPARAM |
496 |
|
|
# define REGPARAM |
497 |
|
|
#endif |
498 |
|
|
#define REGPARAM2 |
499 |
|
|
|
500 |
|
|
#endif |