src/Unix/sysdeps.h

/*
 *  sysdeps.h - System dependent definitions for Unix
 *
 *  Basilisk II (C) 1997-2004 Christian Bauer
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
 *  the Free Software Foundation; either version 2 of the License, or
 *  (at your option) any later version.
 *
 *  This program is distributed in the hope that it will be useful,
 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *  GNU General Public License for more details.
 *
 *  You should have received a copy of the GNU General Public License
 *  along with this program; if not, write to the Free Software
 *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 */

#ifndef SYSDEPS_H
#define SYSDEPS_H

#ifndef __STDC__
#error "Your compiler is not ANSI. Get a real one."
#endif

#include "config.h"
#include "user_strings_unix.h"

#ifndef STDC_HEADERS
#error "You don't have ANSI C header files."
#endif

#ifdef HAVE_UNISTD_H
# include <sys/types.h>
# include <unistd.h>
#endif

#include <netinet/in.h>
#include <assert.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>

#ifdef HAVE_PTHREADS
# include <pthread.h>
#endif

#ifdef HAVE_FCNTL_H
# include <fcntl.h>
#endif

#ifdef TIME_WITH_SYS_TIME
# include <sys/time.h>
# include <time.h>
#else
# ifdef HAVE_SYS_TIME_H
#  include <sys/time.h>
# else
#  include <time.h>
# endif
#endif


#ifdef ENABLE_NATIVE_M68K

/* Mac and host address space are the same */
#define REAL_ADDRESSING 1

/* Using 68k natively */
#define EMULATED_68K 0

/* Mac ROM is not write protected */
#define ROM_IS_WRITE_PROTECTED 0
#define USE_SCRATCHMEM_SUBTERFUGE 1

#else

/* Mac and host address space are distinct */
#ifndef REAL_ADDRESSING
#define REAL_ADDRESSING 0
#endif

/* Using 68k emulator */
#define EMULATED_68K 1

/* The m68k emulator uses a prefetch buffer ? */
#define USE_PREFETCH_BUFFER 0

/* Mac ROM is write protected when banked memory is used */
#if REAL_ADDRESSING || DIRECT_ADDRESSING
# define ROM_IS_WRITE_PROTECTED 0
# define USE_SCRATCHMEM_SUBTERFUGE 1
#else
# define ROM_IS_WRITE_PROTECTED 1
#endif

#endif

/* Direct Addressing requires Video on SEGV signals in plain X11 mode */
#if DIRECT_ADDRESSING && (!ENABLE_VOSF && !USE_SDL_VIDEO)
# undef  ENABLE_VOSF
# define ENABLE_VOSF 1
#endif

/* ExtFS is supported */
#define SUPPORTS_EXTFS 1

/* BSD socket API supported */
#define SUPPORTS_UDP_TUNNEL 1


/* Data types */
typedef unsigned char uint8;
typedef signed char int8;
#if SIZEOF_SHORT == 2
typedef unsigned short uint16;
typedef short int16;
#elif SIZEOF_INT == 2
typedef unsigned int uint16;
typedef int int16;
#else
#error "No 2 byte type, you lose."
#endif
#if SIZEOF_INT == 4
typedef unsigned int uint32;
typedef int int32;
#elif SIZEOF_LONG == 4
typedef unsigned long uint32;
typedef long int32;
#else
#error "No 4 byte type, you lose."
#endif
#if SIZEOF_LONG == 8
typedef unsigned long uint64;
typedef long int64;
#define VAL64(a) (a ## l)
#define UVAL64(a) (a ## ul)
#elif SIZEOF_LONG_LONG == 8
typedef unsigned long long uint64;
typedef long long int64;
#define VAL64(a) (a ## LL)
#define UVAL64(a) (a ## uLL)
#else
#error "No 8 byte type, you lose."
#endif
#if SIZEOF_VOID_P == 4
typedef uint32 uintptr;
typedef int32 intptr;
#elif SIZEOF_VOID_P == 8
typedef uint64 uintptr;
typedef int64 intptr;
#else
#error "Unsupported size of pointer"
#endif

#ifndef HAVE_LOFF_T
typedef off_t loff_t;
#endif
#ifndef HAVE_CADDR_T
typedef char * caddr_t;
#endif

/* Time data type for Time Manager emulation */
#ifdef HAVE_CLOCK_GETTIME
typedef struct timespec tm_time_t;
#else
typedef struct timeval tm_time_t;
#endif

/* Define codes for all the float formats that we know of.
 * Though we only handle IEEE format.  */
#define UNKNOWN_FLOAT_FORMAT 0
#define IEEE_FLOAT_FORMAT 1
#define VAX_FLOAT_FORMAT 2
#define IBM_FLOAT_FORMAT 3
#define C4X_FLOAT_FORMAT 4

/* UAE CPU data types */
#define uae_s8 int8
#define uae_u8 uint8
#define uae_s16 int16
#define uae_u16 uint16
#define uae_s32 int32
#define uae_u32 uint32
#define uae_s64 int64
#define uae_u64 uint64
typedef uae_u32 uaecptr;

/* Alignment restrictions */
#if defined(__i386__) || defined(__powerpc__) || defined(__m68k__) || defined(__x86_64__)
# define CPU_CAN_ACCESS_UNALIGNED
#endif

/* Timing functions */
extern uint64 GetTicks_usec(void);
extern void Delay_usec(uint32 usec);

/* Spinlocks */
#ifdef __GNUC__

#if defined(__powerpc__) || defined(__ppc__)
#define HAVE_TEST_AND_SET 1
static inline int testandset(volatile int *p)
{
        int ret;
        __asm__ __volatile__("0:    lwarx       %0,0,%1\n"
                                                 "      xor.    %0,%3,%0\n"
                                                 "      bne             1f\n"
                                                 "      stwcx.  %2,0,%1\n"
                                                 "      bne-    0b\n"
                                                 "1:    "
                                                 : "=&r" (ret)
                                                 : "r" (p), "r" (1), "r" (0)
                                                 : "cr0", "memory");
        return ret;
}
#endif

/* FIXME: SheepShaver occasionnally hangs with those locks */
#if 0 && (defined(__i386__) || defined(__x86_64__))
#define HAVE_TEST_AND_SET 1
static inline int testandset(volatile int *p)
{
        long int ret;
        /* Note: the "xchg" instruction does not need a "lock" prefix */
        __asm__ __volatile__("xchgl %k0, %1"
                                                 : "=r" (ret), "=m" (*p)
                                                 : "0" (1), "m" (*p)
                                                 : "memory");
        return ret;
}
#endif

#ifdef __s390__
#define HAVE_TEST_AND_SET 1
static inline int testandset(volatile int *p)
{
        int ret;

        __asm__ __volatile__("0: cs    %0,%1,0(%2)\n"
                                                 "   jl    0b"
                                                 : "=&d" (ret)
                                                 : "r" (1), "a" (p), "0" (*p) 
                                                 : "cc", "memory" );
        return ret;
}
#endif

#ifdef __alpha__
#define HAVE_TEST_AND_SET 1
static inline int testandset(volatile int *p)
{
        int ret;
        unsigned long one;

        __asm__ __volatile__("0:        mov 1,%2\n"
                                                 "      ldl_l %0,%1\n"
                                                 "      stl_c %2,%1\n"
                                                 "      beq %2,1f\n"
                                                 ".subsection 2\n"
                                                 "1:    br 0b\n"
                                                 ".previous"
                                                 : "=r" (ret), "=m" (*p), "=r" (one)
                                                 : "m" (*p));
        return ret;
}
#endif

#ifdef __sparc__
#define HAVE_TEST_AND_SET 1
static inline int testandset(volatile int *p)
{
        int ret;

        __asm__ __volatile__("ldstub    [%1], %0"
                                                 : "=r" (ret)
                                                 : "r" (p)
                                                 : "memory");

        return (ret ? 1 : 0);
}
#endif

#ifdef __arm__
#define HAVE_TEST_AND_SET 1
static inline int testandset(volatile int *p)
{
        register unsigned int ret;
        __asm__ __volatile__("swp %0, %1, [%2]"
                                                 : "=r"(ret)
                                                 : "0"(1), "r"(p));
        
        return ret;
}
#endif

#endif /* __GNUC__ */

typedef volatile int spinlock_t;

static const spinlock_t SPIN_LOCK_UNLOCKED = 0;

#if HAVE_TEST_AND_SET
#define HAVE_SPINLOCKS 1
static inline void spin_lock(spinlock_t *lock)
{
        while (testandset(lock));
}

static inline void spin_unlock(spinlock_t *lock)
{
        *lock = 0;
}

static inline int spin_trylock(spinlock_t *lock)
{
        return !testandset(lock);
}
#else
static inline void spin_lock(spinlock_t *lock)
{
}

static inline void spin_unlock(spinlock_t *lock)
{
}

static inline int spin_trylock(spinlock_t *lock)
{
        return 1;
}
#endif

/* X11 display fast locks */
#ifdef HAVE_SPINLOCKS
#define X11_LOCK_TYPE spinlock_t
#define X11_LOCK_INIT SPIN_LOCK_UNLOCKED
#define XDisplayLock() spin_lock(&x_display_lock)
#define XDisplayUnlock() spin_unlock(&x_display_lock)
#elif defined(HAVE_PTHREADS)
#define X11_LOCK_TYPE pthread_mutex_t
#define X11_LOCK_INIT PTHREAD_MUTEX_INITIALIZER
#define XDisplayLock() pthread_mutex_lock(&x_display_lock);
#define XDisplayUnlock() pthread_mutex_unlock(&x_display_lock);
#else
#define XDisplayLock()
#define XDisplayUnlock()
#endif
#ifdef X11_LOCK_TYPE
extern X11_LOCK_TYPE x_display_lock;
#endif

#ifdef HAVE_PTHREADS
/* Centralized pthread attribute setup */
void Set_pthread_attr(pthread_attr_t *attr, int priority);
#endif

/* UAE CPU defines */
#ifdef WORDS_BIGENDIAN

#ifdef CPU_CAN_ACCESS_UNALIGNED

/* Big-endian CPUs which can do unaligned accesses */
static inline uae_u32 do_get_mem_long(uae_u32 *a) {return *a;}
static inline uae_u32 do_get_mem_word(uae_u16 *a) {return *a;}
static inline void do_put_mem_long(uae_u32 *a, uae_u32 v) {*a = v;}
static inline void do_put_mem_word(uae_u16 *a, uae_u32 v) {*a = v;}

#else /* CPU_CAN_ACCESS_UNALIGNED */

#ifdef sgi
/* The SGI MIPSPro compilers can do unaligned accesses given enough hints.
 * They will automatically inline these routines. */
#ifdef __cplusplus
extern "C" { /* only the C compiler does unaligned accesses */
#endif
extern uae_u32 do_get_mem_long(uae_u32 *a);
extern uae_u32 do_get_mem_word(uae_u16 *a);
extern void do_put_mem_long(uae_u32 *a, uae_u32 v);
extern void do_put_mem_word(uae_u16 *a, uae_u32 v);
#ifdef __cplusplus
}
#endif

#else /* sgi */

/* Big-endian CPUs which can not do unaligned accesses (this is not the most efficient way to do this...) */
static inline uae_u32 do_get_mem_long(uae_u32 *a) {uint8 *b = (uint8 *)a; return (b[0] << 24) | (b[1] << 16) | (b[2] << 8) | b[3];}
static inline uae_u32 do_get_mem_word(uae_u16 *a) {uint8 *b = (uint8 *)a; return (b[0] << 8) | b[1];}
static inline void do_put_mem_long(uae_u32 *a, uae_u32 v) {uint8 *b = (uint8 *)a; b[0] = v >> 24; b[1] = v >> 16; b[2] = v >> 8; b[3] = v;}
static inline void do_put_mem_word(uae_u16 *a, uae_u32 v) {uint8 *b = (uint8 *)a; b[0] = v >> 8; b[1] = v;}
#endif /* sgi */

#endif /* CPU_CAN_ACCESS_UNALIGNED */

#else /* WORDS_BIGENDIAN */

#if defined(__i386__) || defined(__x86_64__)

/* Intel x86 */
#define X86_PPRO_OPT
static inline uae_u32 do_get_mem_long(uae_u32 *a) {uint32 retval; __asm__ ("bswap %0" : "=r" (retval) : "0" (*a) : "cc"); return retval;}
#ifdef X86_PPRO_OPT
static inline uae_u32 do_get_mem_word(uae_u16 *a) {uint32 retval; __asm__ ("movzwl %w1,%k0\n\tshll $16,%k0\n\tbswapl %k0\n" : "=&r" (retval) : "m" (*a) : "cc"); return retval;}
#else
static inline uae_u32 do_get_mem_word(uae_u16 *a) {uint32 retval; __asm__ ("xorl %k0,%k0\n\tmovw %w1,%w0\n\trolw $8,%w0" : "=&r" (retval) : "m" (*a) : "cc"); return retval;}
#endif
#define HAVE_GET_WORD_UNSWAPPED
#define do_get_mem_word_unswapped(a) ((uae_u32)*((uae_u16 *)(a)))
static inline void do_put_mem_long(uae_u32 *a, uae_u32 v) {__asm__ ("bswap %0" : "=r" (v) : "0" (v) : "cc"); *a = v;}
#ifdef X86_PPRO_OPT
static inline void do_put_mem_word(uae_u16 *a, uae_u32 v) {__asm__ ("bswapl %0" : "=&r" (v) : "0" (v << 16) : "cc"); *a = v;}
#else
static inline void do_put_mem_word(uae_u16 *a, uae_u32 v) {__asm__ ("rolw $8,%0" : "=r" (v) : "0" (v) : "cc"); *a = v;}
#endif
#define HAVE_OPTIMIZED_BYTESWAP_32
/* bswap doesn't affect condition codes */
static inline uae_u32 do_byteswap_32(uae_u32 v) {__asm__ ("bswap %0" : "=r" (v) : "0" (v)); return v;}
#define HAVE_OPTIMIZED_BYTESWAP_16
#ifdef X86_PPRO_OPT
static inline uae_u32 do_byteswap_16(uae_u32 v) {__asm__ ("bswapl %0" : "=&r" (v) : "0" (v << 16) : "cc"); return v;}
#else
static inline uae_u32 do_byteswap_16(uae_u32 v) {__asm__ ("rolw $8,%0" : "=r" (v) : "0" (v) : "cc"); return v;}
#endif

#elif defined(CPU_CAN_ACCESS_UNALIGNED)

/* Other little-endian CPUs which can do unaligned accesses */
static inline uae_u32 do_get_mem_long(uae_u32 *a) {uint32 x = *a; return (x >> 24) | (x >> 8) & 0xff00 | (x << 8) & 0xff0000 | (x << 24);}
static inline uae_u32 do_get_mem_word(uae_u16 *a) {uint16 x = *a; return (x >> 8) | (x << 8);}
static inline void do_put_mem_long(uae_u32 *a, uae_u32 v) {*a = (v >> 24) | (v >> 8) & 0xff00 | (v << 8) & 0xff0000 | (v << 24);}
static inline void do_put_mem_word(uae_u16 *a, uae_u32 v) {*a = (v >> 8) | (v << 8);}

#else /* CPU_CAN_ACCESS_UNALIGNED */

/* Other little-endian CPUs which can not do unaligned accesses (this needs optimization) */
static inline uae_u32 do_get_mem_long(uae_u32 *a) {uint8 *b = (uint8 *)a; return (b[0] << 24) | (b[1] << 16) | (b[2] << 8) | b[3];}
static inline uae_u32 do_get_mem_word(uae_u16 *a) {uint8 *b = (uint8 *)a; return (b[0] << 8) | b[1];}
static inline void do_put_mem_long(uae_u32 *a, uae_u32 v) {uint8 *b = (uint8 *)a; b[0] = v >> 24; b[1] = v >> 16; b[2] = v >> 8; b[3] = v;}
static inline void do_put_mem_word(uae_u16 *a, uae_u32 v) {uint8 *b = (uint8 *)a; b[0] = v >> 8; b[1] = v;}

#endif /* CPU_CAN_ACCESS_UNALIGNED */

#endif /* WORDS_BIGENDIAN */

#ifndef HAVE_OPTIMIZED_BYTESWAP_32
static inline uae_u32 do_byteswap_32(uae_u32 v)
        { return (((v >> 24) & 0xff) | ((v >> 8) & 0xff00) | ((v & 0xff) << 24) | ((v & 0xff00) << 8)); }
#endif

#ifndef HAVE_OPTIMIZED_BYTESWAP_16
static inline uae_u32 do_byteswap_16(uae_u32 v)
        { return (((v >> 8) & 0xff) | ((v & 0xff) << 8)); }
#endif

#define do_get_mem_byte(a) ((uae_u32)*((uae_u8 *)(a)))
#define do_put_mem_byte(a, v) (*(uae_u8 *)(a) = (v))

#define call_mem_get_func(func, addr) ((*func)(addr))
#define call_mem_put_func(func, addr, v) ((*func)(addr, v))
#define __inline__ inline
#define CPU_EMU_SIZE 0
#undef NO_INLINE_MEMORY_ACCESS
#undef MD_HAVE_MEM_1_FUNCS
#define ENUMDECL typedef enum
#define ENUMNAME(name) name
#define write_log printf

#if defined(X86_ASSEMBLY) || defined(X86_64_ASSEMBLY)
#define ASM_SYM_FOR_FUNC(a) __asm__(a)
#else
#define ASM_SYM_FOR_FUNC(a)
#endif

#ifndef REGPARAM
# define REGPARAM
#endif
#define REGPARAM2

#endif
Revision:	1.31
Committed:	2004-11-15T23:24:09Z (19 years, 11 months ago) by gbeauche
Content type:	text/plain
Branch:	MAIN
Changes since 1.30:	+155 -0 lines
Log Message:	Fast spinlocks from SheepShaver for X11 clipboard handling
#	User	Rev	Content
1	cebix	1.1	/*
2			* sysdeps.h - System dependent definitions for Unix
3			*
4	cebix	1.29	* Basilisk II (C) 1997-2004 Christian Bauer
5	cebix	1.1	*
6			* This program is free software; you can redistribute it and/or modify
7			* it under the terms of the GNU General Public License as published by
8			* the Free Software Foundation; either version 2 of the License, or
9			* (at your option) any later version.
10			*
11			* This program is distributed in the hope that it will be useful,
12			* but WITHOUT ANY WARRANTY; without even the implied warranty of
13			* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14			* GNU General Public License for more details.
15			*
16			* You should have received a copy of the GNU General Public License
17			* along with this program; if not, write to the Free Software
18			* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19			*/
20
21			#ifndef SYSDEPS_H
22			#define SYSDEPS_H
23
24			#ifndef __STDC__
25			#error "Your compiler is not ANSI. Get a real one."
26			#endif
27
28			#include "config.h"
29	cebix	1.3	#include "user_strings_unix.h"
30	cebix	1.1
31			#ifndef STDC_HEADERS
32			#error "You don't have ANSI C header files."
33			#endif
34
35	cebix	1.2	#ifdef HAVE_UNISTD_H
36			# include <sys/types.h>
37			# include <unistd.h>
38			#endif
39
40	cebix	1.1	#include <netinet/in.h>
41			#include <assert.h>
42			#include <stdio.h>
43			#include <stdlib.h>
44			#include <string.h>
45
46	gbeauche	1.24	#ifdef HAVE_PTHREADS
47			# include <pthread.h>
48			#endif
49
50	cebix	1.1	#ifdef HAVE_FCNTL_H
51			# include <fcntl.h>
52			#endif
53
54			#ifdef TIME_WITH_SYS_TIME
55			# include <sys/time.h>
56			# include <time.h>
57			#else
58			# ifdef HAVE_SYS_TIME_H
59			# include <sys/time.h>
60			# else
61			# include <time.h>
62			# endif
63			#endif
64
65
66	cebix	1.11	#ifdef ENABLE_NATIVE_M68K
67
68			/* Mac and host address space are the same */
69			#define REAL_ADDRESSING 1
70
71			/* Using 68k natively */
72			#define EMULATED_68K 0
73
74			/* Mac ROM is not write protected */
75			#define ROM_IS_WRITE_PROTECTED 0
76	cebix	1.14	#define USE_SCRATCHMEM_SUBTERFUGE 1
77	cebix	1.11
78			#else
79
80			/* Mac and host address space are distinct */
81	gbeauche	1.13	#ifndef REAL_ADDRESSING
82	cebix	1.1	#define REAL_ADDRESSING 0
83	gbeauche	1.13	#endif
84	cebix	1.1
85	cebix	1.11	/* Using 68k emulator */
86	cebix	1.1	#define EMULATED_68K 1
87
88	gbeauche	1.13	/* The m68k emulator uses a prefetch buffer ? */
89			#define USE_PREFETCH_BUFFER 0
90
91	cebix	1.14	/* Mac ROM is write protected when banked memory is used */
92	gbeauche	1.13	#if REAL_ADDRESSING \|\| DIRECT_ADDRESSING
93			# define ROM_IS_WRITE_PROTECTED 0
94			# define USE_SCRATCHMEM_SUBTERFUGE 1
95			#else
96			# define ROM_IS_WRITE_PROTECTED 1
97			#endif
98	cebix	1.1
99	cebix	1.11	#endif
100
101	gbeauche	1.30	/* Direct Addressing requires Video on SEGV signals in plain X11 mode */
102			#if DIRECT_ADDRESSING && (!ENABLE_VOSF && !USE_SDL_VIDEO)
103	gbeauche	1.13	# undef ENABLE_VOSF
104			# define ENABLE_VOSF 1
105			#endif
106
107	cebix	1.6	/* ExtFS is supported */
108			#define SUPPORTS_EXTFS 1
109	cebix	1.11
110	cebix	1.20	/* BSD socket API supported */
111			#define SUPPORTS_UDP_TUNNEL 1
112
113	cebix	1.6
114	cebix	1.1	/* Data types */
115			typedef unsigned char uint8;
116			typedef signed char int8;
117			#if SIZEOF_SHORT == 2
118			typedef unsigned short uint16;
119			typedef short int16;
120			#elif SIZEOF_INT == 2
121			typedef unsigned int uint16;
122			typedef int int16;
123			#else
124			#error "No 2 byte type, you lose."
125			#endif
126			#if SIZEOF_INT == 4
127			typedef unsigned int uint32;
128			typedef int int32;
129			#elif SIZEOF_LONG == 4
130			typedef unsigned long uint32;
131			typedef long int32;
132			#else
133			#error "No 4 byte type, you lose."
134			#endif
135			#if SIZEOF_LONG == 8
136			typedef unsigned long uint64;
137			typedef long int64;
138	cebix	1.8	#define VAL64(a) (a ## l)
139			#define UVAL64(a) (a ## ul)
140	cebix	1.1	#elif SIZEOF_LONG_LONG == 8
141			typedef unsigned long long uint64;
142			typedef long long int64;
143	cebix	1.8	#define VAL64(a) (a ## LL)
144			#define UVAL64(a) (a ## uLL)
145	cebix	1.1	#else
146			#error "No 8 byte type, you lose."
147	gbeauche	1.13	#endif
148			#if SIZEOF_VOID_P == 4
149			typedef uint32 uintptr;
150			typedef int32 intptr;
151			#elif SIZEOF_VOID_P == 8
152			typedef uint64 uintptr;
153			typedef int64 intptr;
154			#else
155			#error "Unsupported size of pointer"
156	cebix	1.1	#endif
157
158	nigel	1.27	#ifndef HAVE_LOFF_T
159	gbeauche	1.28	typedef off_t loff_t;
160			#endif
161			#ifndef HAVE_CADDR_T
162			typedef char * caddr_t;
163	nigel	1.27	#endif
164
165	cebix	1.1	/* Time data type for Time Manager emulation */
166			#ifdef HAVE_CLOCK_GETTIME
167			typedef struct timespec tm_time_t;
168			#else
169			typedef struct timeval tm_time_t;
170			#endif
171
172	gbeauche	1.23	/* Define codes for all the float formats that we know of.
173			* Though we only handle IEEE format. */
174			#define UNKNOWN_FLOAT_FORMAT 0
175			#define IEEE_FLOAT_FORMAT 1
176			#define VAX_FLOAT_FORMAT 2
177			#define IBM_FLOAT_FORMAT 3
178			#define C4X_FLOAT_FORMAT 4
179
180	cebix	1.1	/* UAE CPU data types */
181			#define uae_s8 int8
182			#define uae_u8 uint8
183			#define uae_s16 int16
184			#define uae_u16 uint16
185			#define uae_s32 int32
186			#define uae_u32 uint32
187	cebix	1.7	#define uae_s64 int64
188			#define uae_u64 uint64
189	cebix	1.1	typedef uae_u32 uaecptr;
190
191			/* Alignment restrictions */
192	gbeauche	1.25	#if defined(__i386__) \|\| defined(__powerpc__) \|\| defined(__m68k__) \|\| defined(__x86_64__)
193	cebix	1.1	# define CPU_CAN_ACCESS_UNALIGNED
194			#endif
195
196	cebix	1.12	/* Timing functions */
197			extern uint64 GetTicks_usec(void);
198			extern void Delay_usec(uint32 usec);
199
200	gbeauche	1.31	/* Spinlocks */
201			#ifdef __GNUC__
202
203			#if defined(__powerpc__) \|\| defined(__ppc__)
204			#define HAVE_TEST_AND_SET 1
205			static inline int testandset(volatile int *p)
206			{
207			int ret;
208			__asm__ __volatile__("0: lwarx %0,0,%1\n"
209			" xor. %0,%3,%0\n"
210			" bne 1f\n"
211			" stwcx. %2,0,%1\n"
212			" bne- 0b\n"
213			"1: "
214			: "=&r" (ret)
215			: "r" (p), "r" (1), "r" (0)
216			: "cr0", "memory");
217			return ret;
218			}
219			#endif
220
221			/* FIXME: SheepShaver occasionnally hangs with those locks */
222			#if 0 && (defined(__i386__) \|\| defined(__x86_64__))
223			#define HAVE_TEST_AND_SET 1
224			static inline int testandset(volatile int *p)
225			{
226			long int ret;
227			/* Note: the "xchg" instruction does not need a "lock" prefix */
228			__asm__ __volatile__("xchgl %k0, %1"
229			: "=r" (ret), "=m" (*p)
230			: "0" (1), "m" (*p)
231			: "memory");
232			return ret;
233			}
234			#endif
235
236			#ifdef __s390__
237			#define HAVE_TEST_AND_SET 1
238			static inline int testandset(volatile int *p)
239			{
240			int ret;
241
242			__asm__ __volatile__("0: cs %0,%1,0(%2)\n"
243			" jl 0b"
244			: "=&d" (ret)
245			: "r" (1), "a" (p), "0" (*p)
246			: "cc", "memory" );
247			return ret;
248			}
249			#endif
250
251			#ifdef __alpha__
252			#define HAVE_TEST_AND_SET 1
253			static inline int testandset(volatile int *p)
254			{
255			int ret;
256			unsigned long one;
257
258			__asm__ __volatile__("0: mov 1,%2\n"
259			" ldl_l %0,%1\n"
260			" stl_c %2,%1\n"
261			" beq %2,1f\n"
262			".subsection 2\n"
263			"1: br 0b\n"
264			".previous"
265			: "=r" (ret), "=m" (*p), "=r" (one)
266			: "m" (*p));
267			return ret;
268			}
269			#endif
270
271			#ifdef __sparc__
272			#define HAVE_TEST_AND_SET 1
273			static inline int testandset(volatile int *p)
274			{
275			int ret;
276
277			__asm__ __volatile__("ldstub [%1], %0"
278			: "=r" (ret)
279			: "r" (p)
280			: "memory");
281
282			return (ret ? 1 : 0);
283			}
284			#endif
285
286			#ifdef __arm__
287			#define HAVE_TEST_AND_SET 1
288			static inline int testandset(volatile int *p)
289			{
290			register unsigned int ret;
291			__asm__ __volatile__("swp %0, %1, [%2]"
292			: "=r"(ret)
293			: "0"(1), "r"(p));
294
295			return ret;
296			}
297			#endif
298
299			#endif /* __GNUC__ */
300
301			typedef volatile int spinlock_t;
302
303			static const spinlock_t SPIN_LOCK_UNLOCKED = 0;
304
305			#if HAVE_TEST_AND_SET
306			#define HAVE_SPINLOCKS 1
307			static inline void spin_lock(spinlock_t *lock)
308			{
309			while (testandset(lock));
310			}
311
312			static inline void spin_unlock(spinlock_t *lock)
313			{
314			*lock = 0;
315			}
316
317			static inline int spin_trylock(spinlock_t *lock)
318			{
319			return !testandset(lock);
320			}
321			#else
322			static inline void spin_lock(spinlock_t *lock)
323			{
324			}
325
326			static inline void spin_unlock(spinlock_t *lock)
327			{
328			}
329
330			static inline int spin_trylock(spinlock_t *lock)
331			{
332			return 1;
333			}
334			#endif
335
336			/* X11 display fast locks */
337			#ifdef HAVE_SPINLOCKS
338			#define X11_LOCK_TYPE spinlock_t
339			#define X11_LOCK_INIT SPIN_LOCK_UNLOCKED
340			#define XDisplayLock() spin_lock(&x_display_lock)
341			#define XDisplayUnlock() spin_unlock(&x_display_lock)
342			#elif defined(HAVE_PTHREADS)
343			#define X11_LOCK_TYPE pthread_mutex_t
344			#define X11_LOCK_INIT PTHREAD_MUTEX_INITIALIZER
345			#define XDisplayLock() pthread_mutex_lock(&x_display_lock);
346			#define XDisplayUnlock() pthread_mutex_unlock(&x_display_lock);
347			#else
348			#define XDisplayLock()
349			#define XDisplayUnlock()
350			#endif
351			#ifdef X11_LOCK_TYPE
352			extern X11_LOCK_TYPE x_display_lock;
353			#endif
354
355	cebix	1.22	#ifdef HAVE_PTHREADS
356			/* Centralized pthread attribute setup */
357			void Set_pthread_attr(pthread_attr_t *attr, int priority);
358			#endif
359
360	cebix	1.1	/* UAE CPU defines */
361			#ifdef WORDS_BIGENDIAN
362
363			#ifdef CPU_CAN_ACCESS_UNALIGNED
364
365			/* Big-endian CPUs which can do unaligned accesses */
366			static inline uae_u32 do_get_mem_long(uae_u32 a) {return a;}
367			static inline uae_u32 do_get_mem_word(uae_u16 a) {return a;}
368			static inline void do_put_mem_long(uae_u32 a, uae_u32 v) {a = v;}
369			static inline void do_put_mem_word(uae_u16 a, uae_u32 v) {a = v;}
370
371			#else /* CPU_CAN_ACCESS_UNALIGNED */
372
373			#ifdef sgi
374			/* The SGI MIPSPro compilers can do unaligned accesses given enough hints.
375			* They will automatically inline these routines. */
376			#ifdef __cplusplus
377			extern "C" { /* only the C compiler does unaligned accesses */
378			#endif
379			extern uae_u32 do_get_mem_long(uae_u32 *a);
380			extern uae_u32 do_get_mem_word(uae_u16 *a);
381			extern void do_put_mem_long(uae_u32 *a, uae_u32 v);
382			extern void do_put_mem_word(uae_u16 *a, uae_u32 v);
383			#ifdef __cplusplus
384			}
385			#endif
386
387			#else /* sgi */
388
389			/* Big-endian CPUs which can not do unaligned accesses (this is not the most efficient way to do this...) */
390			static inline uae_u32 do_get_mem_long(uae_u32 a) {uint8 b = (uint8 *)a; return (b[0] << 24) \| (b[1] << 16) \| (b[2] << 8) \| b[3];}
391			static inline uae_u32 do_get_mem_word(uae_u16 a) {uint8 b = (uint8 *)a; return (b[0] << 8) \| b[1];}
392			static inline void do_put_mem_long(uae_u32 a, uae_u32 v) {uint8 b = (uint8 *)a; b[0] = v >> 24; b[1] = v >> 16; b[2] = v >> 8; b[3] = v;}
393			static inline void do_put_mem_word(uae_u16 a, uae_u32 v) {uint8 b = (uint8 *)a; b[0] = v >> 8; b[1] = v;}
394			#endif /* sgi */
395
396			#endif /* CPU_CAN_ACCESS_UNALIGNED */
397
398			#else /* WORDS_BIGENDIAN */
399
400	gbeauche	1.25	#if defined(__i386__) \|\| defined(__x86_64__)
401	cebix	1.1
402			/* Intel x86 */
403			#define X86_PPRO_OPT
404			static inline uae_u32 do_get_mem_long(uae_u32 a) {uint32 retval; __asm__ ("bswap %0" : "=r" (retval) : "0" (a) : "cc"); return retval;}
405			#ifdef X86_PPRO_OPT
406			static inline uae_u32 do_get_mem_word(uae_u16 a) {uint32 retval; __asm__ ("movzwl %w1,%k0\n\tshll $16,%k0\n\tbswapl %k0\n" : "=&r" (retval) : "m" (a) : "cc"); return retval;}
407			#else
408			static inline uae_u32 do_get_mem_word(uae_u16 a) {uint32 retval; __asm__ ("xorl %k0,%k0\n\tmovw %w1,%w0\n\trolw $8,%w0" : "=&r" (retval) : "m" (a) : "cc"); return retval;}
409			#endif
410			#define HAVE_GET_WORD_UNSWAPPED
411			#define do_get_mem_word_unswapped(a) ((uae_u32)((uae_u16 )(a)))
412			static inline void do_put_mem_long(uae_u32 a, uae_u32 v) {__asm__ ("bswap %0" : "=r" (v) : "0" (v) : "cc"); a = v;}
413			#ifdef X86_PPRO_OPT
414			static inline void do_put_mem_word(uae_u16 a, uae_u32 v) {__asm__ ("bswapl %0" : "=&r" (v) : "0" (v << 16) : "cc"); a = v;}
415			#else
416			static inline void do_put_mem_word(uae_u16 a, uae_u32 v) {__asm__ ("rolw $8,%0" : "=r" (v) : "0" (v) : "cc"); a = v;}
417			#endif
418	gbeauche	1.16	#define HAVE_OPTIMIZED_BYTESWAP_32
419			/* bswap doesn't affect condition codes */
420			static inline uae_u32 do_byteswap_32(uae_u32 v) {__asm__ ("bswap %0" : "=r" (v) : "0" (v)); return v;}
421			#define HAVE_OPTIMIZED_BYTESWAP_16
422			#ifdef X86_PPRO_OPT
423			static inline uae_u32 do_byteswap_16(uae_u32 v) {__asm__ ("bswapl %0" : "=&r" (v) : "0" (v << 16) : "cc"); return v;}
424			#else
425			static inline uae_u32 do_byteswap_16(uae_u32 v) {__asm__ ("rolw $8,%0" : "=r" (v) : "0" (v) : "cc"); return v;}
426			#endif
427	cebix	1.1
428			#elif defined(CPU_CAN_ACCESS_UNALIGNED)
429
430			/* Other little-endian CPUs which can do unaligned accesses */
431			static inline uae_u32 do_get_mem_long(uae_u32 a) {uint32 x = a; return (x >> 24) \| (x >> 8) & 0xff00 \| (x << 8) & 0xff0000 \| (x << 24);}
432			static inline uae_u32 do_get_mem_word(uae_u16 a) {uint16 x = a; return (x >> 8) \| (x << 8);}
433			static inline void do_put_mem_long(uae_u32 a, uae_u32 v) {a = (v >> 24) \| (v >> 8) & 0xff00 \| (v << 8) & 0xff0000 \| (v << 24);}
434			static inline void do_put_mem_word(uae_u16 a, uae_u32 v) {a = (v >> 8) \| (v << 8);}
435
436			#else /* CPU_CAN_ACCESS_UNALIGNED */
437
438			/* Other little-endian CPUs which can not do unaligned accesses (this needs optimization) */
439			static inline uae_u32 do_get_mem_long(uae_u32 a) {uint8 b = (uint8 *)a; return (b[0] << 24) \| (b[1] << 16) \| (b[2] << 8) \| b[3];}
440			static inline uae_u32 do_get_mem_word(uae_u16 a) {uint8 b = (uint8 *)a; return (b[0] << 8) \| b[1];}
441			static inline void do_put_mem_long(uae_u32 a, uae_u32 v) {uint8 b = (uint8 *)a; b[0] = v >> 24; b[1] = v >> 16; b[2] = v >> 8; b[3] = v;}
442			static inline void do_put_mem_word(uae_u16 a, uae_u32 v) {uint8 b = (uint8 *)a; b[0] = v >> 8; b[1] = v;}
443
444			#endif /* CPU_CAN_ACCESS_UNALIGNED */
445
446			#endif /* WORDS_BIGENDIAN */
447	gbeauche	1.16
448			#ifndef HAVE_OPTIMIZED_BYTESWAP_32
449			static inline uae_u32 do_byteswap_32(uae_u32 v)
450			{ return (((v >> 24) & 0xff) \| ((v >> 8) & 0xff00) \| ((v & 0xff) << 24) \| ((v & 0xff00) << 8)); }
451			#endif
452
453			#ifndef HAVE_OPTIMIZED_BYTESWAP_16
454			static inline uae_u32 do_byteswap_16(uae_u32 v)
455			{ return (((v >> 8) & 0xff) \| ((v & 0xff) << 8)); }
456			#endif
457	cebix	1.1
458			#define do_get_mem_byte(a) ((uae_u32)((uae_u8 )(a)))
459			#define do_put_mem_byte(a, v) ((uae_u8 )(a) = (v))
460
461			#define call_mem_get_func(func, addr) ((*func)(addr))
462			#define call_mem_put_func(func, addr, v) ((*func)(addr, v))
463			#define __inline__ inline
464			#define CPU_EMU_SIZE 0
465			#undef NO_INLINE_MEMORY_ACCESS
466			#undef MD_HAVE_MEM_1_FUNCS
467			#define ENUMDECL typedef enum
468			#define ENUMNAME(name) name
469			#define write_log printf
470
471	gbeauche	1.26	#if defined(X86_ASSEMBLY) \|\| defined(X86_64_ASSEMBLY)
472	cebix	1.1	#define ASM_SYM_FOR_FUNC(a) __asm__(a)
473			#else
474			#define ASM_SYM_FOR_FUNC(a)
475			#endif
476
477			#ifndef REGPARAM
478			# define REGPARAM
479			#endif
480			#define REGPARAM2
481
482			#endif