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root/cebix/BasiliskII/src/Unix/sigsegv.cpp

Comparing BasiliskII/src/Unix/sigsegv.cpp (file contents):
Revision 1.42 by gbeauche, 2004-01-19T16:59:13Z vs.
Revision 1.57 by gbeauche, 2006-01-22T00:05:05Z

#	Line 10 | Line 10
10		*    tjw@omnigroup.com Sun, 4 Jun 2000
11		*    www.omnigroup.com/mailman/archive/macosx-dev/2000-June/002030.html
12		*
13	<	*  Basilisk II (C) 1997-2004 Christian Bauer
13	>	*  Basilisk II (C) 1997-2005 Christian Bauer
14		*
15		*  This program is free software; you can redistribute it and/or modify
16		*  it under the terms of the GNU General Public License as published by
#	Line 97 | Line 97 | struct instruction_t {
97		char                            ra, rd;
98		};
99
100	<	static void powerpc_decode_instruction(instruction_t *instruction, unsigned int nip, unsigned int * gpr)
100	>	static void powerpc_decode_instruction(instruction_t *instruction, unsigned int nip, unsigned long * gpr)
101		{
102		// Get opcode and divide into fields
103	<	unsigned int opcode = *((unsigned int *)nip);
103	>	unsigned int opcode = *((unsigned int *)(unsigned long)nip);
104		unsigned int primop = opcode >> 26;
105		unsigned int exop = (opcode >> 1) & 0x3ff;
106		unsigned int ra = (opcode >> 16) & 0x1f;
#	Line 174 | Line 174 | static void powerpc_decode_instruction(i
174		transfer_type = SIGSEGV_TRANSFER_STORE; transfer_size = SIZE_WORD; addr_mode = MODE_NORM; break;
175		case 45:        // sthu
176		transfer_type = SIGSEGV_TRANSFER_STORE; transfer_size = SIZE_WORD; addr_mode = MODE_U; break;
177	+	case 58:        // ld, ldu, lwa
178	+	transfer_type = SIGSEGV_TRANSFER_LOAD;
179	+	transfer_size = SIZE_QUAD;
180	+	addr_mode = ((opcode & 3) == 1) ? MODE_U : MODE_NORM;
181	+	imm &= ~3;
182	+	break;
183	+	case 62:        // std, stdu, stq
184	+	transfer_type = SIGSEGV_TRANSFER_STORE;
185	+	transfer_size = SIZE_QUAD;
186	+	addr_mode = ((opcode & 3) == 1) ? MODE_U : MODE_NORM;
187	+	imm &= ~3;
188	+	break;
189		}
190
191		// Calculate effective address
#	Line 214 | Line 226 | static void powerpc_decode_instruction(i
226
227		#if HAVE_SIGINFO_T
228		// Generic extended signal handler
229	<	#if defined(__NetBSD__) || defined(__FreeBSD__)
229	>	#if defined(__FreeBSD__)
230		#define SIGSEGV_ALL_SIGNALS                             FAULT_HANDLER(SIGBUS)
231		#else
232		#define SIGSEGV_ALL_SIGNALS                             FAULT_HANDLER(SIGSEGV)
#	Line 244 | Line 256 | static void powerpc_decode_instruction(i
256		#define SIGSEGV_REGISTER_FILE                   ((unsigned long *)SIGSEGV_CONTEXT_REGS), SIGSEGV_SPARC_GWINDOWS, SIGSEGV_SPARC_RWINDOW
257		#define SIGSEGV_SKIP_INSTRUCTION                sparc_skip_instruction
258		#endif
259	+	#if defined(__i386__)
260	+	#include <sys/regset.h>
261	+	#define SIGSEGV_CONTEXT_REGS                    (((ucontext_t *)scp)->uc_mcontext.gregs)
262	+	#define SIGSEGV_FAULT_INSTRUCTION               SIGSEGV_CONTEXT_REGS[EIP]
263	+	#define SIGSEGV_REGISTER_FILE                   (unsigned long *)SIGSEGV_CONTEXT_REGS
264	+	#define SIGSEGV_SKIP_INSTRUCTION                ix86_skip_instruction
265		#endif
266	<	#if defined(__FreeBSD__)
266	>	#endif
267	>	#if defined(__FreeBSD__) || defined(__OpenBSD__)
268		#if (defined(i386) || defined(__i386__))
269		#define SIGSEGV_FAULT_INSTRUCTION               (((struct sigcontext *)scp)->sc_eip)
270		#define SIGSEGV_REGISTER_FILE                   ((unsigned long *)&(((struct sigcontext *)scp)->sc_edi)) /* EDI is the first GPR (even below EIP) in sigcontext */
271		#define SIGSEGV_SKIP_INSTRUCTION                ix86_skip_instruction
272		#endif
273		#endif
274	+	#if defined(__NetBSD__)
275	+	#if (defined(i386) || defined(__i386__))
276	+	#include <sys/ucontext.h>
277	+	#define SIGSEGV_CONTEXT_REGS                    (((ucontext_t *)scp)->uc_mcontext.__gregs)
278	+	#define SIGSEGV_FAULT_INSTRUCTION               SIGSEGV_CONTEXT_REGS[_REG_EIP]
279	+	#define SIGSEGV_REGISTER_FILE                   (unsigned long *)SIGSEGV_CONTEXT_REGS
280	+	#define SIGSEGV_SKIP_INSTRUCTION                ix86_skip_instruction
281	+	#endif
282	+	#if (defined(powerpc) || defined(__powerpc__))
283	+	#include <sys/ucontext.h>
284	+	#define SIGSEGV_CONTEXT_REGS                    (((ucontext_t *)scp)->uc_mcontext.__gregs)
285	+	#define SIGSEGV_FAULT_INSTRUCTION               SIGSEGV_CONTEXT_REGS[_REG_PC]
286	+	#define SIGSEGV_REGISTER_FILE                   (unsigned long *)&SIGSEGV_CONTEXT_REGS[_REG_PC], (unsigned long *)&SIGSEGV_CONTEXT_REGS[_REG_R0]
287	+	#define SIGSEGV_SKIP_INSTRUCTION                powerpc_skip_instruction
288	+	#endif
289	+	#endif
290		#if defined(__linux__)
291		#if (defined(i386) || defined(__i386__))
292		#include <sys/ucontext.h>
#	Line 274 | Line 309 | static void powerpc_decode_instruction(i
309		#include <sys/ucontext.h>
310		#define SIGSEGV_CONTEXT_REGS                    (((ucontext_t *)scp)->uc_mcontext.regs)
311		#define SIGSEGV_FAULT_INSTRUCTION               (SIGSEGV_CONTEXT_REGS->nip)
312	<	#define SIGSEGV_REGISTER_FILE                   (unsigned int *)&SIGSEGV_CONTEXT_REGS->nip, (unsigned int *)(SIGSEGV_CONTEXT_REGS->gpr)
312	>	#define SIGSEGV_REGISTER_FILE                   (unsigned long *)&SIGSEGV_CONTEXT_REGS->nip, (unsigned long *)(SIGSEGV_CONTEXT_REGS->gpr)
313		#define SIGSEGV_SKIP_INSTRUCTION                powerpc_skip_instruction
314		#endif
315		#if (defined(hppa) || defined(__hppa__))
#	Line 285 | Line 320 | static void powerpc_decode_instruction(i
320		#include <asm/ucontext.h> /* use kernel structure, glibc may not be in sync */
321		#define SIGSEGV_CONTEXT_REGS                    (((struct ucontext *)scp)->uc_mcontext)
322		#define SIGSEGV_FAULT_INSTRUCTION               (SIGSEGV_CONTEXT_REGS.arm_pc)
323	+	#define SIGSEGV_REGISTER_FILE                   (&SIGSEGV_CONTEXT_REGS.arm_r0)
324	+	#define SIGSEGV_SKIP_INSTRUCTION                arm_skip_instruction
325		#endif
326		#endif
327		#endif
#	Line 315 | Line 352 | static void powerpc_decode_instruction(i
352		#define SIGSEGV_FAULT_HANDLER_ARGS              sig, scp
353		#define SIGSEGV_FAULT_ADDRESS                   scp->regs->dar
354		#define SIGSEGV_FAULT_INSTRUCTION               scp->regs->nip
355	<	#define SIGSEGV_REGISTER_FILE                   (unsigned int *)&scp->regs->nip, (unsigned int *)(scp->regs->gpr)
355	>	#define SIGSEGV_REGISTER_FILE                   (unsigned long *)&scp->regs->nip, (unsigned long *)(scp->regs->gpr)
356		#define SIGSEGV_SKIP_INSTRUCTION                powerpc_skip_instruction
357		#endif
358		#if (defined(alpha) || defined(__alpha__))
#	Line 331 | Line 368 | static void powerpc_decode_instruction(i
368		#define SIGSEGV_FAULT_HANDLER_ARGS              &sc
369		#define SIGSEGV_FAULT_ADDRESS                   scp->fault_address
370		#define SIGSEGV_FAULT_INSTRUCTION               scp->arm_pc
371	+	#define SIGSEGV_REGISTER_FILE                   &scp->arm_r0
372	+	#define SIGSEGV_SKIP_INSTRUCTION                arm_skip_instruction
373		#endif
374		#endif
375
#	Line 477 | Line 516 | static sigsegv_address_t get_fault_addre
516		#endif
517		#endif
518
519	+	#if HAVE_WIN32_EXCEPTIONS
520	+	#define WIN32_LEAN_AND_MEAN /* avoid including junk */
521	+	#include <windows.h>
522	+	#include <winerror.h>
523	+
524	+	#define SIGSEGV_FAULT_HANDLER_ARGLIST   EXCEPTION_POINTERS *ExceptionInfo
525	+	#define SIGSEGV_FAULT_HANDLER_ARGS              ExceptionInfo
526	+	#define SIGSEGV_FAULT_ADDRESS                   ExceptionInfo->ExceptionRecord->ExceptionInformation[1]
527	+	#define SIGSEGV_CONTEXT_REGS                    ExceptionInfo->ContextRecord
528	+	#define SIGSEGV_FAULT_INSTRUCTION               SIGSEGV_CONTEXT_REGS->Eip
529	+	#define SIGSEGV_REGISTER_FILE                   ((unsigned long *)&SIGSEGV_CONTEXT_REGS->Edi)
530	+	#define SIGSEGV_SKIP_INSTRUCTION                ix86_skip_instruction
531	+	#endif
532	+
533		#if HAVE_MACH_EXCEPTIONS
534
535		// This can easily be extended to other Mach systems, but really who
#	Line 537 | Line 590 | if (ret != KERN_SUCCESS) { \
590		exit (1); \
591		}
592
593	+	#ifdef __ppc__
594	+	#define SIGSEGV_THREAD_STATE_TYPE               ppc_thread_state_t
595	+	#define SIGSEGV_THREAD_STATE_FLAVOR             PPC_THREAD_STATE
596	+	#define SIGSEGV_THREAD_STATE_COUNT              PPC_THREAD_STATE_COUNT
597	+	#define SIGSEGV_FAULT_INSTRUCTION               state->srr0
598	+	#define SIGSEGV_SKIP_INSTRUCTION                powerpc_skip_instruction
599	+	#define SIGSEGV_REGISTER_FILE                   (unsigned long *)&state->srr0, (unsigned long *)&state->r0
600	+	#endif
601	+	#ifdef __i386__
602	+	#ifdef i386_SAVED_STATE
603	+	#define SIGSEGV_THREAD_STATE_TYPE               struct i386_saved_state
604	+	#define SIGSEGV_THREAD_STATE_FLAVOR             i386_SAVED_STATE
605	+	#define SIGSEGV_THREAD_STATE_COUNT              i386_SAVED_STATE_COUNT
606	+	#define SIGSEGV_REGISTER_FILE                   ((unsigned long *)&state->edi) /* EDI is the first GPR we consider */
607	+	#else
608	+	#define SIGSEGV_THREAD_STATE_TYPE               struct i386_thread_state
609	+	#define SIGSEGV_THREAD_STATE_FLAVOR             i386_THREAD_STATE
610	+	#define SIGSEGV_THREAD_STATE_COUNT              i386_THREAD_STATE_COUNT
611	+	#define SIGSEGV_REGISTER_FILE                   ((unsigned long *)&state->eax) /* EAX is the first GPR we consider */
612	+	#endif
613	+	#define SIGSEGV_FAULT_INSTRUCTION               state->eip
614	+	#define SIGSEGV_SKIP_INSTRUCTION                ix86_skip_instruction
615	+	#endif
616		#define SIGSEGV_FAULT_ADDRESS                   code[1]
541	–	#define SIGSEGV_FAULT_INSTRUCTION               get_fault_instruction(thread, state)
617		#define SIGSEGV_FAULT_HANDLER_INVOKE(ADDR, IP)  ((code[0] == KERN_PROTECTION_FAILURE) ? sigsegv_fault_handler(ADDR, IP) : SIGSEGV_RETURN_FAILURE)
618	<	#define SIGSEGV_FAULT_HANDLER_ARGLIST   mach_port_t thread, exception_data_t code, ppc_thread_state_t *state
618	>	#define SIGSEGV_FAULT_HANDLER_ARGLIST   mach_port_t thread, exception_data_t code, SIGSEGV_THREAD_STATE_TYPE *state
619		#define SIGSEGV_FAULT_HANDLER_ARGS              thread, code, &state
545	–	#define SIGSEGV_SKIP_INSTRUCTION                powerpc_skip_instruction
546	–	#define SIGSEGV_REGISTER_FILE                   &state->srr0, &state->r0
547	–
548	–	// Given a suspended thread, stuff the current instruction and
549	–	// registers into state.
550	–	//
551	–	// It would have been nice to have this be ppc/x86 independant which
552	–	// could have been done easily with a thread_state_t instead of
553	–	// ppc_thread_state_t, but because of the way this is called it is
554	–	// easier to do it this way.
555	–	#if (defined(ppc) || defined(__ppc__))
556	–	static inline sigsegv_address_t get_fault_instruction(mach_port_t thread, ppc_thread_state_t *state)
557	–	{
558	–	kern_return_t krc;
559	–	mach_msg_type_number_t count;
560	–
561	–	count = MACHINE_THREAD_STATE_COUNT;
562	–	krc = thread_get_state(thread, MACHINE_THREAD_STATE, (thread_state_t)state, &count);
563	–	MACH_CHECK_ERROR (thread_get_state, krc);
564	–
565	–	return (sigsegv_address_t)state->srr0;
566	–	}
567	–	#endif
620
621		// Since there can only be one exception thread running at any time
622		// this is not a problem.
#	Line 654 | Line 706 | enum {
706		#endif
707		};
708		#endif
709	<	#if defined(__NetBSD__) || defined(__FreeBSD__)
709	>	#if defined(__NetBSD__)
710	>	enum {
711	>	#if (defined(i386) || defined(__i386__))
712	>	X86_REG_EIP = _REG_EIP,
713	>	X86_REG_EAX = _REG_EAX,
714	>	X86_REG_ECX = _REG_ECX,
715	>	X86_REG_EDX = _REG_EDX,
716	>	X86_REG_EBX = _REG_EBX,
717	>	X86_REG_ESP = _REG_ESP,
718	>	X86_REG_EBP = _REG_EBP,
719	>	X86_REG_ESI = _REG_ESI,
720	>	X86_REG_EDI = _REG_EDI
721	>	#endif
722	>	};
723	>	#endif
724	>	#if defined(__FreeBSD__)
725		enum {
726		#if (defined(i386) || defined(__i386__))
727		X86_REG_EIP = 10,
#	Line 669 | Line 736 | enum {
736		#endif
737		};
738		#endif
739	+	#if defined(__OpenBSD__)
740	+	enum {
741	+	#if defined(__i386__)
742	+	// EDI is the first register we consider
743	+	#define OREG(REG) offsetof(struct sigcontext, sc_##REG)
744	+	#define DREG(REG) ((OREG(REG) - OREG(edi)) / 4)
745	+	X86_REG_EIP = DREG(eip), // 7
746	+	X86_REG_EAX = DREG(eax), // 6
747	+	X86_REG_ECX = DREG(ecx), // 5
748	+	X86_REG_EDX = DREG(edx), // 4
749	+	X86_REG_EBX = DREG(ebx), // 3
750	+	X86_REG_ESP = DREG(esp), // 10
751	+	X86_REG_EBP = DREG(ebp), // 2
752	+	X86_REG_ESI = DREG(esi), // 1
753	+	X86_REG_EDI = DREG(edi)  // 0
754	+	#undef DREG
755	+	#undef OREG
756	+	#endif
757	+	};
758	+	#endif
759	+	#if defined(__sun__)
760	+	// Same as for Linux, need to check for x86-64
761	+	enum {
762	+	#if defined(__i386__)
763	+	X86_REG_EIP = EIP,
764	+	X86_REG_EAX = EAX,
765	+	X86_REG_ECX = ECX,
766	+	X86_REG_EDX = EDX,
767	+	X86_REG_EBX = EBX,
768	+	X86_REG_ESP = ESP,
769	+	X86_REG_EBP = EBP,
770	+	X86_REG_ESI = ESI,
771	+	X86_REG_EDI = EDI
772	+	#endif
773	+	};
774	+	#endif
775	+	#if defined(__APPLE__) && defined(__MACH__)
776	+	enum {
777	+	#ifdef i386_SAVED_STATE
778	+	// same as FreeBSD (in Open Darwin 8.0.1)
779	+	X86_REG_EIP = 10,
780	+	X86_REG_EAX = 7,
781	+	X86_REG_ECX = 6,
782	+	X86_REG_EDX = 5,
783	+	X86_REG_EBX = 4,
784	+	X86_REG_ESP = 13,
785	+	X86_REG_EBP = 2,
786	+	X86_REG_ESI = 1,
787	+	X86_REG_EDI = 0
788	+	#else
789	+	// new layout (MacOS X 10.4.4 for x86)
790	+	X86_REG_EIP = 10,
791	+	X86_REG_EAX = 0,
792	+	X86_REG_ECX = 2,
793	+	X86_REG_EDX = 4,
794	+	X86_REG_EBX = 1,
795	+	X86_REG_ESP = 7,
796	+	X86_REG_EBP = 6,
797	+	X86_REG_ESI = 5,
798	+	X86_REG_EDI = 4
799	+	#endif
800	+	};
801	+	#endif
802	+	#if defined(_WIN32)
803	+	enum {
804	+	#if (defined(i386) || defined(__i386__))
805	+	X86_REG_EIP = 7,
806	+	X86_REG_EAX = 5,
807	+	X86_REG_ECX = 4,
808	+	X86_REG_EDX = 3,
809	+	X86_REG_EBX = 2,
810	+	X86_REG_ESP = 10,
811	+	X86_REG_EBP = 6,
812	+	X86_REG_ESI = 1,
813	+	X86_REG_EDI = 0
814	+	#endif
815	+	};
816	+	#endif
817		// FIXME: this is partly redundant with the instruction decoding phase
818		// to discover transfer type and register number
819		static inline int ix86_step_over_modrm(unsigned char * p)
#	Line 709 | Line 854 | static bool ix86_skip_instruction(unsign
854
855		if (eip == 0)
856		return false;
857	+	#ifdef _WIN32
858	+	if (IsBadCodePtr((FARPROC)eip))
859	+	return false;
860	+	#endif
861
862		transfer_type_t transfer_type = SIGSEGV_TRANSFER_UNKNOWN;
863		transfer_size_t transfer_size = SIZE_LONG;
#	Line 762 | Line 911 | static bool ix86_skip_instruction(unsign
911		#endif
912
913		// Decode instruction
914	+	int target_size = SIZE_UNKNOWN;
915		switch (eip[0]) {
916		case 0x0f:
917	+	target_size = transfer_size;
918		switch (eip[1]) {
919	+	case 0xbe: // MOVSX r32, r/m8
920		case 0xb6: // MOVZX r32, r/m8
921	+	transfer_size = SIZE_BYTE;
922	+	goto do_mov_extend;
923	+	case 0xbf: // MOVSX r32, r/m16
924		case 0xb7: // MOVZX r32, r/m16
925	<	switch (eip[2] & 0xc0) {
926	<	case 0x80:
927	<	reg = (eip[2] >> 3) & 7;
928	<	transfer_type = SIGSEGV_TRANSFER_LOAD;
929	<	break;
930	<	case 0x40:
931	<	reg = (eip[2] >> 3) & 7;
932	<	transfer_type = SIGSEGV_TRANSFER_LOAD;
933	<	break;
934	<	case 0x00:
935	<	reg = (eip[2] >> 3) & 7;
936	<	transfer_type = SIGSEGV_TRANSFER_LOAD;
937	<	break;
938	<	}
939	<	len += 3 + ix86_step_over_modrm(eip + 2);
940	<	break;
925	>	transfer_size = SIZE_WORD;
926	>	goto do_mov_extend;
927	>	do_mov_extend:
928	>	switch (eip[2] & 0xc0) {
929	>	case 0x80:
930	>	reg = (eip[2] >> 3) & 7;
931	>	transfer_type = SIGSEGV_TRANSFER_LOAD;
932	>	break;
933	>	case 0x40:
934	>	reg = (eip[2] >> 3) & 7;
935	>	transfer_type = SIGSEGV_TRANSFER_LOAD;
936	>	break;
937	>	case 0x00:
938	>	reg = (eip[2] >> 3) & 7;
939	>	transfer_type = SIGSEGV_TRANSFER_LOAD;
940	>	break;
941	>	}
942	>	len += 3 + ix86_step_over_modrm(eip + 2);
943	>	break;
944		}
945		break;
946		case 0x8a: // MOV r8, r/m8
#	Line 824 | Line 982 | static bool ix86_skip_instruction(unsign
982		len += 2 + ix86_step_over_modrm(eip + 1);
983		break;
984		}
985	+	if (target_size == SIZE_UNKNOWN)
986	+	target_size = transfer_size;
987
988		if (transfer_type == SIGSEGV_TRANSFER_UNKNOWN) {
989		// Unknown machine code, let it crash. Then patch the decoder
#	Line 851 | Line 1011 | static bool ix86_skip_instruction(unsign
1011		// Set 0 to the relevant register part
1012		// NOTE: this is only valid for MOV alike instructions
1013		int rloc = x86_reg_map[reg];
1014	<	switch (transfer_size) {
1014	>	switch (target_size) {
1015		case SIZE_BYTE:
1016		if (has_rex || reg < 4)
1017		regs[rloc] = (regs[rloc] & ~0x00ffL);
#	Line 905 | Line 1065 | static bool ix86_skip_instruction(unsign
1065		"r12", "r13", "r14", "r15",
1066		};
1067		const char * reg_str = NULL;
1068	<	switch (transfer_size) {
1068	>	switch (target_size) {
1069		case SIZE_BYTE:
1070		reg_str = x86_byte_reg_str_map[(!has_rex && reg >= 4 ? 12 : 0) + reg];
1071		break;
#	Line 928 | Line 1088 | static bool ix86_skip_instruction(unsign
1088
1089		// Decode and skip PPC instruction
1090		#if (defined(powerpc) || defined(__powerpc__) || defined(__ppc__))
1091	<	static bool powerpc_skip_instruction(unsigned int * nip_p, unsigned int * regs)
1091	>	static bool powerpc_skip_instruction(unsigned long * nip_p, unsigned long * regs)
1092		{
1093		instruction_t instr;
1094		powerpc_decode_instruction(&instr, *nip_p, regs);
#	Line 940 | Line 1100 | static bool powerpc_skip_instruction(uns
1100
1101		#if DEBUG
1102		printf("%08x: %s %s access", *nip_p,
1103	<	instr.transfer_size == SIZE_BYTE ? "byte" : instr.transfer_size == SIZE_WORD ? "word" : "long",
1103	>	instr.transfer_size == SIZE_BYTE ? "byte" :
1104	>	instr.transfer_size == SIZE_WORD ? "word" :
1105	>	instr.transfer_size == SIZE_LONG ? "long" : "quad",
1106		instr.transfer_type == SIGSEGV_TRANSFER_LOAD ? "read" : "write");
1107
1108		if (instr.addr_mode == MODE_U || instr.addr_mode == MODE_UX)
#	Line 1252 | Line 1414 | static bool sparc_skip_instruction(unsig
1414		#endif
1415		#endif
1416
1417	+	// Decode and skip ARM instruction
1418	+	#if (defined(arm) || defined(__arm__))
1419	+	enum {
1420	+	#if (defined(__linux__))
1421	+	ARM_REG_PC = 15,
1422	+	ARM_REG_CPSR = 16
1423	+	#endif
1424	+	};
1425	+	static bool arm_skip_instruction(unsigned long * regs)
1426	+	{
1427	+	unsigned int * pc = (unsigned int *)regs[ARM_REG_PC];
1428	+
1429	+	if (pc == 0)
1430	+	return false;
1431	+
1432	+	#if DEBUG
1433	+	printf("IP: %p [%08x]\n", pc, pc[0]);
1434	+	#endif
1435	+
1436	+	transfer_type_t transfer_type = SIGSEGV_TRANSFER_UNKNOWN;
1437	+	transfer_size_t transfer_size = SIZE_UNKNOWN;
1438	+	enum { op_sdt = 1, op_sdth = 2 };
1439	+	int op = 0;
1440	+
1441	+	// Handle load/store instructions only
1442	+	const unsigned int opcode = pc[0];
1443	+	switch ((opcode >> 25) & 7) {
1444	+	case 0: // Halfword and Signed Data Transfer (LDRH, STRH, LDRSB, LDRSH)
1445	+	op = op_sdth;
1446	+	// Determine transfer size (S/H bits)
1447	+	switch ((opcode >> 5) & 3) {
1448	+	case 0: // SWP instruction
1449	+	break;
1450	+	case 1: // Unsigned halfwords
1451	+	case 3: // Signed halfwords
1452	+	transfer_size = SIZE_WORD;
1453	+	break;
1454	+	case 2: // Signed byte
1455	+	transfer_size = SIZE_BYTE;
1456	+	break;
1457	+	}
1458	+	break;
1459	+	case 2:
1460	+	case 3: // Single Data Transfer (LDR, STR)
1461	+	op = op_sdt;
1462	+	// Determine transfer size (B bit)
1463	+	if (((opcode >> 22) & 1) == 1)
1464	+	transfer_size = SIZE_BYTE;
1465	+	else
1466	+	transfer_size = SIZE_LONG;
1467	+	break;
1468	+	default:
1469	+	// FIXME: support load/store mutliple?
1470	+	return false;
1471	+	}
1472	+
1473	+	// Check for invalid transfer size (SWP instruction?)
1474	+	if (transfer_size == SIZE_UNKNOWN)
1475	+	return false;
1476	+
1477	+	// Determine transfer type (L bit)
1478	+	if (((opcode >> 20) & 1) == 1)
1479	+	transfer_type = SIGSEGV_TRANSFER_LOAD;
1480	+	else
1481	+	transfer_type = SIGSEGV_TRANSFER_STORE;
1482	+
1483	+	// Compute offset
1484	+	int offset;
1485	+	if (((opcode >> 25) & 1) == 0) {
1486	+	if (op == op_sdt)
1487	+	offset = opcode & 0xfff;
1488	+	else if (op == op_sdth) {
1489	+	int rm = opcode & 0xf;
1490	+	if (((opcode >> 22) & 1) == 0) {
1491	+	// register offset
1492	+	offset = regs[rm];
1493	+	}
1494	+	else {
1495	+	// immediate offset
1496	+	offset = ((opcode >> 4) & 0xf0) | (opcode & 0x0f);
1497	+	}
1498	+	}
1499	+	}
1500	+	else {
1501	+	const int rm = opcode & 0xf;
1502	+	const int sh = (opcode >> 7) & 0x1f;
1503	+	if (((opcode >> 4) & 1) == 1) {
1504	+	// we expect only legal load/store instructions
1505	+	printf("FATAL: invalid shift operand\n");
1506	+	return false;
1507	+	}
1508	+	const unsigned int v = regs[rm];
1509	+	switch ((opcode >> 5) & 3) {
1510	+	case 0: // logical shift left
1511	+	offset = sh ? v << sh : v;
1512	+	break;
1513	+	case 1: // logical shift right
1514	+	offset = sh ? v >> sh : 0;
1515	+	break;
1516	+	case 2: // arithmetic shift right
1517	+	if (sh)
1518	+	offset = ((signed int)v) >> sh;
1519	+	else
1520	+	offset = (v & 0x80000000) ? 0xffffffff : 0;
1521	+	break;
1522	+	case 3: // rotate right
1523	+	if (sh)
1524	+	offset = (v >> sh) | (v << (32 - sh));
1525	+	else
1526	+	offset = (v >> 1) | ((regs[ARM_REG_CPSR] << 2) & 0x80000000);
1527	+	break;
1528	+	}
1529	+	}
1530	+	if (((opcode >> 23) & 1) == 0)
1531	+	offset = -offset;
1532	+
1533	+	int rd = (opcode >> 12) & 0xf;
1534	+	int rn = (opcode >> 16) & 0xf;
1535	+	#if DEBUG
1536	+	static const char * reg_names[] = {
1537	+	"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
1538	+	"r9", "r9", "sl", "fp", "ip", "sp", "lr", "pc"
1539	+	};
1540	+	printf("%s %s register %s\n",
1541	+	transfer_size == SIZE_BYTE ? "byte" :
1542	+	transfer_size == SIZE_WORD ? "word" :
1543	+	transfer_size == SIZE_LONG ? "long" : "unknown",
1544	+	transfer_type == SIGSEGV_TRANSFER_LOAD ? "load to" : "store from",
1545	+	reg_names[rd]);
1546	+	#endif
1547	+
1548	+	unsigned int base = regs[rn];
1549	+	if (((opcode >> 24) & 1) == 1)
1550	+	base += offset;
1551	+
1552	+	if (transfer_type == SIGSEGV_TRANSFER_LOAD)
1553	+	regs[rd] = 0;
1554	+
1555	+	if (((opcode >> 24) & 1) == 0)                // post-index addressing
1556	+	regs[rn] += offset;
1557	+	else if (((opcode >> 21) & 1) == 1)   // write-back address into base
1558	+	regs[rn] = base;
1559	+
1560	+	regs[ARM_REG_PC] += 4;
1561	+	return true;
1562	+	}
1563	+	#endif
1564	+
1565	+
1566		// Fallbacks
1567		#ifndef SIGSEGV_FAULT_INSTRUCTION
1568		#define SIGSEGV_FAULT_INSTRUCTION               SIGSEGV_INVALID_PC
#	Line 1273 | Line 1584 | static bool sparc_skip_instruction(unsig
1584		*  SIGSEGV global handler
1585		*/
1586
1276	–	#if defined(HAVE_SIGSEGV_RECOVERY) || defined(HAVE_MACH_EXCEPTIONS)
1587		// This function handles the badaccess to memory.
1588		// It is called from the signal handler or the exception handler.
1589		static bool handle_badaccess(SIGSEGV_FAULT_HANDLER_ARGLIST_1)
1590		{
1591	+	#ifdef HAVE_MACH_EXCEPTIONS
1592	+	// We must match the initial count when writing back the CPU state registers
1593	+	kern_return_t krc;
1594	+	mach_msg_type_number_t count;
1595	+
1596	+	count = SIGSEGV_THREAD_STATE_COUNT;
1597	+	krc = thread_get_state(thread, SIGSEGV_THREAD_STATE_FLAVOR, (thread_state_t)state, &count);
1598	+	MACH_CHECK_ERROR (thread_get_state, krc);
1599	+	#endif
1600	+
1601		sigsegv_address_t fault_address = (sigsegv_address_t)SIGSEGV_FAULT_ADDRESS;
1602		sigsegv_address_t fault_instruction = (sigsegv_address_t)SIGSEGV_FAULT_INSTRUCTION;
1603
#	Line 1296 | Line 1616 | static bool handle_badaccess(SIGSEGV_FAU
1616		// is modified off of the stack, in Mach we
1617		// need to actually call thread_set_state to
1618		// have the register values updated.
1299	–	kern_return_t krc;
1300	–
1619		krc = thread_set_state(thread,
1620	<	MACHINE_THREAD_STATE, (thread_state_t)state,
1621	<	MACHINE_THREAD_STATE_COUNT);
1622	<	MACH_CHECK_ERROR (thread_get_state, krc);
1620	>	SIGSEGV_THREAD_STATE_FLAVOR, (thread_state_t)state,
1621	>	count);
1622	>	MACH_CHECK_ERROR (thread_set_state, krc);
1623		#endif
1624		return true;
1625		}
1626		break;
1627		#endif
1628	+	case SIGSEGV_RETURN_FAILURE:
1629	+	// We can't do anything with the fault_address, dump state?
1630	+	if (sigsegv_state_dumper != 0)
1631	+	sigsegv_state_dumper(fault_address, fault_instruction);
1632	+	break;
1633		}
1311	–
1312	–	// We can't do anything with the fault_address, dump state?
1313	–	if (sigsegv_state_dumper != 0)
1314	–	sigsegv_state_dumper(fault_address, fault_instruction);
1634
1635		return false;
1636		}
1318	–	#endif
1637
1638
1639		/*
#	Line 1352 | Line 1670 | forward_exception(mach_port_t thread_por
1670		mach_port_t port;
1671		exception_behavior_t behavior;
1672		thread_state_flavor_t flavor;
1673	<	thread_state_t thread_state;
1673	>	thread_state_data_t thread_state;
1674		mach_msg_type_number_t thread_state_count;
1675
1676		for (portIndex = 0; portIndex < oldExceptionPorts->maskCount; portIndex++) {
#	Line 1447 | Line 1765 | catch_exception_raise(mach_port_t except
1765		exception_data_t code,
1766		mach_msg_type_number_t codeCount)
1767		{
1768	<	ppc_thread_state_t state;
1768	>	SIGSEGV_THREAD_STATE_TYPE state;
1769		kern_return_t krc;
1770
1771		if ((exception == EXC_BAD_ACCESS)  && (codeCount >= 2)) {
#	Line 1586 | Line 1904 | static bool sigsegv_do_install_handler(s
1904		// addressing modes) used in PPC instructions, you will need the
1905		// GPR state anyway.
1906		krc = thread_set_exception_ports(mach_thread_self(), EXC_MASK_BAD_ACCESS, _exceptionPort,
1907	<	EXCEPTION_DEFAULT, MACHINE_THREAD_STATE);
1907	>	EXCEPTION_DEFAULT, SIGSEGV_THREAD_STATE_FLAVOR);
1908		if (krc != KERN_SUCCESS) {
1909		mach_error("thread_set_exception_ports", krc);
1910		return false;
#	Line 1609 | Line 1927 | static bool sigsegv_do_install_handler(s
1927		}
1928		#endif
1929
1930	+	#ifdef HAVE_WIN32_EXCEPTIONS
1931	+	static LONG WINAPI main_exception_filter(EXCEPTION_POINTERS *ExceptionInfo)
1932	+	{
1933	+	if (sigsegv_fault_handler != NULL
1934	+	&& ExceptionInfo->ExceptionRecord->ExceptionCode == EXCEPTION_ACCESS_VIOLATION
1935	+	&& ExceptionInfo->ExceptionRecord->NumberParameters == 2
1936	+	&& handle_badaccess(ExceptionInfo))
1937	+	return EXCEPTION_CONTINUE_EXECUTION;
1938	+
1939	+	return EXCEPTION_CONTINUE_SEARCH;
1940	+	}
1941	+
1942	+	#if defined __CYGWIN__ && defined __i386__
1943	+	/* In Cygwin programs, SetUnhandledExceptionFilter has no effect because Cygwin
1944	+	installs a global exception handler.  We have to dig deep in order to install
1945	+	our main_exception_filter.  */
1946	+
1947	+	/* Data structures for the current thread's exception handler chain.
1948	+	On the x86 Windows uses register fs, offset 0 to point to the current
1949	+	exception handler; Cygwin mucks with it, so we must do the same... :-/ */
1950	+
1951	+	/* Magic taken from winsup/cygwin/include/exceptions.h.  */
1952	+
1953	+	struct exception_list {
1954	+	struct exception_list *prev;
1955	+	int (*handler) (EXCEPTION_RECORD *, void *, CONTEXT *, void *);
1956	+	};
1957	+	typedef struct exception_list exception_list;
1958	+
1959	+	/* Magic taken from winsup/cygwin/exceptions.cc.  */
1960	+
1961	+	__asm__ (".equ __except_list,0");
1962	+
1963	+	extern exception_list *_except_list __asm__ ("%fs:__except_list");
1964	+
1965	+	/* For debugging.  _except_list is not otherwise accessible from gdb.  */
1966	+	static exception_list *
1967	+	debug_get_except_list ()
1968	+	{
1969	+	return _except_list;
1970	+	}
1971	+
1972	+	/* Cygwin's original exception handler.  */
1973	+	static int (*cygwin_exception_handler) (EXCEPTION_RECORD *, void *, CONTEXT *, void *);
1974	+
1975	+	/* Our exception handler.  */
1976	+	static int
1977	+	libsigsegv_exception_handler (EXCEPTION_RECORD *exception, void *frame, CONTEXT *context, void *dispatch)
1978	+	{
1979	+	EXCEPTION_POINTERS ExceptionInfo;
1980	+	ExceptionInfo.ExceptionRecord = exception;
1981	+	ExceptionInfo.ContextRecord = context;
1982	+	if (main_exception_filter (&ExceptionInfo) == EXCEPTION_CONTINUE_SEARCH)
1983	+	return cygwin_exception_handler (exception, frame, context, dispatch);
1984	+	else
1985	+	return 0;
1986	+	}
1987	+
1988	+	static void
1989	+	do_install_main_exception_filter ()
1990	+	{
1991	+	/* We cannot insert any handler into the chain, because such handlers
1992	+	must lie on the stack (?).  Instead, we have to replace(!) Cygwin's
1993	+	global exception handler.  */
1994	+	cygwin_exception_handler = _except_list->handler;
1995	+	_except_list->handler = libsigsegv_exception_handler;
1996	+	}
1997	+
1998	+	#else
1999	+
2000	+	static void
2001	+	do_install_main_exception_filter ()
2002	+	{
2003	+	SetUnhandledExceptionFilter ((LPTOP_LEVEL_EXCEPTION_FILTER) &main_exception_filter);
2004	+	}
2005	+	#endif
2006	+
2007	+	static bool sigsegv_do_install_handler(sigsegv_fault_handler_t handler)
2008	+	{
2009	+	static bool main_exception_filter_installed = false;
2010	+	if (!main_exception_filter_installed) {
2011	+	do_install_main_exception_filter();
2012	+	main_exception_filter_installed = true;
2013	+	}
2014	+	sigsegv_fault_handler = handler;
2015	+	return true;
2016	+	}
2017	+	#endif
2018	+
2019		bool sigsegv_install_handler(sigsegv_fault_handler_t handler)
2020		{
2021		#if defined(HAVE_SIGSEGV_RECOVERY)
#	Line 1619 | Line 2026 | bool sigsegv_install_handler(sigsegv_fau
2026		if (success)
2027		sigsegv_fault_handler = handler;
2028		return success;
2029	<	#elif defined(HAVE_MACH_EXCEPTIONS)
2029	>	#elif defined(HAVE_MACH_EXCEPTIONS) || defined(HAVE_WIN32_EXCEPTIONS)
2030		return sigsegv_do_install_handler(handler);
2031		#else
2032		// FAIL: no siginfo_t nor sigcontext subterfuge is available
#	Line 1645 | Line 2052 | void sigsegv_deinstall_handler(void)
2052		SIGSEGV_ALL_SIGNALS
2053		#undef FAULT_HANDLER
2054		#endif
2055	+	#ifdef HAVE_WIN32_EXCEPTIONS
2056	+	sigsegv_fault_handler = NULL;
2057	+	#endif
2058		}
2059
2060
#	Line 1666 | Line 2076 | void sigsegv_set_dump_state(sigsegv_stat
2076		#include <stdio.h>
2077		#include <stdlib.h>
2078		#include <fcntl.h>
2079	+	#ifdef HAVE_SYS_MMAN_H
2080		#include <sys/mman.h>
2081	+	#endif
2082		#include "vm_alloc.h"
2083
2084		const int REF_INDEX = 123;
#	Line 1709 | Line 2121 | static sigsegv_return_t sigsegv_test_han
2121		#ifdef HAVE_SIGSEGV_SKIP_INSTRUCTION
2122		static sigsegv_return_t sigsegv_insn_handler(sigsegv_address_t fault_address, sigsegv_address_t instruction_address)
2123		{
2124	+	#if DEBUG
2125	+	printf("sigsegv_insn_handler(%p, %p)\n", fault_address, instruction_address);
2126	+	#endif
2127		if (((unsigned long)fault_address - (unsigned long)page) < page_size) {
2128		#ifdef __GNUC__
2129		// Make sure reported fault instruction address falls into
#	Line 1787 | Line 2202 | int main(void)
2202		if (vm_init() < 0)
2203		return 1;
2204
2205	<	page_size = getpagesize();
2205	>	page_size = vm_get_page_size();
2206		if ((page = (char *)vm_acquire(page_size)) == VM_MAP_FAILED)
2207		return 2;
2208
#	Line 1843 | Line 2258 | int main(void)
2258		TEST_SKIP_INSTRUCTION(unsigned short);
2259		TEST_SKIP_INSTRUCTION(unsigned int);
2260		TEST_SKIP_INSTRUCTION(unsigned long);
2261	+	TEST_SKIP_INSTRUCTION(signed char);
2262	+	TEST_SKIP_INSTRUCTION(signed short);
2263	+	TEST_SKIP_INSTRUCTION(signed int);
2264	+	TEST_SKIP_INSTRUCTION(signed long);
2265		L_e_region2:
2266
2267		if (!arch_insn_skipper_tests())

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