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root/cebix/BasiliskII/src/Unix/sigsegv.cpp
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Comparing BasiliskII/src/Unix/sigsegv.cpp (file contents):
Revision 1.42 by gbeauche, 2004-01-19T16:59:13Z vs.
Revision 1.49 by gbeauche, 2004-12-02T23:29:52Z

# Line 97 | Line 97 | struct instruction_t {
97          char                            ra, rd;
98   };
99  
100 < static void powerpc_decode_instruction(instruction_t *instruction, unsigned int nip, unsigned int * gpr)
100 > static void powerpc_decode_instruction(instruction_t *instruction, unsigned int nip, unsigned long * gpr)
101   {
102          // Get opcode and divide into fields
103 <        unsigned int opcode = *((unsigned int *)nip);
103 >        unsigned int opcode = *((unsigned int *)(unsigned long)nip);
104          unsigned int primop = opcode >> 26;
105          unsigned int exop = (opcode >> 1) & 0x3ff;
106          unsigned int ra = (opcode >> 16) & 0x1f;
# Line 174 | Line 174 | static void powerpc_decode_instruction(i
174                  transfer_type = SIGSEGV_TRANSFER_STORE; transfer_size = SIZE_WORD; addr_mode = MODE_NORM; break;
175          case 45:        // sthu
176                  transfer_type = SIGSEGV_TRANSFER_STORE; transfer_size = SIZE_WORD; addr_mode = MODE_U; break;
177 +        case 58:        // ld, ldu, lwa
178 +                transfer_type = SIGSEGV_TRANSFER_LOAD;
179 +                transfer_size = SIZE_QUAD;
180 +                addr_mode = ((opcode & 3) == 1) ? MODE_U : MODE_NORM;
181 +                imm &= ~3;
182 +                break;
183 +        case 62:        // std, stdu, stq
184 +                transfer_type = SIGSEGV_TRANSFER_STORE;
185 +                transfer_size = SIZE_QUAD;
186 +                addr_mode = ((opcode & 3) == 1) ? MODE_U : MODE_NORM;
187 +                imm &= ~3;
188 +                break;
189          }
190          
191          // Calculate effective address
# Line 274 | Line 286 | static void powerpc_decode_instruction(i
286   #include <sys/ucontext.h>
287   #define SIGSEGV_CONTEXT_REGS                    (((ucontext_t *)scp)->uc_mcontext.regs)
288   #define SIGSEGV_FAULT_INSTRUCTION               (SIGSEGV_CONTEXT_REGS->nip)
289 < #define SIGSEGV_REGISTER_FILE                   (unsigned int *)&SIGSEGV_CONTEXT_REGS->nip, (unsigned int *)(SIGSEGV_CONTEXT_REGS->gpr)
289 > #define SIGSEGV_REGISTER_FILE                   (unsigned long *)&SIGSEGV_CONTEXT_REGS->nip, (unsigned long *)(SIGSEGV_CONTEXT_REGS->gpr)
290   #define SIGSEGV_SKIP_INSTRUCTION                powerpc_skip_instruction
291   #endif
292   #if (defined(hppa) || defined(__hppa__))
# Line 285 | Line 297 | static void powerpc_decode_instruction(i
297   #include <asm/ucontext.h> /* use kernel structure, glibc may not be in sync */
298   #define SIGSEGV_CONTEXT_REGS                    (((struct ucontext *)scp)->uc_mcontext)
299   #define SIGSEGV_FAULT_INSTRUCTION               (SIGSEGV_CONTEXT_REGS.arm_pc)
300 + #define SIGSEGV_REGISTER_FILE                   (&SIGSEGV_CONTEXT_REGS.arm_r0)
301 + #define SIGSEGV_SKIP_INSTRUCTION                arm_skip_instruction
302   #endif
303   #endif
304   #endif
# Line 315 | Line 329 | static void powerpc_decode_instruction(i
329   #define SIGSEGV_FAULT_HANDLER_ARGS              sig, scp
330   #define SIGSEGV_FAULT_ADDRESS                   scp->regs->dar
331   #define SIGSEGV_FAULT_INSTRUCTION               scp->regs->nip
332 < #define SIGSEGV_REGISTER_FILE                   (unsigned int *)&scp->regs->nip, (unsigned int *)(scp->regs->gpr)
332 > #define SIGSEGV_REGISTER_FILE                   (unsigned long *)&scp->regs->nip, (unsigned long *)(scp->regs->gpr)
333   #define SIGSEGV_SKIP_INSTRUCTION                powerpc_skip_instruction
334   #endif
335   #if (defined(alpha) || defined(__alpha__))
# Line 331 | Line 345 | static void powerpc_decode_instruction(i
345   #define SIGSEGV_FAULT_HANDLER_ARGS              &sc
346   #define SIGSEGV_FAULT_ADDRESS                   scp->fault_address
347   #define SIGSEGV_FAULT_INSTRUCTION               scp->arm_pc
348 + #define SIGSEGV_REGISTER_FILE                   &scp->arm_r0
349 + #define SIGSEGV_SKIP_INSTRUCTION                arm_skip_instruction
350   #endif
351   #endif
352  
# Line 477 | Line 493 | static sigsegv_address_t get_fault_addre
493   #endif
494   #endif
495  
496 + #if HAVE_WIN32_EXCEPTIONS
497 + #define WIN32_LEAN_AND_MEAN /* avoid including junk */
498 + #include <windows.h>
499 + #include <winerror.h>
500 +
501 + #define SIGSEGV_FAULT_HANDLER_ARGLIST   EXCEPTION_POINTERS *ExceptionInfo
502 + #define SIGSEGV_FAULT_HANDLER_ARGS              ExceptionInfo
503 + #define SIGSEGV_FAULT_ADDRESS                   ExceptionInfo->ExceptionRecord->ExceptionInformation[1]
504 + #define SIGSEGV_CONTEXT_REGS                    ExceptionInfo->ContextRecord
505 + #define SIGSEGV_FAULT_INSTRUCTION               SIGSEGV_CONTEXT_REGS->Eip
506 + #define SIGSEGV_REGISTER_FILE                   ((unsigned long *)&SIGSEGV_CONTEXT_REGS->Edi)
507 + #define SIGSEGV_SKIP_INSTRUCTION                ix86_skip_instruction
508 + #endif
509 +
510   #if HAVE_MACH_EXCEPTIONS
511  
512   // This can easily be extended to other Mach systems, but really who
# Line 669 | Line 699 | enum {
699   #endif
700   };
701   #endif
702 + #if defined(_WIN32)
703 + enum {
704 + #if (defined(i386) || defined(__i386__))
705 +        X86_REG_EIP = 7,
706 +        X86_REG_EAX = 5,
707 +        X86_REG_ECX = 4,
708 +        X86_REG_EDX = 3,
709 +        X86_REG_EBX = 2,
710 +        X86_REG_ESP = 10,
711 +        X86_REG_EBP = 6,
712 +        X86_REG_ESI = 1,
713 +        X86_REG_EDI = 0
714 + #endif
715 + };
716 + #endif
717   // FIXME: this is partly redundant with the instruction decoding phase
718   // to discover transfer type and register number
719   static inline int ix86_step_over_modrm(unsigned char * p)
# Line 762 | Line 807 | static bool ix86_skip_instruction(unsign
807   #endif
808  
809          // Decode instruction
810 +        int target_size = SIZE_UNKNOWN;
811          switch (eip[0]) {
812          case 0x0f:
813 +                target_size = transfer_size;
814              switch (eip[1]) {
815 +                case 0xbe: // MOVSX r32, r/m8
816              case 0xb6: // MOVZX r32, r/m8
817 +                        transfer_size = SIZE_BYTE;
818 +                        goto do_mov_extend;
819 +                case 0xbf: // MOVSX r32, r/m16
820              case 0xb7: // MOVZX r32, r/m16
821 <                switch (eip[2] & 0xc0) {
822 <                case 0x80:
823 <                    reg = (eip[2] >> 3) & 7;
824 <                    transfer_type = SIGSEGV_TRANSFER_LOAD;
825 <                    break;
826 <                case 0x40:
827 <                    reg = (eip[2] >> 3) & 7;
828 <                    transfer_type = SIGSEGV_TRANSFER_LOAD;
829 <                    break;
830 <                case 0x00:
831 <                    reg = (eip[2] >> 3) & 7;
832 <                    transfer_type = SIGSEGV_TRANSFER_LOAD;
833 <                    break;
834 <                }
835 <                len += 3 + ix86_step_over_modrm(eip + 2);
836 <                break;
821 >                        transfer_size = SIZE_WORD;
822 >                        goto do_mov_extend;
823 >                  do_mov_extend:
824 >                        switch (eip[2] & 0xc0) {
825 >                        case 0x80:
826 >                                reg = (eip[2] >> 3) & 7;
827 >                                transfer_type = SIGSEGV_TRANSFER_LOAD;
828 >                                break;
829 >                        case 0x40:
830 >                                reg = (eip[2] >> 3) & 7;
831 >                                transfer_type = SIGSEGV_TRANSFER_LOAD;
832 >                                break;
833 >                        case 0x00:
834 >                                reg = (eip[2] >> 3) & 7;
835 >                                transfer_type = SIGSEGV_TRANSFER_LOAD;
836 >                                break;
837 >                        }
838 >                        len += 3 + ix86_step_over_modrm(eip + 2);
839 >                        break;
840              }
841            break;
842          case 0x8a: // MOV r8, r/m8
# Line 824 | Line 878 | static bool ix86_skip_instruction(unsign
878                  len += 2 + ix86_step_over_modrm(eip + 1);
879                  break;
880          }
881 +        if (target_size == SIZE_UNKNOWN)
882 +                target_size = transfer_size;
883  
884          if (transfer_type == SIGSEGV_TRANSFER_UNKNOWN) {
885                  // Unknown machine code, let it crash. Then patch the decoder
# Line 851 | Line 907 | static bool ix86_skip_instruction(unsign
907                  // Set 0 to the relevant register part
908                  // NOTE: this is only valid for MOV alike instructions
909                  int rloc = x86_reg_map[reg];
910 <                switch (transfer_size) {
910 >                switch (target_size) {
911                  case SIZE_BYTE:
912                          if (has_rex || reg < 4)
913                                  regs[rloc] = (regs[rloc] & ~0x00ffL);
# Line 905 | Line 961 | static bool ix86_skip_instruction(unsign
961                          "r12", "r13", "r14", "r15",
962                  };
963                  const char * reg_str = NULL;
964 <                switch (transfer_size) {
964 >                switch (target_size) {
965                  case SIZE_BYTE:
966                          reg_str = x86_byte_reg_str_map[(!has_rex && reg >= 4 ? 12 : 0) + reg];
967                          break;
# Line 928 | Line 984 | static bool ix86_skip_instruction(unsign
984  
985   // Decode and skip PPC instruction
986   #if (defined(powerpc) || defined(__powerpc__) || defined(__ppc__))
987 < static bool powerpc_skip_instruction(unsigned int * nip_p, unsigned int * regs)
987 > static bool powerpc_skip_instruction(unsigned long * nip_p, unsigned long * regs)
988   {
989          instruction_t instr;
990          powerpc_decode_instruction(&instr, *nip_p, regs);
# Line 940 | Line 996 | static bool powerpc_skip_instruction(uns
996  
997   #if DEBUG
998          printf("%08x: %s %s access", *nip_p,
999 <                   instr.transfer_size == SIZE_BYTE ? "byte" : instr.transfer_size == SIZE_WORD ? "word" : "long",
999 >                   instr.transfer_size == SIZE_BYTE ? "byte" :
1000 >                   instr.transfer_size == SIZE_WORD ? "word" :
1001 >                   instr.transfer_size == SIZE_LONG ? "long" : "quad",
1002                     instr.transfer_type == SIGSEGV_TRANSFER_LOAD ? "read" : "write");
1003          
1004          if (instr.addr_mode == MODE_U || instr.addr_mode == MODE_UX)
# Line 1252 | Line 1310 | static bool sparc_skip_instruction(unsig
1310   #endif
1311   #endif
1312  
1313 + // Decode and skip ARM instruction
1314 + #if (defined(arm) || defined(__arm__))
1315 + enum {
1316 + #if (defined(__linux__))
1317 +  ARM_REG_PC = 15,
1318 +  ARM_REG_CPSR = 16
1319 + #endif
1320 + };
1321 + static bool arm_skip_instruction(unsigned long * regs)
1322 + {
1323 +  unsigned int * pc = (unsigned int *)regs[ARM_REG_PC];
1324 +
1325 +  if (pc == 0)
1326 +        return false;
1327 +
1328 + #if DEBUG
1329 +  printf("IP: %p [%08x]\n", pc, pc[0]);
1330 + #endif
1331 +
1332 +  transfer_type_t transfer_type = SIGSEGV_TRANSFER_UNKNOWN;
1333 +  transfer_size_t transfer_size = SIZE_UNKNOWN;
1334 +  enum { op_sdt = 1, op_sdth = 2 };
1335 +  int op = 0;
1336 +
1337 +  // Handle load/store instructions only
1338 +  const unsigned int opcode = pc[0];
1339 +  switch ((opcode >> 25) & 7) {
1340 +  case 0: // Halfword and Signed Data Transfer (LDRH, STRH, LDRSB, LDRSH)
1341 +        op = op_sdth;
1342 +        // Determine transfer size (S/H bits)
1343 +        switch ((opcode >> 5) & 3) {
1344 +        case 0: // SWP instruction
1345 +          break;
1346 +        case 1: // Unsigned halfwords
1347 +        case 3: // Signed halfwords
1348 +          transfer_size = SIZE_WORD;
1349 +          break;
1350 +        case 2: // Signed byte
1351 +          transfer_size = SIZE_BYTE;
1352 +          break;
1353 +        }
1354 +        break;
1355 +  case 2:
1356 +  case 3: // Single Data Transfer (LDR, STR)
1357 +        op = op_sdt;
1358 +        // Determine transfer size (B bit)
1359 +        if (((opcode >> 22) & 1) == 1)
1360 +          transfer_size = SIZE_BYTE;
1361 +        else
1362 +          transfer_size = SIZE_LONG;
1363 +        break;
1364 +  default:
1365 +        // FIXME: support load/store mutliple?
1366 +        return false;
1367 +  }
1368 +
1369 +  // Check for invalid transfer size (SWP instruction?)
1370 +  if (transfer_size == SIZE_UNKNOWN)
1371 +        return false;
1372 +
1373 +  // Determine transfer type (L bit)
1374 +  if (((opcode >> 20) & 1) == 1)
1375 +        transfer_type = SIGSEGV_TRANSFER_LOAD;
1376 +  else
1377 +        transfer_type = SIGSEGV_TRANSFER_STORE;
1378 +
1379 +  // Compute offset
1380 +  int offset;
1381 +  if (((opcode >> 25) & 1) == 0) {
1382 +        if (op == op_sdt)
1383 +          offset = opcode & 0xfff;
1384 +        else if (op == op_sdth) {
1385 +          int rm = opcode & 0xf;
1386 +          if (((opcode >> 22) & 1) == 0) {
1387 +                // register offset
1388 +                offset = regs[rm];
1389 +          }
1390 +          else {
1391 +                // immediate offset
1392 +                offset = ((opcode >> 4) & 0xf0) | (opcode & 0x0f);
1393 +          }
1394 +        }
1395 +  }
1396 +  else {
1397 +        const int rm = opcode & 0xf;
1398 +        const int sh = (opcode >> 7) & 0x1f;
1399 +        if (((opcode >> 4) & 1) == 1) {
1400 +          // we expect only legal load/store instructions
1401 +          printf("FATAL: invalid shift operand\n");
1402 +          return false;
1403 +        }
1404 +        const unsigned int v = regs[rm];
1405 +        switch ((opcode >> 5) & 3) {
1406 +        case 0: // logical shift left
1407 +          offset = sh ? v << sh : v;
1408 +          break;
1409 +        case 1: // logical shift right
1410 +          offset = sh ? v >> sh : 0;
1411 +          break;
1412 +        case 2: // arithmetic shift right
1413 +          if (sh)
1414 +                offset = ((signed int)v) >> sh;
1415 +          else
1416 +                offset = (v & 0x80000000) ? 0xffffffff : 0;
1417 +          break;
1418 +        case 3: // rotate right
1419 +          if (sh)
1420 +                offset = (v >> sh) | (v << (32 - sh));
1421 +          else
1422 +                offset = (v >> 1) | ((regs[ARM_REG_CPSR] << 2) & 0x80000000);
1423 +          break;
1424 +        }
1425 +  }
1426 +  if (((opcode >> 23) & 1) == 0)
1427 +        offset = -offset;
1428 +
1429 +  int rd = (opcode >> 12) & 0xf;
1430 +  int rn = (opcode >> 16) & 0xf;
1431 + #if DEBUG
1432 +  static const char * reg_names[] = {
1433 +        "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
1434 +        "r9", "r9", "sl", "fp", "ip", "sp", "lr", "pc"
1435 +  };
1436 +  printf("%s %s register %s\n",
1437 +                 transfer_size == SIZE_BYTE ? "byte" :
1438 +                 transfer_size == SIZE_WORD ? "word" :
1439 +                 transfer_size == SIZE_LONG ? "long" : "unknown",
1440 +                 transfer_type == SIGSEGV_TRANSFER_LOAD ? "load to" : "store from",
1441 +                 reg_names[rd]);
1442 + #endif
1443 +
1444 +  unsigned int base = regs[rn];
1445 +  if (((opcode >> 24) & 1) == 1)
1446 +        base += offset;
1447 +
1448 +  if (transfer_type == SIGSEGV_TRANSFER_LOAD)
1449 +        regs[rd] = 0;
1450 +
1451 +  if (((opcode >> 24) & 1) == 0)                // post-index addressing
1452 +        regs[rn] += offset;
1453 +  else if (((opcode >> 21) & 1) == 1)   // write-back address into base
1454 +        regs[rn] = base;
1455 +
1456 +  regs[ARM_REG_PC] += 4;
1457 +  return true;
1458 + }
1459 + #endif
1460 +
1461 +
1462   // Fallbacks
1463   #ifndef SIGSEGV_FAULT_INSTRUCTION
1464   #define SIGSEGV_FAULT_INSTRUCTION               SIGSEGV_INVALID_PC
# Line 1273 | Line 1480 | static bool sparc_skip_instruction(unsig
1480   *  SIGSEGV global handler
1481   */
1482  
1276 – #if defined(HAVE_SIGSEGV_RECOVERY) || defined(HAVE_MACH_EXCEPTIONS)
1483   // This function handles the badaccess to memory.
1484   // It is called from the signal handler or the exception handler.
1485   static bool handle_badaccess(SIGSEGV_FAULT_HANDLER_ARGLIST_1)
# Line 1307 | Line 1513 | static bool handle_badaccess(SIGSEGV_FAU
1513                  }
1514                  break;
1515   #endif
1516 +        case SIGSEGV_RETURN_FAILURE:
1517 +                return false;
1518          }
1519          
1520          // We can't do anything with the fault_address, dump state?
# Line 1315 | Line 1523 | static bool handle_badaccess(SIGSEGV_FAU
1523  
1524          return false;
1525   }
1318 – #endif
1526  
1527  
1528   /*
# Line 1609 | Line 1816 | static bool sigsegv_do_install_handler(s
1816   }
1817   #endif
1818  
1819 + #ifdef HAVE_WIN32_EXCEPTIONS
1820 + static LONG WINAPI main_exception_filter(EXCEPTION_POINTERS *ExceptionInfo)
1821 + {
1822 +        if (sigsegv_fault_handler != NULL
1823 +                && ExceptionInfo->ExceptionRecord->ExceptionCode == EXCEPTION_ACCESS_VIOLATION
1824 +                && ExceptionInfo->ExceptionRecord->NumberParameters == 2
1825 +                && handle_badaccess(ExceptionInfo))
1826 +                return EXCEPTION_CONTINUE_EXECUTION;
1827 +
1828 +        return EXCEPTION_CONTINUE_SEARCH;
1829 + }
1830 +
1831 + #if defined __CYGWIN__ && defined __i386__
1832 + /* In Cygwin programs, SetUnhandledExceptionFilter has no effect because Cygwin
1833 +   installs a global exception handler.  We have to dig deep in order to install
1834 +   our main_exception_filter.  */
1835 +
1836 + /* Data structures for the current thread's exception handler chain.
1837 +   On the x86 Windows uses register fs, offset 0 to point to the current
1838 +   exception handler; Cygwin mucks with it, so we must do the same... :-/ */
1839 +
1840 + /* Magic taken from winsup/cygwin/include/exceptions.h.  */
1841 +
1842 + struct exception_list {
1843 +    struct exception_list *prev;
1844 +    int (*handler) (EXCEPTION_RECORD *, void *, CONTEXT *, void *);
1845 + };
1846 + typedef struct exception_list exception_list;
1847 +
1848 + /* Magic taken from winsup/cygwin/exceptions.cc.  */
1849 +
1850 + __asm__ (".equ __except_list,0");
1851 +
1852 + extern exception_list *_except_list __asm__ ("%fs:__except_list");
1853 +
1854 + /* For debugging.  _except_list is not otherwise accessible from gdb.  */
1855 + static exception_list *
1856 + debug_get_except_list ()
1857 + {
1858 +  return _except_list;
1859 + }
1860 +
1861 + /* Cygwin's original exception handler.  */
1862 + static int (*cygwin_exception_handler) (EXCEPTION_RECORD *, void *, CONTEXT *, void *);
1863 +
1864 + /* Our exception handler.  */
1865 + static int
1866 + libsigsegv_exception_handler (EXCEPTION_RECORD *exception, void *frame, CONTEXT *context, void *dispatch)
1867 + {
1868 +  EXCEPTION_POINTERS ExceptionInfo;
1869 +  ExceptionInfo.ExceptionRecord = exception;
1870 +  ExceptionInfo.ContextRecord = context;
1871 +  if (main_exception_filter (&ExceptionInfo) == EXCEPTION_CONTINUE_SEARCH)
1872 +    return cygwin_exception_handler (exception, frame, context, dispatch);
1873 +  else
1874 +    return 0;
1875 + }
1876 +
1877 + static void
1878 + do_install_main_exception_filter ()
1879 + {
1880 +  /* We cannot insert any handler into the chain, because such handlers
1881 +     must lie on the stack (?).  Instead, we have to replace(!) Cygwin's
1882 +     global exception handler.  */
1883 +  cygwin_exception_handler = _except_list->handler;
1884 +  _except_list->handler = libsigsegv_exception_handler;
1885 + }
1886 +
1887 + #else
1888 +
1889 + static void
1890 + do_install_main_exception_filter ()
1891 + {
1892 +  SetUnhandledExceptionFilter ((LPTOP_LEVEL_EXCEPTION_FILTER) &main_exception_filter);
1893 + }
1894 + #endif
1895 +
1896 + static bool sigsegv_do_install_handler(sigsegv_fault_handler_t handler)
1897 + {
1898 +        static bool main_exception_filter_installed = false;
1899 +        if (!main_exception_filter_installed) {
1900 +                do_install_main_exception_filter();
1901 +                main_exception_filter_installed = true;
1902 +        }
1903 +        sigsegv_fault_handler = handler;
1904 +        return true;
1905 + }
1906 + #endif
1907 +
1908   bool sigsegv_install_handler(sigsegv_fault_handler_t handler)
1909   {
1910   #if defined(HAVE_SIGSEGV_RECOVERY)
# Line 1619 | Line 1915 | bool sigsegv_install_handler(sigsegv_fau
1915          if (success)
1916              sigsegv_fault_handler = handler;
1917          return success;
1918 < #elif defined(HAVE_MACH_EXCEPTIONS)
1918 > #elif defined(HAVE_MACH_EXCEPTIONS) || defined(HAVE_WIN32_EXCEPTIONS)
1919          return sigsegv_do_install_handler(handler);
1920   #else
1921          // FAIL: no siginfo_t nor sigcontext subterfuge is available
# Line 1645 | Line 1941 | void sigsegv_deinstall_handler(void)
1941          SIGSEGV_ALL_SIGNALS
1942   #undef FAULT_HANDLER
1943   #endif
1944 + #ifdef HAVE_WIN32_EXCEPTIONS
1945 +        sigsegv_fault_handler = NULL;
1946 + #endif
1947   }
1948  
1949  
# Line 1666 | Line 1965 | void sigsegv_set_dump_state(sigsegv_stat
1965   #include <stdio.h>
1966   #include <stdlib.h>
1967   #include <fcntl.h>
1968 + #ifdef HAVE_SYS_MMAN_H
1969   #include <sys/mman.h>
1970 + #endif
1971   #include "vm_alloc.h"
1972  
1973   const int REF_INDEX = 123;
# Line 1709 | Line 2010 | static sigsegv_return_t sigsegv_test_han
2010   #ifdef HAVE_SIGSEGV_SKIP_INSTRUCTION
2011   static sigsegv_return_t sigsegv_insn_handler(sigsegv_address_t fault_address, sigsegv_address_t instruction_address)
2012   {
2013 + #if DEBUG
2014 +        printf("sigsegv_insn_handler(%p, %p)\n", fault_address, instruction_address);
2015 + #endif
2016          if (((unsigned long)fault_address - (unsigned long)page) < page_size) {
2017   #ifdef __GNUC__
2018                  // Make sure reported fault instruction address falls into
# Line 1787 | Line 2091 | int main(void)
2091          if (vm_init() < 0)
2092                  return 1;
2093  
2094 + #ifdef _WIN32
2095 +        page_size = 4096;
2096 + #else
2097          page_size = getpagesize();
2098 + #endif
2099          if ((page = (char *)vm_acquire(page_size)) == VM_MAP_FAILED)
2100                  return 2;
2101          
# Line 1843 | Line 2151 | int main(void)
2151          TEST_SKIP_INSTRUCTION(unsigned short);
2152          TEST_SKIP_INSTRUCTION(unsigned int);
2153          TEST_SKIP_INSTRUCTION(unsigned long);
2154 +        TEST_SKIP_INSTRUCTION(signed char);
2155 +        TEST_SKIP_INSTRUCTION(signed short);
2156 +        TEST_SKIP_INSTRUCTION(signed int);
2157 +        TEST_SKIP_INSTRUCTION(signed long);
2158   L_e_region2:
2159  
2160          if (!arch_insn_skipper_tests())

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