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Comparing BasiliskII/src/Unix/sigsegv.cpp (file contents):
Revision 1.35 by gbeauche, 2003-11-10T23:54:31Z vs.
Revision 1.42 by gbeauche, 2004-01-19T16:59:13Z

# Line 10 | Line 10
10   *    tjw@omnigroup.com Sun, 4 Jun 2000
11   *    www.omnigroup.com/mailman/archive/macosx-dev/2000-June/002030.html
12   *
13 < *  Basilisk II (C) 1997-2002 Christian Bauer
13 > *  Basilisk II (C) 1997-2004 Christian Bauer
14   *
15   *  This program is free software; you can redistribute it and/or modify
16   *  it under the terms of the GNU General Public License as published by
# Line 36 | Line 36
36   #endif
37  
38   #include <list>
39 + #include <stdio.h>
40   #include <signal.h>
41   #include "sigsegv.h"
42  
# Line 222 | Line 223 | static void powerpc_decode_instruction(i
223   #define SIGSEGV_FAULT_HANDLER_ARGLIST_1 siginfo_t *sip, void *scp
224   #define SIGSEGV_FAULT_HANDLER_ARGS              sip, scp
225   #define SIGSEGV_FAULT_ADDRESS                   sip->si_addr
226 + #if (defined(sgi) || defined(__sgi))
227 + #include <ucontext.h>
228 + #define SIGSEGV_CONTEXT_REGS                    (((ucontext_t *)scp)->uc_mcontext.gregs)
229 + #define SIGSEGV_FAULT_INSTRUCTION               (unsigned long)SIGSEGV_CONTEXT_REGS[CTX_EPC]
230 + #if (defined(mips) || defined(__mips))
231 + #define SIGSEGV_REGISTER_FILE                   SIGSEGV_CONTEXT_REGS
232 + #define SIGSEGV_SKIP_INSTRUCTION                mips_skip_instruction
233 + #endif
234 + #endif
235   #if defined(__sun__)
236   #if (defined(sparc) || defined(__sparc__))
237 + #include <sys/stack.h>
238 + #include <sys/regset.h>
239   #include <sys/ucontext.h>
240   #define SIGSEGV_CONTEXT_REGS                    (((ucontext_t *)scp)->uc_mcontext.gregs)
241   #define SIGSEGV_FAULT_INSTRUCTION               SIGSEGV_CONTEXT_REGS[REG_PC]
242 + #define SIGSEGV_SPARC_GWINDOWS                  (((ucontext_t *)scp)->uc_mcontext.gwins)
243 + #define SIGSEGV_SPARC_RWINDOW                   (struct rwindow *)((char *)SIGSEGV_CONTEXT_REGS[REG_SP] + STACK_BIAS)
244 + #define SIGSEGV_REGISTER_FILE                   ((unsigned long *)SIGSEGV_CONTEXT_REGS), SIGSEGV_SPARC_GWINDOWS, SIGSEGV_SPARC_RWINDOW
245 + #define SIGSEGV_SKIP_INSTRUCTION                sparc_skip_instruction
246   #endif
247   #endif
248   #if defined(__FreeBSD__)
# Line 261 | Line 277 | static void powerpc_decode_instruction(i
277   #define SIGSEGV_REGISTER_FILE                   (unsigned int *)&SIGSEGV_CONTEXT_REGS->nip, (unsigned int *)(SIGSEGV_CONTEXT_REGS->gpr)
278   #define SIGSEGV_SKIP_INSTRUCTION                powerpc_skip_instruction
279   #endif
280 + #if (defined(hppa) || defined(__hppa__))
281 + #undef  SIGSEGV_FAULT_ADDRESS
282 + #define SIGSEGV_FAULT_ADDRESS                   sip->si_ptr
283 + #endif
284 + #if (defined(arm) || defined(__arm__))
285 + #include <asm/ucontext.h> /* use kernel structure, glibc may not be in sync */
286 + #define SIGSEGV_CONTEXT_REGS                    (((struct ucontext *)scp)->uc_mcontext)
287 + #define SIGSEGV_FAULT_INSTRUCTION               (SIGSEGV_CONTEXT_REGS.arm_pc)
288 + #endif
289   #endif
290   #endif
291  
# Line 300 | Line 325 | static void powerpc_decode_instruction(i
325   #define SIGSEGV_FAULT_ADDRESS                   get_fault_address(scp)
326   #define SIGSEGV_FAULT_INSTRUCTION               scp->sc_pc
327   #endif
328 + #if (defined(arm) || defined(__arm__))
329 + #define SIGSEGV_FAULT_HANDLER_ARGLIST   int sig, int r1, int r2, int r3, struct sigcontext sc
330 + #define SIGSEGV_FAULT_HANDLER_ARGLIST_1 struct sigcontext *scp
331 + #define SIGSEGV_FAULT_HANDLER_ARGS              &sc
332 + #define SIGSEGV_FAULT_ADDRESS                   scp->fault_address
333 + #define SIGSEGV_FAULT_INSTRUCTION               scp->arm_pc
334 + #endif
335   #endif
336  
337   // Irix 5 or 6 on MIPS
338 < #if (defined(sgi) || defined(__sgi)) && (defined(SYSTYPE_SVR4) || defined(__SYSTYPE_SVR4))
338 > #if (defined(sgi) || defined(__sgi)) && (defined(SYSTYPE_SVR4) || defined(_SYSTYPE_SVR4))
339   #include <ucontext.h>
340   #define SIGSEGV_FAULT_HANDLER_ARGLIST   int sig, int code, struct sigcontext *scp
341   #define SIGSEGV_FAULT_HANDLER_ARGS              sig, code, scp
342 < #define SIGSEGV_FAULT_ADDRESS                   scp->sc_badvaddr
342 > #define SIGSEGV_FAULT_ADDRESS                   (unsigned long)scp->sc_badvaddr
343 > #define SIGSEGV_FAULT_INSTRUCTION               (unsigned long)scp->sc_pc
344   #define SIGSEGV_ALL_SIGNALS                             FAULT_HANDLER(SIGSEGV)
345   #endif
346  
# Line 380 | Line 413 | static sigsegv_address_t get_fault_addre
413   #endif
414   #endif
415   #if defined(__FreeBSD__)
383 #define SIGSEGV_ALL_SIGNALS                             FAULT_HANDLER(SIGBUS)
416   #if (defined(i386) || defined(__i386__))
417 + #define SIGSEGV_ALL_SIGNALS                             FAULT_HANDLER(SIGBUS)
418   #define SIGSEGV_FAULT_HANDLER_ARGLIST   int sig, int code, struct sigcontext *scp, char *addr
419   #define SIGSEGV_FAULT_HANDLER_ARGS              sig, code, scp, addr
420   #define SIGSEGV_FAULT_ADDRESS                   addr
# Line 389 | Line 422 | static sigsegv_address_t get_fault_addre
422   #define SIGSEGV_REGISTER_FILE                   ((unsigned long *)&scp->sc_edi)
423   #define SIGSEGV_SKIP_INSTRUCTION                ix86_skip_instruction
424   #endif
425 + #if (defined(alpha) || defined(__alpha__))
426 + #define SIGSEGV_ALL_SIGNALS                             FAULT_HANDLER(SIGSEGV)
427 + #define SIGSEGV_FAULT_HANDLER_ARGLIST   int sig, char *addr, struct sigcontext *scp
428 + #define SIGSEGV_FAULT_HANDLER_ARGS              sig, addr, scp
429 + #define SIGSEGV_FAULT_ADDRESS                   addr
430 + #define SIGSEGV_FAULT_INSTRUCTION               scp->sc_pc
431 + #endif
432   #endif
433  
434   // Extract fault address out of a sigcontext
# Line 813 | Line 853 | static bool ix86_skip_instruction(unsign
853                  int rloc = x86_reg_map[reg];
854                  switch (transfer_size) {
855                  case SIZE_BYTE:
856 <                        if (!has_rex && reg >= 4)
857 <                                regs[rloc - 4] = (regs[rloc - 4] & ~0xff00L);
858 <                        else
859 <                                regs[rloc] = (regs[rloc] & ~0xffL);
856 >                        if (has_rex || reg < 4)
857 >                                regs[rloc] = (regs[rloc] & ~0x00ffL);
858 >                        else {
859 >                                rloc = x86_reg_map[reg - 4];
860 >                                regs[rloc] = (regs[rloc] & ~0xff00L);
861 >                        }
862                          break;
863                  case SIZE_WORD:
864                          regs[rloc] = (regs[rloc] & ~0xffffL);
# Line 916 | Line 958 | static bool powerpc_skip_instruction(uns
958          return true;
959   }
960   #endif
961 +
962 + // Decode and skip MIPS instruction
963 + #if (defined(mips) || defined(__mips))
964 + enum {
965 + #if (defined(sgi) || defined(__sgi))
966 +  MIPS_REG_EPC = 35,
967 + #endif
968 + };
969 + static bool mips_skip_instruction(greg_t * regs)
970 + {
971 +  unsigned int * epc = (unsigned int *)(unsigned long)regs[MIPS_REG_EPC];
972 +
973 +  if (epc == 0)
974 +        return false;
975 +
976 + #if DEBUG
977 +  printf("IP: %p [%08x]\n", epc, epc[0]);
978 + #endif
979 +
980 +  transfer_type_t transfer_type = SIGSEGV_TRANSFER_UNKNOWN;
981 +  transfer_size_t transfer_size = SIZE_LONG;
982 +  int direction = 0;
983 +
984 +  const unsigned int opcode = epc[0];
985 +  switch (opcode >> 26) {
986 +  case 32: // Load Byte
987 +  case 36: // Load Byte Unsigned
988 +        transfer_type = SIGSEGV_TRANSFER_LOAD;
989 +        transfer_size = SIZE_BYTE;
990 +        break;
991 +  case 33: // Load Halfword
992 +  case 37: // Load Halfword Unsigned
993 +        transfer_type = SIGSEGV_TRANSFER_LOAD;
994 +        transfer_size = SIZE_WORD;
995 +        break;
996 +  case 35: // Load Word
997 +  case 39: // Load Word Unsigned
998 +        transfer_type = SIGSEGV_TRANSFER_LOAD;
999 +        transfer_size = SIZE_LONG;
1000 +        break;
1001 +  case 34: // Load Word Left
1002 +        transfer_type = SIGSEGV_TRANSFER_LOAD;
1003 +        transfer_size = SIZE_LONG;
1004 +        direction = -1;
1005 +        break;
1006 +  case 38: // Load Word Right
1007 +        transfer_type = SIGSEGV_TRANSFER_LOAD;
1008 +        transfer_size = SIZE_LONG;
1009 +        direction = 1;
1010 +        break;
1011 +  case 55: // Load Doubleword
1012 +        transfer_type = SIGSEGV_TRANSFER_LOAD;
1013 +        transfer_size = SIZE_QUAD;
1014 +        break;
1015 +  case 26: // Load Doubleword Left
1016 +        transfer_type = SIGSEGV_TRANSFER_LOAD;
1017 +        transfer_size = SIZE_QUAD;
1018 +        direction = -1;
1019 +        break;
1020 +  case 27: // Load Doubleword Right
1021 +        transfer_type = SIGSEGV_TRANSFER_LOAD;
1022 +        transfer_size = SIZE_QUAD;
1023 +        direction = 1;
1024 +        break;
1025 +  case 40: // Store Byte
1026 +        transfer_type = SIGSEGV_TRANSFER_STORE;
1027 +        transfer_size = SIZE_BYTE;
1028 +        break;
1029 +  case 41: // Store Halfword
1030 +        transfer_type = SIGSEGV_TRANSFER_STORE;
1031 +        transfer_size = SIZE_WORD;
1032 +        break;
1033 +  case 43: // Store Word
1034 +  case 42: // Store Word Left
1035 +  case 46: // Store Word Right
1036 +        transfer_type = SIGSEGV_TRANSFER_STORE;
1037 +        transfer_size = SIZE_LONG;
1038 +        break;
1039 +  case 63: // Store Doubleword
1040 +  case 44: // Store Doubleword Left
1041 +  case 45: // Store Doubleword Right
1042 +        transfer_type = SIGSEGV_TRANSFER_STORE;
1043 +        transfer_size = SIZE_QUAD;
1044 +        break;
1045 +  /* Misc instructions unlikely to be used within CPU emulators */
1046 +  case 48: // Load Linked Word
1047 +        transfer_type = SIGSEGV_TRANSFER_LOAD;
1048 +        transfer_size = SIZE_LONG;
1049 +        break;
1050 +  case 52: // Load Linked Doubleword
1051 +        transfer_type = SIGSEGV_TRANSFER_LOAD;
1052 +        transfer_size = SIZE_QUAD;
1053 +        break;
1054 +  case 56: // Store Conditional Word
1055 +        transfer_type = SIGSEGV_TRANSFER_STORE;
1056 +        transfer_size = SIZE_LONG;
1057 +        break;
1058 +  case 60: // Store Conditional Doubleword
1059 +        transfer_type = SIGSEGV_TRANSFER_STORE;
1060 +        transfer_size = SIZE_QUAD;
1061 +        break;
1062 +  }
1063 +
1064 +  if (transfer_type == SIGSEGV_TRANSFER_UNKNOWN) {
1065 +        // Unknown machine code, let it crash. Then patch the decoder
1066 +        return false;
1067 +  }
1068 +
1069 +  // Zero target register in case of a load operation
1070 +  const int reg = (opcode >> 16) & 0x1f;
1071 +  if (transfer_type == SIGSEGV_TRANSFER_LOAD) {
1072 +        if (direction == 0)
1073 +          regs[reg] = 0;
1074 +        else {
1075 +          // FIXME: untested code
1076 +          unsigned long ea = regs[(opcode >> 21) & 0x1f];
1077 +          ea += (signed long)(signed int)(signed short)(opcode & 0xffff);
1078 +          const int offset = ea & (transfer_size == SIZE_LONG ? 3 : 7);
1079 +          unsigned long value;
1080 +          if (direction > 0) {
1081 +                const unsigned long rmask = ~((1L << ((offset + 1) * 8)) - 1);
1082 +                value = regs[reg] & rmask;
1083 +          }
1084 +          else {
1085 +                const unsigned long lmask = (1L << (offset * 8)) - 1;
1086 +                value = regs[reg] & lmask;
1087 +          }
1088 +          // restore most significant bits
1089 +          if (transfer_size == SIZE_LONG)
1090 +                value = (signed long)(signed int)value;
1091 +          regs[reg] = value;
1092 +        }
1093 +  }
1094 +
1095 + #if DEBUG
1096 + #if (defined(_ABIN32) || defined(_ABI64))
1097 +  static const char * mips_gpr_names[32] = {
1098 +        "zero", "at",   "v0",   "v1",   "a0",   "a1",   "a2",   "a3",
1099 +        "t0",   "t1",   "t2",   "t3",   "t4",   "t5",   "t6",   "t7",
1100 +        "s0",   "s1",   "s2",   "s3",   "s4",   "s5",   "s6",   "s7",
1101 +        "t8",   "t9",   "k0",   "k1",   "gp",   "sp",   "s8",   "ra"
1102 +  };
1103 + #else
1104 +  static const char * mips_gpr_names[32] = {
1105 +        "zero", "at",   "v0",   "v1",   "a0",   "a1",   "a2",   "a3",
1106 +        "a4",   "a5",   "a6",   "a7",   "t0",   "t1",   "t2",   "t3",
1107 +        "s0",   "s1",   "s2",   "s3",   "s4",   "s5",   "s6",   "s7",
1108 +        "t8",   "t9",   "k0",   "k1",   "gp",   "sp",   "s8",   "ra"
1109 +  };
1110 + #endif
1111 +  printf("%s %s register %s\n",
1112 +                 transfer_size == SIZE_BYTE ? "byte" :
1113 +                 transfer_size == SIZE_WORD ? "word" :
1114 +                 transfer_size == SIZE_LONG ? "long" :
1115 +                 transfer_size == SIZE_QUAD ? "quad" : "unknown",
1116 +                 transfer_type == SIGSEGV_TRANSFER_LOAD ? "load to" : "store from",
1117 +                 mips_gpr_names[reg]);
1118 + #endif
1119 +
1120 +  regs[MIPS_REG_EPC] += 4;
1121 +  return true;
1122 + }
1123 + #endif
1124 +
1125 + // Decode and skip SPARC instruction
1126 + #if (defined(sparc) || defined(__sparc__))
1127 + enum {
1128 + #if (defined(__sun__))
1129 +  SPARC_REG_G1 = REG_G1,
1130 +  SPARC_REG_O0 = REG_O0,
1131 +  SPARC_REG_PC = REG_PC,
1132 + #endif
1133 + };
1134 + static bool sparc_skip_instruction(unsigned long * regs, gwindows_t * gwins, struct rwindow * rwin)
1135 + {
1136 +  unsigned int * pc = (unsigned int *)regs[SPARC_REG_PC];
1137 +
1138 +  if (pc == 0)
1139 +        return false;
1140 +
1141 + #if DEBUG
1142 +  printf("IP: %p [%08x]\n", pc, pc[0]);
1143 + #endif
1144 +
1145 +  transfer_type_t transfer_type = SIGSEGV_TRANSFER_UNKNOWN;
1146 +  transfer_size_t transfer_size = SIZE_LONG;
1147 +  bool register_pair = false;
1148 +
1149 +  const unsigned int opcode = pc[0];
1150 +  if ((opcode >> 30) != 3)
1151 +        return false;
1152 +  switch ((opcode >> 19) & 0x3f) {
1153 +  case 9: // Load Signed Byte
1154 +  case 1: // Load Unsigned Byte
1155 +        transfer_type = SIGSEGV_TRANSFER_LOAD;
1156 +        transfer_size = SIZE_BYTE;
1157 +        break;
1158 +  case 10:// Load Signed Halfword
1159 +  case 2: // Load Unsigned Word
1160 +        transfer_type = SIGSEGV_TRANSFER_LOAD;
1161 +        transfer_size = SIZE_WORD;
1162 +        break;
1163 +  case 8: // Load Word
1164 +  case 0: // Load Unsigned Word
1165 +        transfer_type = SIGSEGV_TRANSFER_LOAD;
1166 +        transfer_size = SIZE_LONG;
1167 +        break;
1168 +  case 11:// Load Extended Word
1169 +        transfer_type = SIGSEGV_TRANSFER_LOAD;
1170 +        transfer_size = SIZE_QUAD;
1171 +        break;
1172 +  case 3: // Load Doubleword
1173 +        transfer_type = SIGSEGV_TRANSFER_LOAD;
1174 +        transfer_size = SIZE_LONG;
1175 +        register_pair = true;
1176 +        break;
1177 +  case 5: // Store Byte
1178 +        transfer_type = SIGSEGV_TRANSFER_STORE;
1179 +        transfer_size = SIZE_BYTE;
1180 +        break;
1181 +  case 6: // Store Halfword
1182 +        transfer_type = SIGSEGV_TRANSFER_STORE;
1183 +        transfer_size = SIZE_WORD;
1184 +        break;
1185 +  case 4: // Store Word
1186 +        transfer_type = SIGSEGV_TRANSFER_STORE;
1187 +        transfer_size = SIZE_LONG;
1188 +        break;
1189 +  case 14:// Store Extended Word
1190 +        transfer_type = SIGSEGV_TRANSFER_STORE;
1191 +        transfer_size = SIZE_QUAD;
1192 +        break;
1193 +  case 7: // Store Doubleword
1194 +        transfer_type = SIGSEGV_TRANSFER_STORE;
1195 +        transfer_size = SIZE_WORD;
1196 +        register_pair = true;
1197 +        break;
1198 +  }
1199 +
1200 +  if (transfer_type == SIGSEGV_TRANSFER_UNKNOWN) {
1201 +        // Unknown machine code, let it crash. Then patch the decoder
1202 +        return false;
1203 +  }
1204 +
1205 +  // Zero target register in case of a load operation
1206 +  const int reg = (opcode >> 25) & 0x1f;
1207 +  if (transfer_type == SIGSEGV_TRANSFER_LOAD && reg != 0) {
1208 +        // FIXME: code to handle local & input registers is not tested
1209 +        if (reg >= 1 && reg <= 7) {
1210 +          // global registers
1211 +          regs[reg - 1 + SPARC_REG_G1] = 0;
1212 +        }
1213 +        else if (reg >= 8 && reg <= 15) {
1214 +          // output registers
1215 +          regs[reg - 8 + SPARC_REG_O0] = 0;
1216 +        }
1217 +        else if (reg >= 16 && reg <= 23) {
1218 +          // local registers (in register windows)
1219 +          if (gwins)
1220 +                gwins->wbuf->rw_local[reg - 16] = 0;
1221 +          else
1222 +                rwin->rw_local[reg - 16] = 0;
1223 +        }
1224 +        else {
1225 +          // input registers (in register windows)
1226 +          if (gwins)
1227 +                gwins->wbuf->rw_in[reg - 24] = 0;
1228 +          else
1229 +                rwin->rw_in[reg - 24] = 0;
1230 +        }
1231 +  }
1232 +
1233 + #if DEBUG
1234 +  static const char * reg_names[] = {
1235 +        "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7",
1236 +        "o0", "o1", "o2", "o3", "o4", "o5", "sp", "o7",
1237 +        "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7",
1238 +        "i0", "i1", "i2", "i3", "i4", "i5", "fp", "i7"
1239 +  };
1240 +  printf("%s %s register %s\n",
1241 +                 transfer_size == SIZE_BYTE ? "byte" :
1242 +                 transfer_size == SIZE_WORD ? "word" :
1243 +                 transfer_size == SIZE_LONG ? "long" :
1244 +                 transfer_size == SIZE_QUAD ? "quad" : "unknown",
1245 +                 transfer_type == SIGSEGV_TRANSFER_LOAD ? "load to" : "store from",
1246 +                 reg_names[reg]);
1247 + #endif
1248 +
1249 +  regs[SPARC_REG_PC] += 4;
1250 +  return true;
1251 + }
1252 + #endif
1253   #endif
1254  
1255   // Fallbacks
# Line 1349 | Line 1683 | static void *b_region, *e_region;
1683  
1684   static sigsegv_return_t sigsegv_test_handler(sigsegv_address_t fault_address, sigsegv_address_t instruction_address)
1685   {
1686 + #if DEBUG
1687 +        printf("sigsegv_test_handler(%p, %p)\n", fault_address, instruction_address);
1688 +        printf("expected fault at %p\n", page + REF_INDEX);
1689 + #ifdef __GNUC__
1690 +        printf("expected instruction address range: %p-%p\n", b_region, e_region);
1691 + #endif
1692 + #endif
1693          handler_called++;
1694          if ((fault_address - REF_INDEX) != page)
1695                  exit(10);

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