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Comparing BasiliskII/src/Unix/sigsegv.cpp (file contents):
Revision 1.17 by gbeauche, 2002-05-20T17:49:04Z vs.
Revision 1.36 by gbeauche, 2003-11-11T00:10:39Z

# Line 4 | Line 4
4   *  Derived from Bruno Haible's work on his SIGSEGV library for clisp
5   *  <http://clisp.sourceforge.net/>
6   *
7 + *  MacOS X support derived from the post by Timothy J. Wood to the
8 + *  omnigroup macosx-dev list:
9 + *    Mach Exception Handlers 101 (Was Re: ptrace, gdb)
10 + *    tjw@omnigroup.com Sun, 4 Jun 2000
11 + *    www.omnigroup.com/mailman/archive/macosx-dev/2000-June/002030.html
12 + *
13   *  Basilisk II (C) 1997-2002 Christian Bauer
14   *
15   *  This program is free software; you can redistribute it and/or modify
# Line 29 | Line 35
35   #include "config.h"
36   #endif
37  
38 + #include <list>
39   #include <signal.h>
40   #include "sigsegv.h"
41  
42 + #ifndef NO_STD_NAMESPACE
43 + using std::list;
44 + #endif
45 +
46   // Return value type of a signal handler (standard type if not defined)
47   #ifndef RETSIGTYPE
48   #define RETSIGTYPE void
# Line 40 | Line 51
51   // Type of the system signal handler
52   typedef RETSIGTYPE (*signal_handler)(int);
53  
43 // Is the fault to be ignored?
44 static bool sigsegv_ignore_fault = false;
45
54   // User's SIGSEGV handler
55   static sigsegv_fault_handler_t sigsegv_fault_handler = 0;
56  
# Line 57 | Line 65 | static bool sigsegv_do_install_handler(i
65   *  Instruction decoding aids
66   */
67  
60 // Transfer type
61 enum transfer_type_t {
62        TYPE_UNKNOWN,
63        TYPE_LOAD,
64        TYPE_STORE
65 };
66
68   // Transfer size
69   enum transfer_size_t {
70          SIZE_UNKNOWN,
71          SIZE_BYTE,
72 <        SIZE_WORD,
73 <        SIZE_LONG
72 >        SIZE_WORD, // 2 bytes
73 >        SIZE_LONG, // 4 bytes
74 >        SIZE_QUAD, // 8 bytes
75   };
76  
77 + // Transfer type
78 + typedef sigsegv_transfer_type_t transfer_type_t;
79 +
80   #if (defined(powerpc) || defined(__powerpc__) || defined(__ppc__))
81   // Addressing mode
82   enum addressing_mode_t {
# Line 103 | Line 108 | static void powerpc_decode_instruction(i
108          signed int imm = (signed short)(opcode & 0xffff);
109          
110          // Analyze opcode
111 <        transfer_type_t transfer_type = TYPE_UNKNOWN;
111 >        transfer_type_t transfer_type = SIGSEGV_TRANSFER_UNKNOWN;
112          transfer_size_t transfer_size = SIZE_UNKNOWN;
113          addressing_mode_t addr_mode = MODE_UNKNOWN;
114          switch (primop) {
115          case 31:
116                  switch (exop) {
117                  case 23:        // lwzx
118 <                        transfer_type = TYPE_LOAD; transfer_size = SIZE_LONG; addr_mode = MODE_X; break;
118 >                        transfer_type = SIGSEGV_TRANSFER_LOAD; transfer_size = SIZE_LONG; addr_mode = MODE_X; break;
119                  case 55:        // lwzux
120 <                        transfer_type = TYPE_LOAD; transfer_size = SIZE_LONG; addr_mode = MODE_UX; break;
120 >                        transfer_type = SIGSEGV_TRANSFER_LOAD; transfer_size = SIZE_LONG; addr_mode = MODE_UX; break;
121                  case 87:        // lbzx
122 <                        transfer_type = TYPE_LOAD; transfer_size = SIZE_BYTE; addr_mode = MODE_X; break;
122 >                        transfer_type = SIGSEGV_TRANSFER_LOAD; transfer_size = SIZE_BYTE; addr_mode = MODE_X; break;
123                  case 119:       // lbzux
124 <                        transfer_type = TYPE_LOAD; transfer_size = SIZE_BYTE; addr_mode = MODE_UX; break;
124 >                        transfer_type = SIGSEGV_TRANSFER_LOAD; transfer_size = SIZE_BYTE; addr_mode = MODE_UX; break;
125                  case 151:       // stwx
126 <                        transfer_type = TYPE_STORE; transfer_size = SIZE_LONG; addr_mode = MODE_X; break;
126 >                        transfer_type = SIGSEGV_TRANSFER_STORE; transfer_size = SIZE_LONG; addr_mode = MODE_X; break;
127                  case 183:       // stwux
128 <                        transfer_type = TYPE_STORE; transfer_size = SIZE_LONG; addr_mode = MODE_UX; break;
128 >                        transfer_type = SIGSEGV_TRANSFER_STORE; transfer_size = SIZE_LONG; addr_mode = MODE_UX; break;
129                  case 215:       // stbx
130 <                        transfer_type = TYPE_STORE; transfer_size = SIZE_BYTE; addr_mode = MODE_X; break;
130 >                        transfer_type = SIGSEGV_TRANSFER_STORE; transfer_size = SIZE_BYTE; addr_mode = MODE_X; break;
131                  case 247:       // stbux
132 <                        transfer_type = TYPE_STORE; transfer_size = SIZE_BYTE; addr_mode = MODE_UX; break;
132 >                        transfer_type = SIGSEGV_TRANSFER_STORE; transfer_size = SIZE_BYTE; addr_mode = MODE_UX; break;
133                  case 279:       // lhzx
134 <                        transfer_type = TYPE_LOAD; transfer_size = SIZE_WORD; addr_mode = MODE_X; break;
134 >                        transfer_type = SIGSEGV_TRANSFER_LOAD; transfer_size = SIZE_WORD; addr_mode = MODE_X; break;
135                  case 311:       // lhzux
136 <                        transfer_type = TYPE_LOAD; transfer_size = SIZE_WORD; addr_mode = MODE_UX; break;
136 >                        transfer_type = SIGSEGV_TRANSFER_LOAD; transfer_size = SIZE_WORD; addr_mode = MODE_UX; break;
137                  case 343:       // lhax
138 <                        transfer_type = TYPE_LOAD; transfer_size = SIZE_WORD; addr_mode = MODE_X; break;
138 >                        transfer_type = SIGSEGV_TRANSFER_LOAD; transfer_size = SIZE_WORD; addr_mode = MODE_X; break;
139                  case 375:       // lhaux
140 <                        transfer_type = TYPE_LOAD; transfer_size = SIZE_WORD; addr_mode = MODE_UX; break;
140 >                        transfer_type = SIGSEGV_TRANSFER_LOAD; transfer_size = SIZE_WORD; addr_mode = MODE_UX; break;
141                  case 407:       // sthx
142 <                        transfer_type = TYPE_STORE; transfer_size = SIZE_WORD; addr_mode = MODE_X; break;
142 >                        transfer_type = SIGSEGV_TRANSFER_STORE; transfer_size = SIZE_WORD; addr_mode = MODE_X; break;
143                  case 439:       // sthux
144 <                        transfer_type = TYPE_STORE; transfer_size = SIZE_WORD; addr_mode = MODE_UX; break;
144 >                        transfer_type = SIGSEGV_TRANSFER_STORE; transfer_size = SIZE_WORD; addr_mode = MODE_UX; break;
145                  }
146                  break;
147          
148          case 32:        // lwz
149 <                transfer_type = TYPE_LOAD; transfer_size = SIZE_LONG; addr_mode = MODE_NORM; break;
149 >                transfer_type = SIGSEGV_TRANSFER_LOAD; transfer_size = SIZE_LONG; addr_mode = MODE_NORM; break;
150          case 33:        // lwzu
151 <                transfer_type = TYPE_LOAD; transfer_size = SIZE_LONG; addr_mode = MODE_U; break;
151 >                transfer_type = SIGSEGV_TRANSFER_LOAD; transfer_size = SIZE_LONG; addr_mode = MODE_U; break;
152          case 34:        // lbz
153 <                transfer_type = TYPE_LOAD; transfer_size = SIZE_BYTE; addr_mode = MODE_NORM; break;
153 >                transfer_type = SIGSEGV_TRANSFER_LOAD; transfer_size = SIZE_BYTE; addr_mode = MODE_NORM; break;
154          case 35:        // lbzu
155 <                transfer_type = TYPE_LOAD; transfer_size = SIZE_BYTE; addr_mode = MODE_U; break;
155 >                transfer_type = SIGSEGV_TRANSFER_LOAD; transfer_size = SIZE_BYTE; addr_mode = MODE_U; break;
156          case 36:        // stw
157 <                transfer_type = TYPE_STORE; transfer_size = SIZE_LONG; addr_mode = MODE_NORM; break;
157 >                transfer_type = SIGSEGV_TRANSFER_STORE; transfer_size = SIZE_LONG; addr_mode = MODE_NORM; break;
158          case 37:        // stwu
159 <                transfer_type = TYPE_STORE; transfer_size = SIZE_LONG; addr_mode = MODE_U; break;
159 >                transfer_type = SIGSEGV_TRANSFER_STORE; transfer_size = SIZE_LONG; addr_mode = MODE_U; break;
160          case 38:        // stb
161 <                transfer_type = TYPE_STORE; transfer_size = SIZE_BYTE; addr_mode = MODE_NORM; break;
161 >                transfer_type = SIGSEGV_TRANSFER_STORE; transfer_size = SIZE_BYTE; addr_mode = MODE_NORM; break;
162          case 39:        // stbu
163 <                transfer_type = TYPE_STORE; transfer_size = SIZE_BYTE; addr_mode = MODE_U; break;
163 >                transfer_type = SIGSEGV_TRANSFER_STORE; transfer_size = SIZE_BYTE; addr_mode = MODE_U; break;
164          case 40:        // lhz
165 <                transfer_type = TYPE_LOAD; transfer_size = SIZE_WORD; addr_mode = MODE_NORM; break;
165 >                transfer_type = SIGSEGV_TRANSFER_LOAD; transfer_size = SIZE_WORD; addr_mode = MODE_NORM; break;
166          case 41:        // lhzu
167 <                transfer_type = TYPE_LOAD; transfer_size = SIZE_WORD; addr_mode = MODE_U; break;
167 >                transfer_type = SIGSEGV_TRANSFER_LOAD; transfer_size = SIZE_WORD; addr_mode = MODE_U; break;
168          case 42:        // lha
169 <                transfer_type = TYPE_LOAD; transfer_size = SIZE_WORD; addr_mode = MODE_NORM; break;
169 >                transfer_type = SIGSEGV_TRANSFER_LOAD; transfer_size = SIZE_WORD; addr_mode = MODE_NORM; break;
170          case 43:        // lhau
171 <                transfer_type = TYPE_LOAD; transfer_size = SIZE_WORD; addr_mode = MODE_U; break;
171 >                transfer_type = SIGSEGV_TRANSFER_LOAD; transfer_size = SIZE_WORD; addr_mode = MODE_U; break;
172          case 44:        // sth
173 <                transfer_type = TYPE_STORE; transfer_size = SIZE_WORD; addr_mode = MODE_NORM; break;
173 >                transfer_type = SIGSEGV_TRANSFER_STORE; transfer_size = SIZE_WORD; addr_mode = MODE_NORM; break;
174          case 45:        // sthu
175 <                transfer_type = TYPE_STORE; transfer_size = SIZE_WORD; addr_mode = MODE_U; break;
175 >                transfer_type = SIGSEGV_TRANSFER_STORE; transfer_size = SIZE_WORD; addr_mode = MODE_U; break;
176          }
177          
178          // Calculate effective address
# Line 214 | Line 219 | static void powerpc_decode_instruction(i
219   #define SIGSEGV_ALL_SIGNALS                             FAULT_HANDLER(SIGSEGV)
220   #endif
221   #define SIGSEGV_FAULT_HANDLER_ARGLIST   int sig, siginfo_t *sip, void *scp
222 + #define SIGSEGV_FAULT_HANDLER_ARGLIST_1 siginfo_t *sip, void *scp
223 + #define SIGSEGV_FAULT_HANDLER_ARGS              sip, scp
224   #define SIGSEGV_FAULT_ADDRESS                   sip->si_addr
225 + #if defined(__sun__)
226 + #if (defined(sparc) || defined(__sparc__))
227 + #include <sys/ucontext.h>
228 + #define SIGSEGV_CONTEXT_REGS                    (((ucontext_t *)scp)->uc_mcontext.gregs)
229 + #define SIGSEGV_FAULT_INSTRUCTION               SIGSEGV_CONTEXT_REGS[REG_PC]
230 + #endif
231 + #endif
232 + #if defined(__FreeBSD__)
233   #if (defined(i386) || defined(__i386__))
234   #define SIGSEGV_FAULT_INSTRUCTION               (((struct sigcontext *)scp)->sc_eip)
235 < #define SIGSEGV_REGISTER_FILE                   ((unsigned int *)&(((struct sigcontext *)scp)->sc_edi))
235 > #define SIGSEGV_REGISTER_FILE                   ((unsigned long *)&(((struct sigcontext *)scp)->sc_edi)) /* EDI is the first GPR (even below EIP) in sigcontext */
236   #define SIGSEGV_SKIP_INSTRUCTION                ix86_skip_instruction
237   #endif
238 + #endif
239   #if defined(__linux__)
240   #if (defined(i386) || defined(__i386__))
241   #include <sys/ucontext.h>
242   #define SIGSEGV_CONTEXT_REGS                    (((ucontext_t *)scp)->uc_mcontext.gregs)
243   #define SIGSEGV_FAULT_INSTRUCTION               SIGSEGV_CONTEXT_REGS[14] /* should use REG_EIP instead */
244 < #define SIGSEGV_REGISTER_FILE                   (unsigned int *)SIGSEGV_CONTEXT_REGS
244 > #define SIGSEGV_REGISTER_FILE                   (unsigned long *)SIGSEGV_CONTEXT_REGS
245 > #define SIGSEGV_SKIP_INSTRUCTION                ix86_skip_instruction
246 > #endif
247 > #if (defined(x86_64) || defined(__x86_64__))
248 > #include <sys/ucontext.h>
249 > #define SIGSEGV_CONTEXT_REGS                    (((ucontext_t *)scp)->uc_mcontext.gregs)
250 > #define SIGSEGV_FAULT_INSTRUCTION               SIGSEGV_CONTEXT_REGS[16] /* should use REG_RIP instead */
251 > #define SIGSEGV_REGISTER_FILE                   (unsigned long *)SIGSEGV_CONTEXT_REGS
252   #define SIGSEGV_SKIP_INSTRUCTION                ix86_skip_instruction
253   #endif
254   #if (defined(ia64) || defined(__ia64__))
# Line 248 | Line 271 | static void powerpc_decode_instruction(i
271   #if (defined(i386) || defined(__i386__))
272   #include <asm/sigcontext.h>
273   #define SIGSEGV_FAULT_HANDLER_ARGLIST   int sig, struct sigcontext scs
274 < #define SIGSEGV_FAULT_ADDRESS                   scs.cr2
275 < #define SIGSEGV_FAULT_INSTRUCTION               scs.eip
276 < #define SIGSEGV_REGISTER_FILE                   (unsigned int *)(&scs)
274 > #define SIGSEGV_FAULT_HANDLER_ARGLIST_1 struct sigcontext *scp
275 > #define SIGSEGV_FAULT_HANDLER_ARGS              &scs
276 > #define SIGSEGV_FAULT_ADDRESS                   scp->cr2
277 > #define SIGSEGV_FAULT_INSTRUCTION               scp->eip
278 > #define SIGSEGV_REGISTER_FILE                   (unsigned long *)scp
279   #define SIGSEGV_SKIP_INSTRUCTION                ix86_skip_instruction
280   #endif
281   #if (defined(sparc) || defined(__sparc__))
282   #include <asm/sigcontext.h>
283   #define SIGSEGV_FAULT_HANDLER_ARGLIST   int sig, int code, struct sigcontext *scp, char *addr
284 + #define SIGSEGV_FAULT_HANDLER_ARGS              sig, code, scp, addr
285   #define SIGSEGV_FAULT_ADDRESS                   addr
286   #endif
287   #if (defined(powerpc) || defined(__powerpc__))
288   #include <asm/sigcontext.h>
289   #define SIGSEGV_FAULT_HANDLER_ARGLIST   int sig, struct sigcontext *scp
290 + #define SIGSEGV_FAULT_HANDLER_ARGS              sig, scp
291   #define SIGSEGV_FAULT_ADDRESS                   scp->regs->dar
292   #define SIGSEGV_FAULT_INSTRUCTION               scp->regs->nip
293   #define SIGSEGV_REGISTER_FILE                   (unsigned int *)&scp->regs->nip, (unsigned int *)(scp->regs->gpr)
# Line 269 | Line 296 | static void powerpc_decode_instruction(i
296   #if (defined(alpha) || defined(__alpha__))
297   #include <asm/sigcontext.h>
298   #define SIGSEGV_FAULT_HANDLER_ARGLIST   int sig, int code, struct sigcontext *scp
299 + #define SIGSEGV_FAULT_HANDLER_ARGS              sig, code, scp
300   #define SIGSEGV_FAULT_ADDRESS                   get_fault_address(scp)
301   #define SIGSEGV_FAULT_INSTRUCTION               scp->sc_pc
274
275 // From Boehm's GC 6.0alpha8
276 static sigsegv_address_t get_fault_address(struct sigcontext *scp)
277 {
278        unsigned int instruction = *((unsigned int *)(scp->sc_pc));
279        unsigned long fault_address = scp->sc_regs[(instruction >> 16) & 0x1f];
280        fault_address += (signed long)(signed short)(instruction & 0xffff);
281        return (sigsegv_address_t)fault_address;
282 }
302   #endif
303   #endif
304  
# Line 287 | Line 306 | static sigsegv_address_t get_fault_addre
306   #if (defined(sgi) || defined(__sgi)) && (defined(SYSTYPE_SVR4) || defined(__SYSTYPE_SVR4))
307   #include <ucontext.h>
308   #define SIGSEGV_FAULT_HANDLER_ARGLIST   int sig, int code, struct sigcontext *scp
309 + #define SIGSEGV_FAULT_HANDLER_ARGS              sig, code, scp
310   #define SIGSEGV_FAULT_ADDRESS                   scp->sc_badvaddr
311   #define SIGSEGV_ALL_SIGNALS                             FAULT_HANDLER(SIGSEGV)
312   #endif
# Line 294 | Line 314 | static sigsegv_address_t get_fault_addre
314   // HP-UX
315   #if (defined(hpux) || defined(__hpux__))
316   #define SIGSEGV_FAULT_HANDLER_ARGLIST   int sig, int code, struct sigcontext *scp
317 + #define SIGSEGV_FAULT_HANDLER_ARGS              sig, code, scp
318   #define SIGSEGV_FAULT_ADDRESS                   scp->sc_sl.sl_ss.ss_narrow.ss_cr21
319   #define SIGSEGV_ALL_SIGNALS                             FAULT_HANDLER(SIGSEGV) FAULT_HANDLER(SIGBUS)
320   #endif
# Line 302 | Line 323 | static sigsegv_address_t get_fault_addre
323   #if defined(__osf__)
324   #include <ucontext.h>
325   #define SIGSEGV_FAULT_HANDLER_ARGLIST   int sig, int code, struct sigcontext *scp
326 + #define SIGSEGV_FAULT_HANDLER_ARGS              sig, code, scp
327   #define SIGSEGV_FAULT_ADDRESS                   scp->sc_traparg_a0
328   #define SIGSEGV_ALL_SIGNALS                             FAULT_HANDLER(SIGSEGV)
329   #endif
# Line 309 | Line 331 | static sigsegv_address_t get_fault_addre
331   // AIX
332   #if defined(_AIX)
333   #define SIGSEGV_FAULT_HANDLER_ARGLIST   int sig, int code, struct sigcontext *scp
334 + #define SIGSEGV_FAULT_HANDLER_ARGS              sig, code, scp
335   #define SIGSEGV_FAULT_ADDRESS                   scp->sc_jmpbuf.jmp_context.o_vaddr
336   #define SIGSEGV_ALL_SIGNALS                             FAULT_HANDLER(SIGSEGV)
337   #endif
338  
339 < // NetBSD or FreeBSD
340 < #if defined(__NetBSD__) || defined(__FreeBSD__)
339 > // NetBSD
340 > #if defined(__NetBSD__)
341   #if (defined(m68k) || defined(__m68k__))
342   #include <m68k/frame.h>
343   #define SIGSEGV_FAULT_HANDLER_ARGLIST   int sig, int code, struct sigcontext *scp
344 + #define SIGSEGV_FAULT_HANDLER_ARGS              sig, code, scp
345   #define SIGSEGV_FAULT_ADDRESS                   get_fault_address(scp)
346   #define SIGSEGV_ALL_SIGNALS                             FAULT_HANDLER(SIGSEGV)
347  
# Line 341 | Line 365 | static sigsegv_address_t get_fault_addre
365          }
366          return (sigsegv_address_t)fault_addr;
367   }
368 < #else
369 < #define SIGSEGV_FAULT_HANDLER_ARGLIST   int sig, int code, void *scp, char *addr
370 < #define SIGSEGV_FAULT_ADDRESS                   addr
368 > #endif
369 > #if (defined(alpha) || defined(__alpha__))
370 > #define SIGSEGV_FAULT_HANDLER_ARGLIST   int sig, int code, struct sigcontext *scp
371 > #define SIGSEGV_FAULT_HANDLER_ARGS              sig, code, scp
372 > #define SIGSEGV_FAULT_ADDRESS                   get_fault_address(scp)
373 > #define SIGSEGV_ALL_SIGNALS                             FAULT_HANDLER(SIGBUS)
374 > #endif
375 > #if (defined(i386) || defined(__i386__))
376 > #error "FIXME: need to decode instruction and compute EA"
377 > #define SIGSEGV_FAULT_HANDLER_ARGLIST   int sig, int code, struct sigcontext *scp
378 > #define SIGSEGV_FAULT_HANDLER_ARGS              sig, code, scp
379 > #define SIGSEGV_ALL_SIGNALS                             FAULT_HANDLER(SIGSEGV)
380 > #endif
381 > #endif
382 > #if defined(__FreeBSD__)
383   #define SIGSEGV_ALL_SIGNALS                             FAULT_HANDLER(SIGBUS)
384 + #if (defined(i386) || defined(__i386__))
385 + #define SIGSEGV_FAULT_HANDLER_ARGLIST   int sig, int code, struct sigcontext *scp, char *addr
386 + #define SIGSEGV_FAULT_HANDLER_ARGS              sig, code, scp, addr
387 + #define SIGSEGV_FAULT_ADDRESS                   addr
388 + #define SIGSEGV_FAULT_INSTRUCTION               scp->sc_eip
389 + #define SIGSEGV_REGISTER_FILE                   ((unsigned long *)&scp->sc_edi)
390 + #define SIGSEGV_SKIP_INSTRUCTION                ix86_skip_instruction
391   #endif
392   #endif
393  
394 < // MacOS X
394 > // Extract fault address out of a sigcontext
395 > #if (defined(alpha) || defined(__alpha__))
396 > // From Boehm's GC 6.0alpha8
397 > static sigsegv_address_t get_fault_address(struct sigcontext *scp)
398 > {
399 >        unsigned int instruction = *((unsigned int *)(scp->sc_pc));
400 >        unsigned long fault_address = scp->sc_regs[(instruction >> 16) & 0x1f];
401 >        fault_address += (signed long)(signed short)(instruction & 0xffff);
402 >        return (sigsegv_address_t)fault_address;
403 > }
404 > #endif
405 >
406 >
407 > // MacOS X, not sure which version this works in. Under 10.1
408 > // vm_protect does not appear to work from a signal handler. Under
409 > // 10.2 signal handlers get siginfo type arguments but the si_addr
410 > // field is the address of the faulting instruction and not the
411 > // address that caused the SIGBUS. Maybe this works in 10.0? In any
412 > // case with Mach exception handlers there is a way to do what this
413 > // was meant to do.
414 > #ifndef HAVE_MACH_EXCEPTIONS
415   #if defined(__APPLE__) && defined(__MACH__)
416   #if (defined(ppc) || defined(__ppc__))
417   #define SIGSEGV_FAULT_HANDLER_ARGLIST   int sig, int code, struct sigcontext *scp
418 + #define SIGSEGV_FAULT_HANDLER_ARGS              sig, code, scp
419   #define SIGSEGV_FAULT_ADDRESS                   get_fault_address(scp)
420   #define SIGSEGV_FAULT_INSTRUCTION               scp->sc_ir
421   #define SIGSEGV_ALL_SIGNALS                             FAULT_HANDLER(SIGBUS)
# Line 371 | Line 435 | static sigsegv_address_t get_fault_addre
435   #endif
436   #endif
437   #endif
438 + #endif
439 +
440 + #if HAVE_MACH_EXCEPTIONS
441 +
442 + // This can easily be extended to other Mach systems, but really who
443 + // uses HURD (oops GNU/HURD), Darwin/x86, NextStep, Rhapsody, or CMU
444 + // Mach 2.5/3.0?
445 + #if defined(__APPLE__) && defined(__MACH__)
446 +
447 + #include <sys/types.h>
448 + #include <stdlib.h>
449 + #include <stdio.h>
450 + #include <pthread.h>
451 +
452 + /*
453 + * If you are familiar with MIG then you will understand the frustration
454 + * that was necessary to get these embedded into C++ code by hand.
455 + */
456 + extern "C" {
457 + #include <mach/mach.h>
458 + #include <mach/mach_error.h>
459 +
460 + extern boolean_t exc_server(mach_msg_header_t *, mach_msg_header_t *);
461 + extern kern_return_t catch_exception_raise(mach_port_t, mach_port_t,
462 +        mach_port_t, exception_type_t, exception_data_t, mach_msg_type_number_t);
463 + extern kern_return_t exception_raise(mach_port_t, mach_port_t, mach_port_t,
464 +        exception_type_t, exception_data_t, mach_msg_type_number_t);
465 + extern kern_return_t exception_raise_state(mach_port_t, exception_type_t,
466 +        exception_data_t, mach_msg_type_number_t, thread_state_flavor_t *,
467 +        thread_state_t, mach_msg_type_number_t, thread_state_t, mach_msg_type_number_t *);
468 + extern kern_return_t exception_raise_state_identity(mach_port_t, mach_port_t, mach_port_t,
469 +        exception_type_t, exception_data_t, mach_msg_type_number_t, thread_state_flavor_t *,
470 +        thread_state_t, mach_msg_type_number_t, thread_state_t, mach_msg_type_number_t *);
471 + }
472 +
473 + // Could make this dynamic by looking for a result of MIG_ARRAY_TOO_LARGE
474 + #define HANDLER_COUNT 64
475 +
476 + // structure to tuck away existing exception handlers
477 + typedef struct _ExceptionPorts {
478 +        mach_msg_type_number_t maskCount;
479 +        exception_mask_t masks[HANDLER_COUNT];
480 +        exception_handler_t handlers[HANDLER_COUNT];
481 +        exception_behavior_t behaviors[HANDLER_COUNT];
482 +        thread_state_flavor_t flavors[HANDLER_COUNT];
483 + } ExceptionPorts;
484 +
485 + // exception handler thread
486 + static pthread_t exc_thread;
487 +
488 + // place where old exception handler info is stored
489 + static ExceptionPorts ports;
490 +
491 + // our exception port
492 + static mach_port_t _exceptionPort = MACH_PORT_NULL;
493 +
494 + #define MACH_CHECK_ERROR(name,ret) \
495 + if (ret != KERN_SUCCESS) { \
496 +        mach_error(#name, ret); \
497 +        exit (1); \
498 + }
499 +
500 + #define SIGSEGV_FAULT_ADDRESS                   code[1]
501 + #define SIGSEGV_FAULT_INSTRUCTION               get_fault_instruction(thread, state)
502 + #define SIGSEGV_FAULT_HANDLER_INVOKE(ADDR, IP)  ((code[0] == KERN_PROTECTION_FAILURE) ? sigsegv_fault_handler(ADDR, IP) : SIGSEGV_RETURN_FAILURE)
503 + #define SIGSEGV_FAULT_HANDLER_ARGLIST   mach_port_t thread, exception_data_t code, ppc_thread_state_t *state
504 + #define SIGSEGV_FAULT_HANDLER_ARGS              thread, code, &state
505 + #define SIGSEGV_SKIP_INSTRUCTION                powerpc_skip_instruction
506 + #define SIGSEGV_REGISTER_FILE                   &state->srr0, &state->r0
507 +
508 + // Given a suspended thread, stuff the current instruction and
509 + // registers into state.
510 + //
511 + // It would have been nice to have this be ppc/x86 independant which
512 + // could have been done easily with a thread_state_t instead of
513 + // ppc_thread_state_t, but because of the way this is called it is
514 + // easier to do it this way.
515 + #if (defined(ppc) || defined(__ppc__))
516 + static inline sigsegv_address_t get_fault_instruction(mach_port_t thread, ppc_thread_state_t *state)
517 + {
518 +        kern_return_t krc;
519 +        mach_msg_type_number_t count;
520 +
521 +        count = MACHINE_THREAD_STATE_COUNT;
522 +        krc = thread_get_state(thread, MACHINE_THREAD_STATE, (thread_state_t)state, &count);
523 +        MACH_CHECK_ERROR (thread_get_state, krc);
524 +
525 +        return (sigsegv_address_t)state->srr0;
526 + }
527 + #endif
528 +
529 + // Since there can only be one exception thread running at any time
530 + // this is not a problem.
531 + #define MSG_SIZE 512
532 + static char msgbuf[MSG_SIZE];
533 + static char replybuf[MSG_SIZE];
534 +
535 + /*
536 + * This is the entry point for the exception handler thread. The job
537 + * of this thread is to wait for exception messages on the exception
538 + * port that was setup beforehand and to pass them on to exc_server.
539 + * exc_server is a MIG generated function that is a part of Mach.
540 + * Its job is to decide what to do with the exception message. In our
541 + * case exc_server calls catch_exception_raise on our behalf. After
542 + * exc_server returns, it is our responsibility to send the reply.
543 + */
544 + static void *
545 + handleExceptions(void *priv)
546 + {
547 +        mach_msg_header_t *msg, *reply;
548 +        kern_return_t krc;
549 +
550 +        msg = (mach_msg_header_t *)msgbuf;
551 +        reply = (mach_msg_header_t *)replybuf;
552 +
553 +        for (;;) {
554 +                krc = mach_msg(msg, MACH_RCV_MSG, MSG_SIZE, MSG_SIZE,
555 +                                _exceptionPort, 0, MACH_PORT_NULL);
556 +                MACH_CHECK_ERROR(mach_msg, krc);
557 +
558 +                if (!exc_server(msg, reply)) {
559 +                        fprintf(stderr, "exc_server hated the message\n");
560 +                        exit(1);
561 +                }
562 +
563 +                krc = mach_msg(reply, MACH_SEND_MSG, reply->msgh_size, 0,
564 +                                 msg->msgh_local_port, 0, MACH_PORT_NULL);
565 +                if (krc != KERN_SUCCESS) {
566 +                        fprintf(stderr, "Error sending message to original reply port, krc = %d, %s",
567 +                                krc, mach_error_string(krc));
568 +                        exit(1);
569 +                }
570 +        }
571 + }
572 + #endif
573 + #endif
574  
575  
576   /*
# Line 379 | Line 579 | static sigsegv_address_t get_fault_addre
579  
580   #ifdef HAVE_SIGSEGV_SKIP_INSTRUCTION
581   // Decode and skip X86 instruction
582 < #if (defined(i386) || defined(__i386__))
582 > #if (defined(i386) || defined(__i386__)) || defined(__x86_64__)
583   #if defined(__linux__)
584   enum {
585 + #if (defined(i386) || defined(__i386__))
586          X86_REG_EIP = 14,
587          X86_REG_EAX = 11,
588          X86_REG_ECX = 10,
# Line 391 | Line 592 | enum {
592          X86_REG_EBP = 6,
593          X86_REG_ESI = 5,
594          X86_REG_EDI = 4
595 + #endif
596 + #if defined(__x86_64__)
597 +        X86_REG_R8  = 0,
598 +        X86_REG_R9  = 1,
599 +        X86_REG_R10 = 2,
600 +        X86_REG_R11 = 3,
601 +        X86_REG_R12 = 4,
602 +        X86_REG_R13 = 5,
603 +        X86_REG_R14 = 6,
604 +        X86_REG_R15 = 7,
605 +        X86_REG_EDI = 8,
606 +        X86_REG_ESI = 9,
607 +        X86_REG_EBP = 10,
608 +        X86_REG_EBX = 11,
609 +        X86_REG_EDX = 12,
610 +        X86_REG_EAX = 13,
611 +        X86_REG_ECX = 14,
612 +        X86_REG_ESP = 15,
613 +        X86_REG_EIP = 16
614 + #endif
615   };
616   #endif
617   #if defined(__NetBSD__) || defined(__FreeBSD__)
618   enum {
619 + #if (defined(i386) || defined(__i386__))
620          X86_REG_EIP = 10,
621          X86_REG_EAX = 7,
622          X86_REG_ECX = 6,
# Line 404 | Line 626 | enum {
626          X86_REG_EBP = 2,
627          X86_REG_ESI = 1,
628          X86_REG_EDI = 0
629 + #endif
630   };
631   #endif
632   // FIXME: this is partly redundant with the instruction decoding phase
# Line 440 | Line 663 | static inline int ix86_step_over_modrm(u
663          return offset;
664   }
665  
666 < static bool ix86_skip_instruction(unsigned int * regs)
666 > static bool ix86_skip_instruction(unsigned long * regs)
667   {
668          unsigned char * eip = (unsigned char *)regs[X86_REG_EIP];
669  
670          if (eip == 0)
671                  return false;
672          
673 <        transfer_type_t transfer_type = TYPE_UNKNOWN;
673 >        transfer_type_t transfer_type = SIGSEGV_TRANSFER_UNKNOWN;
674          transfer_size_t transfer_size = SIZE_LONG;
675          
676          int reg = -1;
677          int len = 0;
678 <        
678 >
679 > #if DEBUG
680 >        printf("IP: %p [%02x %02x %02x %02x...]\n",
681 >                   eip, eip[0], eip[1], eip[2], eip[3]);
682 > #endif
683 >
684          // Operand size prefix
685          if (*eip == 0x66) {
686                  eip++;
# Line 460 | Line 688 | static bool ix86_skip_instruction(unsign
688                  transfer_size = SIZE_WORD;
689          }
690  
691 +        // REX prefix
692 + #if defined(__x86_64__)
693 +        struct rex_t {
694 +                unsigned char W;
695 +                unsigned char R;
696 +                unsigned char X;
697 +                unsigned char B;
698 +        };
699 +        rex_t rex = { 0, 0, 0, 0 };
700 +        bool has_rex = false;
701 +        if ((*eip & 0xf0) == 0x40) {
702 +                has_rex = true;
703 +                const unsigned char b = *eip;
704 +                rex.W = b & (1 << 3);
705 +                rex.R = b & (1 << 2);
706 +                rex.X = b & (1 << 1);
707 +                rex.B = b & (1 << 0);
708 + #if DEBUG
709 +                printf("REX: %c,%c,%c,%c\n",
710 +                           rex.W ? 'W' : '_',
711 +                           rex.R ? 'R' : '_',
712 +                           rex.X ? 'X' : '_',
713 +                           rex.B ? 'B' : '_');
714 + #endif
715 +                eip++;
716 +                len++;
717 +                if (rex.W)
718 +                        transfer_size = SIZE_QUAD;
719 +        }
720 + #else
721 +        const bool has_rex = false;
722 + #endif
723 +
724          // Decode instruction
725          switch (eip[0]) {
726          case 0x0f:
727 <            if (eip[1] == 0xb7) { // MOVZX r32, r/m16
727 >            switch (eip[1]) {
728 >            case 0xb6: // MOVZX r32, r/m8
729 >            case 0xb7: // MOVZX r32, r/m16
730                  switch (eip[2] & 0xc0) {
731                  case 0x80:
732                      reg = (eip[2] >> 3) & 7;
733 <                    transfer_type = TYPE_LOAD;
733 >                    transfer_type = SIGSEGV_TRANSFER_LOAD;
734                      break;
735                  case 0x40:
736                      reg = (eip[2] >> 3) & 7;
737 <                    transfer_type = TYPE_LOAD;
737 >                    transfer_type = SIGSEGV_TRANSFER_LOAD;
738                      break;
739                  case 0x00:
740                      reg = (eip[2] >> 3) & 7;
741 <                    transfer_type = TYPE_LOAD;
741 >                    transfer_type = SIGSEGV_TRANSFER_LOAD;
742                      break;
743                  }
744                  len += 3 + ix86_step_over_modrm(eip + 2);
745 +                break;
746              }
747            break;
748          case 0x8a: // MOV r8, r/m8
# Line 487 | Line 751 | static bool ix86_skip_instruction(unsign
751                  switch (eip[1] & 0xc0) {
752                  case 0x80:
753                          reg = (eip[1] >> 3) & 7;
754 <                        transfer_type = TYPE_LOAD;
754 >                        transfer_type = SIGSEGV_TRANSFER_LOAD;
755                          break;
756                  case 0x40:
757                          reg = (eip[1] >> 3) & 7;
758 <                        transfer_type = TYPE_LOAD;
758 >                        transfer_type = SIGSEGV_TRANSFER_LOAD;
759                          break;
760                  case 0x00:
761                          reg = (eip[1] >> 3) & 7;
762 <                        transfer_type = TYPE_LOAD;
762 >                        transfer_type = SIGSEGV_TRANSFER_LOAD;
763                          break;
764                  }
765                  len += 2 + ix86_step_over_modrm(eip + 1);
# Line 506 | Line 770 | static bool ix86_skip_instruction(unsign
770                  switch (eip[1] & 0xc0) {
771                  case 0x80:
772                          reg = (eip[1] >> 3) & 7;
773 <                        transfer_type = TYPE_STORE;
773 >                        transfer_type = SIGSEGV_TRANSFER_STORE;
774                          break;
775                  case 0x40:
776                          reg = (eip[1] >> 3) & 7;
777 <                        transfer_type = TYPE_STORE;
777 >                        transfer_type = SIGSEGV_TRANSFER_STORE;
778                          break;
779                  case 0x00:
780                          reg = (eip[1] >> 3) & 7;
781 <                        transfer_type = TYPE_STORE;
781 >                        transfer_type = SIGSEGV_TRANSFER_STORE;
782                          break;
783                  }
784                  len += 2 + ix86_step_over_modrm(eip + 1);
785                  break;
786          }
787  
788 <        if (transfer_type == TYPE_UNKNOWN) {
788 >        if (transfer_type == SIGSEGV_TRANSFER_UNKNOWN) {
789                  // Unknown machine code, let it crash. Then patch the decoder
790                  return false;
791          }
792  
793 <        if (transfer_type == TYPE_LOAD && reg != -1) {
794 <                static const int x86_reg_map[8] = {
793 > #if defined(__x86_64__)
794 >        if (rex.R)
795 >                reg += 8;
796 > #endif
797 >
798 >        if (transfer_type == SIGSEGV_TRANSFER_LOAD && reg != -1) {
799 >                static const int x86_reg_map[] = {
800                          X86_REG_EAX, X86_REG_ECX, X86_REG_EDX, X86_REG_EBX,
801 <                        X86_REG_ESP, X86_REG_EBP, X86_REG_ESI, X86_REG_EDI
801 >                        X86_REG_ESP, X86_REG_EBP, X86_REG_ESI, X86_REG_EDI,
802 > #if defined(__x86_64__)
803 >                        X86_REG_R8,  X86_REG_R9,  X86_REG_R10, X86_REG_R11,
804 >                        X86_REG_R12, X86_REG_R13, X86_REG_R14, X86_REG_R15,
805 > #endif
806                  };
807                  
808 <                if (reg < 0 || reg >= 8)
808 >                if (reg < 0 || reg >= (sizeof(x86_reg_map)/sizeof(x86_reg_map[0]) - 1))
809                          return false;
810  
811 +                // Set 0 to the relevant register part
812 +                // NOTE: this is only valid for MOV alike instructions
813                  int rloc = x86_reg_map[reg];
814                  switch (transfer_size) {
815                  case SIZE_BYTE:
816 <                        regs[rloc] = (regs[rloc] & ~0xff);
816 >                        if (has_rex || reg < 4)
817 >                                regs[rloc] = (regs[rloc] & ~0x00ffL);
818 >                        else {
819 >                                rloc = x86_reg_map[reg - 4];
820 >                                regs[rloc] = (regs[rloc] & ~0xff00L);
821 >                        }
822                          break;
823                  case SIZE_WORD:
824 <                        regs[rloc] = (regs[rloc] & ~0xffff);
824 >                        regs[rloc] = (regs[rloc] & ~0xffffL);
825                          break;
826                  case SIZE_LONG:
827 +                case SIZE_QUAD: // zero-extension
828                          regs[rloc] = 0;
829                          break;
830                  }
# Line 551 | Line 832 | static bool ix86_skip_instruction(unsign
832  
833   #if DEBUG
834          printf("%08x: %s %s access", regs[X86_REG_EIP],
835 <                   transfer_size == SIZE_BYTE ? "byte" : transfer_size == SIZE_WORD ? "word" : "long",
836 <                   transfer_type == TYPE_LOAD ? "read" : "write");
835 >                   transfer_size == SIZE_BYTE ? "byte" :
836 >                   transfer_size == SIZE_WORD ? "word" :
837 >                   transfer_size == SIZE_LONG ? "long" :
838 >                   transfer_size == SIZE_QUAD ? "quad" : "unknown",
839 >                   transfer_type == SIGSEGV_TRANSFER_LOAD ? "read" : "write");
840          
841          if (reg != -1) {
842 <                static const char * x86_reg_str_map[8] = {
843 <                        "eax", "ecx", "edx", "ebx",
844 <                        "esp", "ebp", "esi", "edi"
842 >                static const char * x86_byte_reg_str_map[] = {
843 >                        "al",   "cl",   "dl",   "bl",
844 >                        "spl",  "bpl",  "sil",  "dil",
845 >                        "r8b",  "r9b",  "r10b", "r11b",
846 >                        "r12b", "r13b", "r14b", "r15b",
847 >                        "ah",   "ch",   "dh",   "bh",
848 >                };
849 >                static const char * x86_word_reg_str_map[] = {
850 >                        "ax",   "cx",   "dx",   "bx",
851 >                        "sp",   "bp",   "si",   "di",
852 >                        "r8w",  "r9w",  "r10w", "r11w",
853 >                        "r12w", "r13w", "r14w", "r15w",
854                  };
855 <                printf(" %s register %%%s", transfer_type == TYPE_LOAD ? "to" : "from", x86_reg_str_map[reg]);
855 >                static const char *x86_long_reg_str_map[] = {
856 >                        "eax",  "ecx",  "edx",  "ebx",
857 >                        "esp",  "ebp",  "esi",  "edi",
858 >                        "r8d",  "r9d",  "r10d", "r11d",
859 >                        "r12d", "r13d", "r14d", "r15d",
860 >                };
861 >                static const char *x86_quad_reg_str_map[] = {
862 >                        "rax", "rcx", "rdx", "rbx",
863 >                        "rsp", "rbp", "rsi", "rdi",
864 >                        "r8",  "r9",  "r10", "r11",
865 >                        "r12", "r13", "r14", "r15",
866 >                };
867 >                const char * reg_str = NULL;
868 >                switch (transfer_size) {
869 >                case SIZE_BYTE:
870 >                        reg_str = x86_byte_reg_str_map[(!has_rex && reg >= 4 ? 12 : 0) + reg];
871 >                        break;
872 >                case SIZE_WORD: reg_str = x86_word_reg_str_map[reg]; break;
873 >                case SIZE_LONG: reg_str = x86_long_reg_str_map[reg]; break;
874 >                case SIZE_QUAD: reg_str = x86_quad_reg_str_map[reg]; break;
875 >                }
876 >                if (reg_str)
877 >                        printf(" %s register %%%s",
878 >                                   transfer_type == SIGSEGV_TRANSFER_LOAD ? "to" : "from",
879 >                                   reg_str);
880          }
881          printf(", %d bytes instruction\n", len);
882   #endif
# Line 576 | Line 893 | static bool powerpc_skip_instruction(uns
893          instruction_t instr;
894          powerpc_decode_instruction(&instr, *nip_p, regs);
895          
896 <        if (instr.transfer_type == TYPE_UNKNOWN) {
896 >        if (instr.transfer_type == SIGSEGV_TRANSFER_UNKNOWN) {
897                  // Unknown machine code, let it crash. Then patch the decoder
898                  return false;
899          }
# Line 584 | Line 901 | static bool powerpc_skip_instruction(uns
901   #if DEBUG
902          printf("%08x: %s %s access", *nip_p,
903                     instr.transfer_size == SIZE_BYTE ? "byte" : instr.transfer_size == SIZE_WORD ? "word" : "long",
904 <                   instr.transfer_type == TYPE_LOAD ? "read" : "write");
904 >                   instr.transfer_type == SIGSEGV_TRANSFER_LOAD ? "read" : "write");
905          
906          if (instr.addr_mode == MODE_U || instr.addr_mode == MODE_UX)
907                  printf(" r%d (ra = %08x)\n", instr.ra, instr.addr);
908 <        if (instr.transfer_type == TYPE_LOAD)
908 >        if (instr.transfer_type == SIGSEGV_TRANSFER_LOAD)
909                  printf(" r%d (rd = 0)\n", instr.rd);
910   #endif
911          
912          if (instr.addr_mode == MODE_U || instr.addr_mode == MODE_UX)
913                  regs[instr.ra] = instr.addr;
914 <        if (instr.transfer_type == TYPE_LOAD)
914 >        if (instr.transfer_type == SIGSEGV_TRANSFER_LOAD)
915                  regs[instr.rd] = 0;
916          
917          *nip_p += 4;
# Line 607 | Line 924 | static bool powerpc_skip_instruction(uns
924   #ifndef SIGSEGV_FAULT_INSTRUCTION
925   #define SIGSEGV_FAULT_INSTRUCTION               SIGSEGV_INVALID_PC
926   #endif
927 + #ifndef SIGSEGV_FAULT_HANDLER_ARGLIST_1
928 + #define SIGSEGV_FAULT_HANDLER_ARGLIST_1 SIGSEGV_FAULT_HANDLER_ARGLIST
929 + #endif
930 + #ifndef SIGSEGV_FAULT_HANDLER_INVOKE
931 + #define SIGSEGV_FAULT_HANDLER_INVOKE(ADDR, IP)  sigsegv_fault_handler(ADDR, IP)
932 + #endif
933  
934   // SIGSEGV recovery supported ?
935   #if defined(SIGSEGV_ALL_SIGNALS) && defined(SIGSEGV_FAULT_HANDLER_ARGLIST) && defined(SIGSEGV_FAULT_ADDRESS)
# Line 618 | Line 941 | static bool powerpc_skip_instruction(uns
941   *  SIGSEGV global handler
942   */
943  
944 < #ifdef HAVE_SIGSEGV_RECOVERY
945 < static void sigsegv_handler(SIGSEGV_FAULT_HANDLER_ARGLIST)
944 > #if defined(HAVE_SIGSEGV_RECOVERY) || defined(HAVE_MACH_EXCEPTIONS)
945 > // This function handles the badaccess to memory.
946 > // It is called from the signal handler or the exception handler.
947 > static bool handle_badaccess(SIGSEGV_FAULT_HANDLER_ARGLIST_1)
948   {
949          sigsegv_address_t fault_address = (sigsegv_address_t)SIGSEGV_FAULT_ADDRESS;
950          sigsegv_address_t fault_instruction = (sigsegv_address_t)SIGSEGV_FAULT_INSTRUCTION;
626        bool fault_recovered = false;
951          
952          // Call user's handler and reinstall the global handler, if required
953 <        if (sigsegv_fault_handler(fault_address, fault_instruction)) {
954 < #if (defined(HAVE_SIGACTION) ? defined(SIGACTION_NEED_REINSTALL) : defined(SIGNAL_NEED_REINSTALL))
955 <                sigsegv_do_install_handler(sig);
953 >        switch (SIGSEGV_FAULT_HANDLER_INVOKE(fault_address, fault_instruction)) {
954 >        case SIGSEGV_RETURN_SUCCESS:
955 >                return true;
956 >
957 > #if HAVE_SIGSEGV_SKIP_INSTRUCTION
958 >        case SIGSEGV_RETURN_SKIP_INSTRUCTION:
959 >                // Call the instruction skipper with the register file
960 >                // available
961 >                if (SIGSEGV_SKIP_INSTRUCTION(SIGSEGV_REGISTER_FILE)) {
962 > #ifdef HAVE_MACH_EXCEPTIONS
963 >                        // Unlike UNIX signals where the thread state
964 >                        // is modified off of the stack, in Mach we
965 >                        // need to actually call thread_set_state to
966 >                        // have the register values updated.
967 >                        kern_return_t krc;
968 >
969 >                        krc = thread_set_state(thread,
970 >                                                                   MACHINE_THREAD_STATE, (thread_state_t)state,
971 >                                                                   MACHINE_THREAD_STATE_COUNT);
972 >                        MACH_CHECK_ERROR (thread_get_state, krc);
973 > #endif
974 >                        return true;
975 >                }
976 >                break;
977   #endif
633                fault_recovered = true;
978          }
979 < #if HAVE_SIGSEGV_SKIP_INSTRUCTION
980 <        else if (sigsegv_ignore_fault) {
981 <                // Call the instruction skipper with the register file available
982 <                if (SIGSEGV_SKIP_INSTRUCTION(SIGSEGV_REGISTER_FILE))
983 <                        fault_recovered = true;
979 >        
980 >        // We can't do anything with the fault_address, dump state?
981 >        if (sigsegv_state_dumper != 0)
982 >                sigsegv_state_dumper(fault_address, fault_instruction);
983 >
984 >        return false;
985 > }
986 > #endif
987 >
988 >
989 > /*
990 > * There are two mechanisms for handling a bad memory access,
991 > * Mach exceptions and UNIX signals. The implementation specific
992 > * code appears below. Its reponsibility is to call handle_badaccess
993 > * which is the routine that handles the fault in an implementation
994 > * agnostic manner. The implementation specific code below is then
995 > * reponsible for checking whether handle_badaccess was able
996 > * to handle the memory access error and perform any implementation
997 > * specific tasks necessary afterwards.
998 > */
999 >
1000 > #ifdef HAVE_MACH_EXCEPTIONS
1001 > /*
1002 > * We need to forward all exceptions that we do not handle.
1003 > * This is important, there are many exceptions that may be
1004 > * handled by other exception handlers. For example debuggers
1005 > * use exceptions and the exception hander is in another
1006 > * process in such a case. (Timothy J. Wood states in his
1007 > * message to the list that he based this code on that from
1008 > * gdb for Darwin.)
1009 > */
1010 > static inline kern_return_t
1011 > forward_exception(mach_port_t thread_port,
1012 >                                  mach_port_t task_port,
1013 >                                  exception_type_t exception_type,
1014 >                                  exception_data_t exception_data,
1015 >                                  mach_msg_type_number_t data_count,
1016 >                                  ExceptionPorts *oldExceptionPorts)
1017 > {
1018 >        kern_return_t kret;
1019 >        unsigned int portIndex;
1020 >        mach_port_t port;
1021 >        exception_behavior_t behavior;
1022 >        thread_state_flavor_t flavor;
1023 >        thread_state_t thread_state;
1024 >        mach_msg_type_number_t thread_state_count;
1025 >
1026 >        for (portIndex = 0; portIndex < oldExceptionPorts->maskCount; portIndex++) {
1027 >                if (oldExceptionPorts->masks[portIndex] & (1 << exception_type)) {
1028 >                        // This handler wants the exception
1029 >                        break;
1030 >                }
1031 >        }
1032 >
1033 >        if (portIndex >= oldExceptionPorts->maskCount) {
1034 >                fprintf(stderr, "No handler for exception_type = %d. Not fowarding\n", exception_type);
1035 >                return KERN_FAILURE;
1036          }
1037 +
1038 +        port = oldExceptionPorts->handlers[portIndex];
1039 +        behavior = oldExceptionPorts->behaviors[portIndex];
1040 +        flavor = oldExceptionPorts->flavors[portIndex];
1041 +
1042 +        /*
1043 +         fprintf(stderr, "forwarding exception, port = 0x%x, behaviour = %d, flavor = %d\n", port, behavior, flavor);
1044 +         */
1045 +
1046 +        if (behavior != EXCEPTION_DEFAULT) {
1047 +                thread_state_count = THREAD_STATE_MAX;
1048 +                kret = thread_get_state (thread_port, flavor, thread_state,
1049 +                                                                 &thread_state_count);
1050 +                MACH_CHECK_ERROR (thread_get_state, kret);
1051 +        }
1052 +
1053 +        switch (behavior) {
1054 +        case EXCEPTION_DEFAULT:
1055 +          // fprintf(stderr, "forwarding to exception_raise\n");
1056 +          kret = exception_raise(port, thread_port, task_port, exception_type,
1057 +                                                         exception_data, data_count);
1058 +          MACH_CHECK_ERROR (exception_raise, kret);
1059 +          break;
1060 +        case EXCEPTION_STATE:
1061 +          // fprintf(stderr, "forwarding to exception_raise_state\n");
1062 +          kret = exception_raise_state(port, exception_type, exception_data,
1063 +                                                                   data_count, &flavor,
1064 +                                                                   thread_state, thread_state_count,
1065 +                                                                   thread_state, &thread_state_count);
1066 +          MACH_CHECK_ERROR (exception_raise_state, kret);
1067 +          break;
1068 +        case EXCEPTION_STATE_IDENTITY:
1069 +          // fprintf(stderr, "forwarding to exception_raise_state_identity\n");
1070 +          kret = exception_raise_state_identity(port, thread_port, task_port,
1071 +                                                                                        exception_type, exception_data,
1072 +                                                                                        data_count, &flavor,
1073 +                                                                                        thread_state, thread_state_count,
1074 +                                                                                        thread_state, &thread_state_count);
1075 +          MACH_CHECK_ERROR (exception_raise_state_identity, kret);
1076 +          break;
1077 +        default:
1078 +          fprintf(stderr, "forward_exception got unknown behavior\n");
1079 +          break;
1080 +        }
1081 +
1082 +        if (behavior != EXCEPTION_DEFAULT) {
1083 +                kret = thread_set_state (thread_port, flavor, thread_state,
1084 +                                                                 thread_state_count);
1085 +                MACH_CHECK_ERROR (thread_set_state, kret);
1086 +        }
1087 +
1088 +        return KERN_SUCCESS;
1089 + }
1090 +
1091 + /*
1092 + * This is the code that actually handles the exception.
1093 + * It is called by exc_server. For Darwin 5 Apple changed
1094 + * this a bit from how this family of functions worked in
1095 + * Mach. If you are familiar with that it is a little
1096 + * different. The main variation that concerns us here is
1097 + * that code is an array of exception specific codes and
1098 + * codeCount is a count of the number of codes in the code
1099 + * array. In typical Mach all exceptions have a code
1100 + * and sub-code. It happens to be the case that for a
1101 + * EXC_BAD_ACCESS exception the first entry is the type of
1102 + * bad access that occurred and the second entry is the
1103 + * faulting address so these entries correspond exactly to
1104 + * how the code and sub-code are used on Mach.
1105 + *
1106 + * This is a MIG interface. No code in Basilisk II should
1107 + * call this directley. This has to have external C
1108 + * linkage because that is what exc_server expects.
1109 + */
1110 + kern_return_t
1111 + catch_exception_raise(mach_port_t exception_port,
1112 +                                          mach_port_t thread,
1113 +                                          mach_port_t task,
1114 +                                          exception_type_t exception,
1115 +                                          exception_data_t code,
1116 +                                          mach_msg_type_number_t codeCount)
1117 + {
1118 +        ppc_thread_state_t state;
1119 +        kern_return_t krc;
1120 +
1121 +        if ((exception == EXC_BAD_ACCESS)  && (codeCount >= 2)) {
1122 +                if (handle_badaccess(SIGSEGV_FAULT_HANDLER_ARGS))
1123 +                        return KERN_SUCCESS;
1124 +        }
1125 +
1126 +        // In Mach we do not need to remove the exception handler.
1127 +        // If we forward the exception, eventually some exception handler
1128 +        // will take care of this exception.
1129 +        krc = forward_exception(thread, task, exception, code, codeCount, &ports);
1130 +
1131 +        return krc;
1132 + }
1133   #endif
1134  
1135 <        if (!fault_recovered) {
1136 <                // FAIL: reinstall default handler for "safe" crash
1135 > #ifdef HAVE_SIGSEGV_RECOVERY
1136 > // Handle bad memory accesses with signal handler
1137 > static void sigsegv_handler(SIGSEGV_FAULT_HANDLER_ARGLIST)
1138 > {
1139 >        // Call handler and reinstall the global handler, if required
1140 >        if (handle_badaccess(SIGSEGV_FAULT_HANDLER_ARGS)) {
1141 > #if (defined(HAVE_SIGACTION) ? defined(SIGACTION_NEED_REINSTALL) : defined(SIGNAL_NEED_REINSTALL))
1142 >                sigsegv_do_install_handler(sig);
1143 > #endif
1144 >                return;
1145 >        }
1146 >
1147 >        // Failure: reinstall default handler for "safe" crash
1148   #define FAULT_HANDLER(sig) signal(sig, SIG_DFL);
1149 <                SIGSEGV_ALL_SIGNALS
1149 >        SIGSEGV_ALL_SIGNALS
1150   #undef FAULT_HANDLER
648                
649                // We can't do anything with the fault_address, dump state?
650                if (sigsegv_state_dumper != 0)
651                        sigsegv_state_dumper(fault_address, fault_instruction);
652        }
1151   }
1152   #endif
1153  
# Line 663 | Line 1161 | static bool sigsegv_do_install_handler(i
1161   {
1162          // Setup SIGSEGV handler to process writes to frame buffer
1163   #ifdef HAVE_SIGACTION
1164 <        struct sigaction vosf_sa;
1165 <        sigemptyset(&vosf_sa.sa_mask);
1166 <        vosf_sa.sa_sigaction = sigsegv_handler;
1167 <        vosf_sa.sa_flags = SA_SIGINFO;
1168 <        return (sigaction(sig, &vosf_sa, 0) == 0);
1164 >        struct sigaction sigsegv_sa;
1165 >        sigemptyset(&sigsegv_sa.sa_mask);
1166 >        sigsegv_sa.sa_sigaction = sigsegv_handler;
1167 >        sigsegv_sa.sa_flags = SA_SIGINFO;
1168 >        return (sigaction(sig, &sigsegv_sa, 0) == 0);
1169   #else
1170          return (signal(sig, (signal_handler)sigsegv_handler) != SIG_ERR);
1171   #endif
# Line 679 | Line 1177 | static bool sigsegv_do_install_handler(i
1177   {
1178          // Setup SIGSEGV handler to process writes to frame buffer
1179   #ifdef HAVE_SIGACTION
1180 <        struct sigaction vosf_sa;
1181 <        sigemptyset(&vosf_sa.sa_mask);
1182 <        vosf_sa.sa_handler = (signal_handler)sigsegv_handler;
1180 >        struct sigaction sigsegv_sa;
1181 >        sigemptyset(&sigsegv_sa.sa_mask);
1182 >        sigsegv_sa.sa_handler = (signal_handler)sigsegv_handler;
1183 >        sigsegv_sa.sa_flags = 0;
1184   #if !EMULATED_68K && defined(__NetBSD__)
1185 <        sigaddset(&vosf_sa.sa_mask, SIGALRM);
1186 <        vosf_sa.sa_flags = SA_ONSTACK;
688 < #else
689 <        vosf_sa.sa_flags = 0;
1185 >        sigaddset(&sigsegv_sa.sa_mask, SIGALRM);
1186 >        sigsegv_sa.sa_flags |= SA_ONSTACK;
1187   #endif
1188 <        return (sigaction(sig, &vosf_sa, 0) == 0);
1188 >        return (sigaction(sig, &sigsegv_sa, 0) == 0);
1189   #else
1190          return (signal(sig, (signal_handler)sigsegv_handler) != SIG_ERR);
1191   #endif
1192   }
1193   #endif
1194  
1195 < bool sigsegv_install_handler(sigsegv_fault_handler_t handler)
1195 > #if defined(HAVE_MACH_EXCEPTIONS)
1196 > static bool sigsegv_do_install_handler(sigsegv_fault_handler_t handler)
1197   {
1198 < #ifdef HAVE_SIGSEGV_RECOVERY
1198 >        /*
1199 >         * Except for the exception port functions, this should be
1200 >         * pretty much stock Mach. If later you choose to support
1201 >         * other Mach's besides Darwin, just check for __MACH__
1202 >         * here and __APPLE__ where the actual differences are.
1203 >         */
1204 > #if defined(__APPLE__) && defined(__MACH__)
1205 >        if (sigsegv_fault_handler != NULL) {
1206 >                sigsegv_fault_handler = handler;
1207 >                return true;
1208 >        }
1209 >
1210 >        kern_return_t krc;
1211 >
1212 >        // create the the exception port
1213 >        krc = mach_port_allocate(mach_task_self(),
1214 >                          MACH_PORT_RIGHT_RECEIVE, &_exceptionPort);
1215 >        if (krc != KERN_SUCCESS) {
1216 >                mach_error("mach_port_allocate", krc);
1217 >                return false;
1218 >        }
1219 >
1220 >        // add a port send right
1221 >        krc = mach_port_insert_right(mach_task_self(),
1222 >                              _exceptionPort, _exceptionPort,
1223 >                              MACH_MSG_TYPE_MAKE_SEND);
1224 >        if (krc != KERN_SUCCESS) {
1225 >                mach_error("mach_port_insert_right", krc);
1226 >                return false;
1227 >        }
1228 >
1229 >        // get the old exception ports
1230 >        ports.maskCount = sizeof (ports.masks) / sizeof (ports.masks[0]);
1231 >        krc = thread_get_exception_ports(mach_thread_self(), EXC_MASK_BAD_ACCESS, ports.masks,
1232 >                                &ports.maskCount, ports.handlers, ports.behaviors, ports.flavors);
1233 >        if (krc != KERN_SUCCESS) {
1234 >                mach_error("thread_get_exception_ports", krc);
1235 >                return false;
1236 >        }
1237 >
1238 >        // set the new exception port
1239 >        //
1240 >        // We could have used EXCEPTION_STATE_IDENTITY instead of
1241 >        // EXCEPTION_DEFAULT to get the thread state in the initial
1242 >        // message, but it turns out that in the common case this is not
1243 >        // neccessary. If we need it we can later ask for it from the
1244 >        // suspended thread.
1245 >        //
1246 >        // Even with THREAD_STATE_NONE, Darwin provides the program
1247 >        // counter in the thread state.  The comments in the header file
1248 >        // seem to imply that you can count on the GPR's on an exception
1249 >        // as well but just to be safe I use MACHINE_THREAD_STATE because
1250 >        // you have to ask for all of the GPR's anyway just to get the
1251 >        // program counter. In any case because of update effective
1252 >        // address from immediate and update address from effective
1253 >        // addresses of ra and rb modes (as good an name as any for these
1254 >        // addressing modes) used in PPC instructions, you will need the
1255 >        // GPR state anyway.
1256 >        krc = thread_set_exception_ports(mach_thread_self(), EXC_MASK_BAD_ACCESS, _exceptionPort,
1257 >                                EXCEPTION_DEFAULT, MACHINE_THREAD_STATE);
1258 >        if (krc != KERN_SUCCESS) {
1259 >                mach_error("thread_set_exception_ports", krc);
1260 >                return false;
1261 >        }
1262 >
1263 >        // create the exception handler thread
1264 >        if (pthread_create(&exc_thread, NULL, &handleExceptions, NULL) != 0) {
1265 >                (void)fprintf(stderr, "creation of exception thread failed\n");
1266 >                return false;
1267 >        }
1268 >
1269 >        // do not care about the exception thread any longer, let is run standalone
1270 >        (void)pthread_detach(exc_thread);
1271 >
1272          sigsegv_fault_handler = handler;
1273 +        return true;
1274 + #else
1275 +        return false;
1276 + #endif
1277 + }
1278 + #endif
1279 +
1280 + bool sigsegv_install_handler(sigsegv_fault_handler_t handler)
1281 + {
1282 + #if defined(HAVE_SIGSEGV_RECOVERY)
1283          bool success = true;
1284   #define FAULT_HANDLER(sig) success = success && sigsegv_do_install_handler(sig);
1285          SIGSEGV_ALL_SIGNALS
1286   #undef FAULT_HANDLER
1287 +        if (success)
1288 +            sigsegv_fault_handler = handler;
1289          return success;
1290 + #elif defined(HAVE_MACH_EXCEPTIONS)
1291 +        return sigsegv_do_install_handler(handler);
1292   #else
1293          // FAIL: no siginfo_t nor sigcontext subterfuge is available
1294          return false;
# Line 717 | Line 1302 | bool sigsegv_install_handler(sigsegv_fau
1302  
1303   void sigsegv_deinstall_handler(void)
1304   {
1305 +  // We do nothing for Mach exceptions, the thread would need to be
1306 +  // suspended if not already so, and we might mess with other
1307 +  // exception handlers that came after we registered ours. There is
1308 +  // no need to remove the exception handler, in fact this function is
1309 +  // not called anywhere in Basilisk II.
1310   #ifdef HAVE_SIGSEGV_RECOVERY
1311          sigsegv_fault_handler = 0;
1312   #define FAULT_HANDLER(sig) signal(sig, SIG_DFL);
# Line 727 | Line 1317 | void sigsegv_deinstall_handler(void)
1317  
1318  
1319   /*
730 *  SIGSEGV ignore state modifier
731 */
732
733 void sigsegv_set_ignore_state(bool ignore_fault)
734 {
735        sigsegv_ignore_fault = ignore_fault;
736 }
737
738
739 /*
1320   *  Set callback function when we cannot handle the fault
1321   */
1322  
# Line 757 | Line 1337 | void sigsegv_set_dump_state(sigsegv_stat
1337   #include <sys/mman.h>
1338   #include "vm_alloc.h"
1339  
1340 + const int REF_INDEX = 123;
1341 + const int REF_VALUE = 45;
1342 +
1343   static int page_size;
1344   static volatile char * page = 0;
1345   static volatile int handler_called = 0;
1346  
1347 < static bool sigsegv_test_handler(sigsegv_address_t fault_address, sigsegv_address_t instruction_address)
1347 > #ifdef __GNUC__
1348 > // Code range where we expect the fault to come from
1349 > static void *b_region, *e_region;
1350 > #endif
1351 >
1352 > static sigsegv_return_t sigsegv_test_handler(sigsegv_address_t fault_address, sigsegv_address_t instruction_address)
1353   {
1354          handler_called++;
1355 <        if ((fault_address - 123) != page)
1356 <                exit(1);
1355 >        if ((fault_address - REF_INDEX) != page)
1356 >                exit(10);
1357 > #ifdef __GNUC__
1358 >        // Make sure reported fault instruction address falls into
1359 >        // expected code range
1360 >        if (instruction_address != SIGSEGV_INVALID_PC
1361 >                && ((instruction_address <  (sigsegv_address_t)b_region) ||
1362 >                        (instruction_address >= (sigsegv_address_t)e_region)))
1363 >                exit(11);
1364 > #endif
1365          if (vm_protect((char *)((unsigned long)fault_address & -page_size), page_size, VM_PAGE_READ | VM_PAGE_WRITE) != 0)
1366 <                exit(1);
1367 <        return true;
1366 >                exit(12);
1367 >        return SIGSEGV_RETURN_SUCCESS;
1368   }
1369  
1370   #ifdef HAVE_SIGSEGV_SKIP_INSTRUCTION
1371 < static bool sigsegv_insn_handler(sigsegv_address_t fault_address, sigsegv_address_t instruction_address)
1371 > static sigsegv_return_t sigsegv_insn_handler(sigsegv_address_t fault_address, sigsegv_address_t instruction_address)
1372   {
1373 <        return false;
1373 >        if (((unsigned long)fault_address - (unsigned long)page) < page_size) {
1374 > #ifdef __GNUC__
1375 >                // Make sure reported fault instruction address falls into
1376 >                // expected code range
1377 >                if (instruction_address != SIGSEGV_INVALID_PC
1378 >                        && ((instruction_address <  (sigsegv_address_t)b_region) ||
1379 >                                (instruction_address >= (sigsegv_address_t)e_region)))
1380 >                        return SIGSEGV_RETURN_FAILURE;
1381 > #endif
1382 >                return SIGSEGV_RETURN_SKIP_INSTRUCTION;
1383 >        }
1384 >
1385 >        return SIGSEGV_RETURN_FAILURE;
1386 > }
1387 >
1388 > // More sophisticated tests for instruction skipper
1389 > static bool arch_insn_skipper_tests()
1390 > {
1391 > #if (defined(i386) || defined(__i386__)) || defined(__x86_64__)
1392 >        static const unsigned char code[] = {
1393 >                0x8a, 0x00,                    // mov    (%eax),%al
1394 >                0x8a, 0x2c, 0x18,              // mov    (%eax,%ebx,1),%ch
1395 >                0x88, 0x20,                    // mov    %ah,(%eax)
1396 >                0x88, 0x08,                    // mov    %cl,(%eax)
1397 >                0x66, 0x8b, 0x00,              // mov    (%eax),%ax
1398 >                0x66, 0x8b, 0x0c, 0x18,        // mov    (%eax,%ebx,1),%cx
1399 >                0x66, 0x89, 0x00,              // mov    %ax,(%eax)
1400 >                0x66, 0x89, 0x0c, 0x18,        // mov    %cx,(%eax,%ebx,1)
1401 >                0x8b, 0x00,                    // mov    (%eax),%eax
1402 >                0x8b, 0x0c, 0x18,              // mov    (%eax,%ebx,1),%ecx
1403 >                0x89, 0x00,                    // mov    %eax,(%eax)
1404 >                0x89, 0x0c, 0x18,              // mov    %ecx,(%eax,%ebx,1)
1405 > #if defined(__x86_64__)
1406 >                0x44, 0x8a, 0x00,              // mov    (%rax),%r8b
1407 >                0x44, 0x8a, 0x20,              // mov    (%rax),%r12b
1408 >                0x42, 0x8a, 0x3c, 0x10,        // mov    (%rax,%r10,1),%dil
1409 >                0x44, 0x88, 0x00,              // mov    %r8b,(%rax)
1410 >                0x44, 0x88, 0x20,              // mov    %r12b,(%rax)
1411 >                0x42, 0x88, 0x3c, 0x10,        // mov    %dil,(%rax,%r10,1)
1412 >                0x66, 0x44, 0x8b, 0x00,        // mov    (%rax),%r8w
1413 >                0x66, 0x42, 0x8b, 0x0c, 0x10,  // mov    (%rax,%r10,1),%cx
1414 >                0x66, 0x44, 0x89, 0x00,        // mov    %r8w,(%rax)
1415 >                0x66, 0x42, 0x89, 0x0c, 0x10,  // mov    %cx,(%rax,%r10,1)
1416 >                0x44, 0x8b, 0x00,              // mov    (%rax),%r8d
1417 >                0x42, 0x8b, 0x0c, 0x10,        // mov    (%rax,%r10,1),%ecx
1418 >                0x44, 0x89, 0x00,              // mov    %r8d,(%rax)
1419 >                0x42, 0x89, 0x0c, 0x10,        // mov    %ecx,(%rax,%r10,1)
1420 >                0x48, 0x8b, 0x08,              // mov    (%rax),%rcx
1421 >                0x4c, 0x8b, 0x18,              // mov    (%rax),%r11
1422 >                0x4a, 0x8b, 0x0c, 0x10,        // mov    (%rax,%r10,1),%rcx
1423 >                0x4e, 0x8b, 0x1c, 0x10,        // mov    (%rax,%r10,1),%r11
1424 >                0x48, 0x89, 0x08,              // mov    %rcx,(%rax)
1425 >                0x4c, 0x89, 0x18,              // mov    %r11,(%rax)
1426 >                0x4a, 0x89, 0x0c, 0x10,        // mov    %rcx,(%rax,%r10,1)
1427 >                0x4e, 0x89, 0x1c, 0x10,        // mov    %r11,(%rax,%r10,1)
1428 > #endif
1429 >                0                              // end
1430 >        };
1431 >        const int N_REGS = 20;
1432 >        unsigned long regs[N_REGS];
1433 >        for (int i = 0; i < N_REGS; i++)
1434 >                regs[i] = i;
1435 >        const unsigned long start_code = (unsigned long)&code;
1436 >        regs[X86_REG_EIP] = start_code;
1437 >        while ((regs[X86_REG_EIP] - start_code) < (sizeof(code) - 1)
1438 >                   && ix86_skip_instruction(regs))
1439 >                ; /* simply iterate */
1440 >        return (regs[X86_REG_EIP] - start_code) == (sizeof(code) - 1);
1441 > #endif
1442 >        return true;
1443   }
1444   #endif
1445  
# Line 785 | Line 1450 | int main(void)
1450  
1451          page_size = getpagesize();
1452          if ((page = (char *)vm_acquire(page_size)) == VM_MAP_FAILED)
1453 <                return 1;
1453 >                return 2;
1454          
1455 +        memset((void *)page, 0, page_size);
1456          if (vm_protect((char *)page, page_size, VM_PAGE_READ) < 0)
1457 <                return 1;
1457 >                return 3;
1458          
1459          if (!sigsegv_install_handler(sigsegv_test_handler))
1460 <                return 1;
795 <        
796 <        page[123] = 45;
797 <        page[123] = 45;
1460 >                return 4;
1461          
1462 + #ifdef __GNUC__
1463 +        b_region = &&L_b_region1;
1464 +        e_region = &&L_e_region1;
1465 + #endif
1466 + L_b_region1:
1467 +        page[REF_INDEX] = REF_VALUE;
1468 +        if (page[REF_INDEX] != REF_VALUE)
1469 +          exit(20);
1470 +        page[REF_INDEX] = REF_VALUE;
1471 + L_e_region1:
1472 +
1473          if (handler_called != 1)
1474 <                return 1;
1474 >                return 5;
1475  
1476   #ifdef HAVE_SIGSEGV_SKIP_INSTRUCTION
1477          if (!sigsegv_install_handler(sigsegv_insn_handler))
1478 <                return 1;
1478 >                return 6;
1479          
1480          if (vm_protect((char *)page, page_size, VM_PAGE_READ | VM_PAGE_WRITE) < 0)
1481 <                return 1;
1481 >                return 7;
1482          
1483          for (int i = 0; i < page_size; i++)
1484                  page[i] = (i + 1) % page_size;
1485          
1486          if (vm_protect((char *)page, page_size, VM_PAGE_NOACCESS) < 0)
1487 <                return 1;
1487 >                return 8;
1488          
815        sigsegv_set_ignore_state(true);
816
1489   #define TEST_SKIP_INSTRUCTION(TYPE) do {                                \
1490 <                const unsigned int TAG = 0x12345678;                    \
1490 >                const unsigned long TAG = 0x12345678 |                  \
1491 >                (sizeof(long) == 8 ? 0x9abcdef0UL << 31 : 0);   \
1492                  TYPE data = *((TYPE *)(page + sizeof(TYPE)));   \
1493 <                volatile unsigned int effect = data + TAG;              \
1493 >                volatile unsigned long effect = data + TAG;             \
1494                  if (effect != TAG)                                                              \
1495 <                        return 1;                                                                       \
1495 >                        return 9;                                                                       \
1496          } while (0)
1497          
1498 + #ifdef __GNUC__
1499 +        b_region = &&L_b_region2;
1500 +        e_region = &&L_e_region2;
1501 + #endif
1502 + L_b_region2:
1503          TEST_SKIP_INSTRUCTION(unsigned char);
1504          TEST_SKIP_INSTRUCTION(unsigned short);
1505          TEST_SKIP_INSTRUCTION(unsigned int);
1506 +        TEST_SKIP_INSTRUCTION(unsigned long);
1507 + L_e_region2:
1508 +
1509 +        if (!arch_insn_skipper_tests())
1510 +                return 20;
1511   #endif
1512  
1513          vm_exit();

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