215 |
|
#endif |
216 |
|
#define SIGSEGV_FAULT_HANDLER_ARGLIST int sig, siginfo_t *sip, void *scp |
217 |
|
#define SIGSEGV_FAULT_ADDRESS sip->si_addr |
218 |
+ |
#if defined(__NetBSD__) || defined(__FreeBSD__) |
219 |
|
#if (defined(i386) || defined(__i386__)) |
220 |
|
#define SIGSEGV_FAULT_INSTRUCTION (((struct sigcontext *)scp)->sc_eip) |
221 |
< |
#define SIGSEGV_REGISTER_FILE ((unsigned int *)&(((struct sigcontext *)scp)->sc_edi)) |
221 |
> |
#define SIGSEGV_REGISTER_FILE ((unsigned int *)&(((struct sigcontext *)scp)->sc_edi)) /* EDI is the first GPR (even below EIP) in sigcontext */ |
222 |
|
#define SIGSEGV_SKIP_INSTRUCTION ix86_skip_instruction |
223 |
|
#endif |
224 |
+ |
#endif |
225 |
|
#if defined(__linux__) |
226 |
|
#if (defined(i386) || defined(__i386__)) |
227 |
|
#include <sys/ucontext.h> |
230 |
|
#define SIGSEGV_REGISTER_FILE (unsigned int *)SIGSEGV_CONTEXT_REGS |
231 |
|
#define SIGSEGV_SKIP_INSTRUCTION ix86_skip_instruction |
232 |
|
#endif |
233 |
+ |
#if (defined(x86_64) || defined(__x86_64__)) |
234 |
+ |
#include <sys/ucontext.h> |
235 |
+ |
#define SIGSEGV_CONTEXT_REGS (((ucontext_t *)scp)->uc_mcontext.gregs) |
236 |
+ |
#define SIGSEGV_FAULT_INSTRUCTION SIGSEGV_CONTEXT_REGS[16] /* should use REG_RIP instead */ |
237 |
+ |
#define SIGSEGV_REGISTER_FILE (unsigned long *)SIGSEGV_CONTEXT_REGS |
238 |
+ |
#endif |
239 |
|
#if (defined(ia64) || defined(__ia64__)) |
240 |
|
#define SIGSEGV_FAULT_INSTRUCTION (((struct sigcontext *)scp)->sc_ip & ~0x3ULL) /* slot number is in bits 0 and 1 */ |
241 |
|
#endif |
471 |
|
// Decode instruction |
472 |
|
switch (eip[0]) { |
473 |
|
case 0x0f: |
474 |
< |
if (eip[1] == 0xb7) { // MOVZX r32, r/m16 |
474 |
> |
switch (eip[1]) { |
475 |
> |
case 0xb6: // MOVZX r32, r/m8 |
476 |
> |
case 0xb7: // MOVZX r32, r/m16 |
477 |
|
switch (eip[2] & 0xc0) { |
478 |
|
case 0x80: |
479 |
|
reg = (eip[2] >> 3) & 7; |
489 |
|
break; |
490 |
|
} |
491 |
|
len += 3 + ix86_step_over_modrm(eip + 2); |
492 |
+ |
break; |
493 |
|
} |
494 |
|
break; |
495 |
|
case 0x8a: // MOV r8, r/m8 |