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root/cebix/BasiliskII/src/Unix/sigsegv.cpp

Comparing BasiliskII/src/Unix/sigsegv.cpp (file contents):
Revision 1.14 by gbeauche, 2002-05-20T15:56:13Z vs.
Revision 1.37 by gbeauche, 2003-12-20T07:43:56Z

#	Line 4 | Line 4
4		*  Derived from Bruno Haible's work on his SIGSEGV library for clisp
5		*  <http://clisp.sourceforge.net/>
6		*
7	+	*  MacOS X support derived from the post by Timothy J. Wood to the
8	+	*  omnigroup macosx-dev list:
9	+	*    Mach Exception Handlers 101 (Was Re: ptrace, gdb)
10	+	*    tjw@omnigroup.com Sun, 4 Jun 2000
11	+	*    www.omnigroup.com/mailman/archive/macosx-dev/2000-June/002030.html
12	+	*
13		*  Basilisk II (C) 1997-2002 Christian Bauer
14		*
15		*  This program is free software; you can redistribute it and/or modify
#	Line 29 | Line 35
35		#include "config.h"
36		#endif
37
38	+	#include <list>
39		#include <signal.h>
40		#include "sigsegv.h"
41
42	+	#ifndef NO_STD_NAMESPACE
43	+	using std::list;
44	+	#endif
45	+
46		// Return value type of a signal handler (standard type if not defined)
47		#ifndef RETSIGTYPE
48		#define RETSIGTYPE void
#	Line 40 | Line 51
51		// Type of the system signal handler
52		typedef RETSIGTYPE (*signal_handler)(int);
53
43	–	// Is the fault to be ignored?
44	–	static bool sigsegv_ignore_fault = false;
45	–
54		// User's SIGSEGV handler
55		static sigsegv_fault_handler_t sigsegv_fault_handler = 0;
56
#	Line 57 | Line 65 | static bool sigsegv_do_install_handler(i
65		*  Instruction decoding aids
66		*/
67
60	–	// Transfer type
61	–	enum transfer_type_t {
62	–	TYPE_UNKNOWN,
63	–	TYPE_LOAD,
64	–	TYPE_STORE
65	–	};
66	–
68		// Transfer size
69		enum transfer_size_t {
70		SIZE_UNKNOWN,
71		SIZE_BYTE,
72	<	SIZE_WORD,
73	<	SIZE_LONG
72	>	SIZE_WORD, // 2 bytes
73	>	SIZE_LONG, // 4 bytes
74	>	SIZE_QUAD, // 8 bytes
75		};
76
77	+	// Transfer type
78	+	typedef sigsegv_transfer_type_t transfer_type_t;
79	+
80		#if (defined(powerpc) || defined(__powerpc__) || defined(__ppc__))
81		// Addressing mode
82		enum addressing_mode_t {
#	Line 103 | Line 108 | static void powerpc_decode_instruction(i
108		signed int imm = (signed short)(opcode & 0xffff);
109
110		// Analyze opcode
111	<	transfer_type_t transfer_type = TYPE_UNKNOWN;
111	>	transfer_type_t transfer_type = SIGSEGV_TRANSFER_UNKNOWN;
112		transfer_size_t transfer_size = SIZE_UNKNOWN;
113		addressing_mode_t addr_mode = MODE_UNKNOWN;
114		switch (primop) {
115		case 31:
116		switch (exop) {
117		case 23:        // lwzx
118	<	transfer_type = TYPE_LOAD; transfer_size = SIZE_LONG; addr_mode = MODE_X; break;
118	>	transfer_type = SIGSEGV_TRANSFER_LOAD; transfer_size = SIZE_LONG; addr_mode = MODE_X; break;
119		case 55:        // lwzux
120	<	transfer_type = TYPE_LOAD; transfer_size = SIZE_LONG; addr_mode = MODE_UX; break;
120	>	transfer_type = SIGSEGV_TRANSFER_LOAD; transfer_size = SIZE_LONG; addr_mode = MODE_UX; break;
121		case 87:        // lbzx
122	<	transfer_type = TYPE_LOAD; transfer_size = SIZE_BYTE; addr_mode = MODE_X; break;
122	>	transfer_type = SIGSEGV_TRANSFER_LOAD; transfer_size = SIZE_BYTE; addr_mode = MODE_X; break;
123		case 119:       // lbzux
124	<	transfer_type = TYPE_LOAD; transfer_size = SIZE_BYTE; addr_mode = MODE_UX; break;
124	>	transfer_type = SIGSEGV_TRANSFER_LOAD; transfer_size = SIZE_BYTE; addr_mode = MODE_UX; break;
125		case 151:       // stwx
126	<	transfer_type = TYPE_STORE; transfer_size = SIZE_LONG; addr_mode = MODE_X; break;
126	>	transfer_type = SIGSEGV_TRANSFER_STORE; transfer_size = SIZE_LONG; addr_mode = MODE_X; break;
127		case 183:       // stwux
128	<	transfer_type = TYPE_STORE; transfer_size = SIZE_LONG; addr_mode = MODE_UX; break;
128	>	transfer_type = SIGSEGV_TRANSFER_STORE; transfer_size = SIZE_LONG; addr_mode = MODE_UX; break;
129		case 215:       // stbx
130	<	transfer_type = TYPE_STORE; transfer_size = SIZE_BYTE; addr_mode = MODE_X; break;
130	>	transfer_type = SIGSEGV_TRANSFER_STORE; transfer_size = SIZE_BYTE; addr_mode = MODE_X; break;
131		case 247:       // stbux
132	<	transfer_type = TYPE_STORE; transfer_size = SIZE_BYTE; addr_mode = MODE_UX; break;
132	>	transfer_type = SIGSEGV_TRANSFER_STORE; transfer_size = SIZE_BYTE; addr_mode = MODE_UX; break;
133		case 279:       // lhzx
134	<	transfer_type = TYPE_LOAD; transfer_size = SIZE_WORD; addr_mode = MODE_X; break;
134	>	transfer_type = SIGSEGV_TRANSFER_LOAD; transfer_size = SIZE_WORD; addr_mode = MODE_X; break;
135		case 311:       // lhzux
136	<	transfer_type = TYPE_LOAD; transfer_size = SIZE_WORD; addr_mode = MODE_UX; break;
136	>	transfer_type = SIGSEGV_TRANSFER_LOAD; transfer_size = SIZE_WORD; addr_mode = MODE_UX; break;
137		case 343:       // lhax
138	<	transfer_type = TYPE_LOAD; transfer_size = SIZE_WORD; addr_mode = MODE_X; break;
138	>	transfer_type = SIGSEGV_TRANSFER_LOAD; transfer_size = SIZE_WORD; addr_mode = MODE_X; break;
139		case 375:       // lhaux
140	<	transfer_type = TYPE_LOAD; transfer_size = SIZE_WORD; addr_mode = MODE_UX; break;
140	>	transfer_type = SIGSEGV_TRANSFER_LOAD; transfer_size = SIZE_WORD; addr_mode = MODE_UX; break;
141		case 407:       // sthx
142	<	transfer_type = TYPE_STORE; transfer_size = SIZE_WORD; addr_mode = MODE_X; break;
142	>	transfer_type = SIGSEGV_TRANSFER_STORE; transfer_size = SIZE_WORD; addr_mode = MODE_X; break;
143		case 439:       // sthux
144	<	transfer_type = TYPE_STORE; transfer_size = SIZE_WORD; addr_mode = MODE_UX; break;
144	>	transfer_type = SIGSEGV_TRANSFER_STORE; transfer_size = SIZE_WORD; addr_mode = MODE_UX; break;
145		}
146		break;
147
148		case 32:        // lwz
149	<	transfer_type = TYPE_LOAD; transfer_size = SIZE_LONG; addr_mode = MODE_NORM; break;
149	>	transfer_type = SIGSEGV_TRANSFER_LOAD; transfer_size = SIZE_LONG; addr_mode = MODE_NORM; break;
150		case 33:        // lwzu
151	<	transfer_type = TYPE_LOAD; transfer_size = SIZE_LONG; addr_mode = MODE_U; break;
151	>	transfer_type = SIGSEGV_TRANSFER_LOAD; transfer_size = SIZE_LONG; addr_mode = MODE_U; break;
152		case 34:        // lbz
153	<	transfer_type = TYPE_LOAD; transfer_size = SIZE_BYTE; addr_mode = MODE_NORM; break;
153	>	transfer_type = SIGSEGV_TRANSFER_LOAD; transfer_size = SIZE_BYTE; addr_mode = MODE_NORM; break;
154		case 35:        // lbzu
155	<	transfer_type = TYPE_LOAD; transfer_size = SIZE_BYTE; addr_mode = MODE_U; break;
155	>	transfer_type = SIGSEGV_TRANSFER_LOAD; transfer_size = SIZE_BYTE; addr_mode = MODE_U; break;
156		case 36:        // stw
157	<	transfer_type = TYPE_STORE; transfer_size = SIZE_LONG; addr_mode = MODE_NORM; break;
157	>	transfer_type = SIGSEGV_TRANSFER_STORE; transfer_size = SIZE_LONG; addr_mode = MODE_NORM; break;
158		case 37:        // stwu
159	<	transfer_type = TYPE_STORE; transfer_size = SIZE_LONG; addr_mode = MODE_U; break;
159	>	transfer_type = SIGSEGV_TRANSFER_STORE; transfer_size = SIZE_LONG; addr_mode = MODE_U; break;
160		case 38:        // stb
161	<	transfer_type = TYPE_STORE; transfer_size = SIZE_BYTE; addr_mode = MODE_NORM; break;
161	>	transfer_type = SIGSEGV_TRANSFER_STORE; transfer_size = SIZE_BYTE; addr_mode = MODE_NORM; break;
162		case 39:        // stbu
163	<	transfer_type = TYPE_STORE; transfer_size = SIZE_BYTE; addr_mode = MODE_U; break;
163	>	transfer_type = SIGSEGV_TRANSFER_STORE; transfer_size = SIZE_BYTE; addr_mode = MODE_U; break;
164		case 40:        // lhz
165	<	transfer_type = TYPE_LOAD; transfer_size = SIZE_WORD; addr_mode = MODE_NORM; break;
165	>	transfer_type = SIGSEGV_TRANSFER_LOAD; transfer_size = SIZE_WORD; addr_mode = MODE_NORM; break;
166		case 41:        // lhzu
167	<	transfer_type = TYPE_LOAD; transfer_size = SIZE_WORD; addr_mode = MODE_U; break;
167	>	transfer_type = SIGSEGV_TRANSFER_LOAD; transfer_size = SIZE_WORD; addr_mode = MODE_U; break;
168		case 42:        // lha
169	<	transfer_type = TYPE_LOAD; transfer_size = SIZE_WORD; addr_mode = MODE_NORM; break;
169	>	transfer_type = SIGSEGV_TRANSFER_LOAD; transfer_size = SIZE_WORD; addr_mode = MODE_NORM; break;
170		case 43:        // lhau
171	<	transfer_type = TYPE_LOAD; transfer_size = SIZE_WORD; addr_mode = MODE_U; break;
171	>	transfer_type = SIGSEGV_TRANSFER_LOAD; transfer_size = SIZE_WORD; addr_mode = MODE_U; break;
172		case 44:        // sth
173	<	transfer_type = TYPE_STORE; transfer_size = SIZE_WORD; addr_mode = MODE_NORM; break;
173	>	transfer_type = SIGSEGV_TRANSFER_STORE; transfer_size = SIZE_WORD; addr_mode = MODE_NORM; break;
174		case 45:        // sthu
175	<	transfer_type = TYPE_STORE; transfer_size = SIZE_WORD; addr_mode = MODE_U; break;
175	>	transfer_type = SIGSEGV_TRANSFER_STORE; transfer_size = SIZE_WORD; addr_mode = MODE_U; break;
176		}
177
178		// Calculate effective address
#	Line 214 | Line 219 | static void powerpc_decode_instruction(i
219		#define SIGSEGV_ALL_SIGNALS                             FAULT_HANDLER(SIGSEGV)
220		#endif
221		#define SIGSEGV_FAULT_HANDLER_ARGLIST   int sig, siginfo_t *sip, void *scp
222	+	#define SIGSEGV_FAULT_HANDLER_ARGLIST_1 siginfo_t *sip, void *scp
223	+	#define SIGSEGV_FAULT_HANDLER_ARGS              sip, scp
224		#define SIGSEGV_FAULT_ADDRESS                   sip->si_addr
225	+	#if (defined(sgi) || defined(__sgi))
226	+	#include <ucontext.h>
227	+	#define SIGSEGV_CONTEXT_REGS                    (((ucontext_t *)scp)->uc_mcontext.gregs)
228	+	#define SIGSEGV_FAULT_INSTRUCTION               (unsigned long)SIGSEGV_CONTEXT_REGS[CTX_EPC]
229	+	#endif
230	+	#if defined(__sun__)
231	+	#if (defined(sparc) || defined(__sparc__))
232	+	#include <sys/ucontext.h>
233	+	#define SIGSEGV_CONTEXT_REGS                    (((ucontext_t *)scp)->uc_mcontext.gregs)
234	+	#define SIGSEGV_FAULT_INSTRUCTION               SIGSEGV_CONTEXT_REGS[REG_PC]
235	+	#endif
236	+	#endif
237	+	#if defined(__FreeBSD__)
238	+	#if (defined(i386) || defined(__i386__))
239	+	#define SIGSEGV_FAULT_INSTRUCTION               (((struct sigcontext *)scp)->sc_eip)
240	+	#define SIGSEGV_REGISTER_FILE                   ((unsigned long *)&(((struct sigcontext *)scp)->sc_edi)) /* EDI is the first GPR (even below EIP) in sigcontext */
241	+	#define SIGSEGV_SKIP_INSTRUCTION                ix86_skip_instruction
242	+	#endif
243	+	#endif
244		#if defined(__linux__)
245		#if (defined(i386) || defined(__i386__))
246		#include <sys/ucontext.h>
247		#define SIGSEGV_CONTEXT_REGS                    (((ucontext_t *)scp)->uc_mcontext.gregs)
248		#define SIGSEGV_FAULT_INSTRUCTION               SIGSEGV_CONTEXT_REGS[14] /* should use REG_EIP instead */
249	<	#define SIGSEGV_REGISTER_FILE                   (unsigned int *)SIGSEGV_CONTEXT_REGS
249	>	#define SIGSEGV_REGISTER_FILE                   (unsigned long *)SIGSEGV_CONTEXT_REGS
250	>	#define SIGSEGV_SKIP_INSTRUCTION                ix86_skip_instruction
251	>	#endif
252	>	#if (defined(x86_64) || defined(__x86_64__))
253	>	#include <sys/ucontext.h>
254	>	#define SIGSEGV_CONTEXT_REGS                    (((ucontext_t *)scp)->uc_mcontext.gregs)
255	>	#define SIGSEGV_FAULT_INSTRUCTION               SIGSEGV_CONTEXT_REGS[16] /* should use REG_RIP instead */
256	>	#define SIGSEGV_REGISTER_FILE                   (unsigned long *)SIGSEGV_CONTEXT_REGS
257		#define SIGSEGV_SKIP_INSTRUCTION                ix86_skip_instruction
258		#endif
259		#if (defined(ia64) || defined(__ia64__))
#	Line 243 | Line 276 | static void powerpc_decode_instruction(i
276		#if (defined(i386) || defined(__i386__))
277		#include <asm/sigcontext.h>
278		#define SIGSEGV_FAULT_HANDLER_ARGLIST   int sig, struct sigcontext scs
279	<	#define SIGSEGV_FAULT_ADDRESS                   scs.cr2
280	<	#define SIGSEGV_FAULT_INSTRUCTION               scs.eip
281	<	#define SIGSEGV_REGISTER_FILE                   (unsigned long *)(&scs)
279	>	#define SIGSEGV_FAULT_HANDLER_ARGLIST_1 struct sigcontext *scp
280	>	#define SIGSEGV_FAULT_HANDLER_ARGS              &scs
281	>	#define SIGSEGV_FAULT_ADDRESS                   scp->cr2
282	>	#define SIGSEGV_FAULT_INSTRUCTION               scp->eip
283	>	#define SIGSEGV_REGISTER_FILE                   (unsigned long *)scp
284		#define SIGSEGV_SKIP_INSTRUCTION                ix86_skip_instruction
285		#endif
286		#if (defined(sparc) || defined(__sparc__))
287		#include <asm/sigcontext.h>
288		#define SIGSEGV_FAULT_HANDLER_ARGLIST   int sig, int code, struct sigcontext *scp, char *addr
289	+	#define SIGSEGV_FAULT_HANDLER_ARGS              sig, code, scp, addr
290		#define SIGSEGV_FAULT_ADDRESS                   addr
291		#endif
292		#if (defined(powerpc) || defined(__powerpc__))
293		#include <asm/sigcontext.h>
294		#define SIGSEGV_FAULT_HANDLER_ARGLIST   int sig, struct sigcontext *scp
295	+	#define SIGSEGV_FAULT_HANDLER_ARGS              sig, scp
296		#define SIGSEGV_FAULT_ADDRESS                   scp->regs->dar
297		#define SIGSEGV_FAULT_INSTRUCTION               scp->regs->nip
298		#define SIGSEGV_REGISTER_FILE                   (unsigned int *)&scp->regs->nip, (unsigned int *)(scp->regs->gpr)
#	Line 264 | Line 301 | static void powerpc_decode_instruction(i
301		#if (defined(alpha) || defined(__alpha__))
302		#include <asm/sigcontext.h>
303		#define SIGSEGV_FAULT_HANDLER_ARGLIST   int sig, int code, struct sigcontext *scp
304	+	#define SIGSEGV_FAULT_HANDLER_ARGS              sig, code, scp
305		#define SIGSEGV_FAULT_ADDRESS                   get_fault_address(scp)
306		#define SIGSEGV_FAULT_INSTRUCTION               scp->sc_pc
269	–
270	–	// From Boehm's GC 6.0alpha8
271	–	static sigsegv_address_t get_fault_address(struct sigcontext *scp)
272	–	{
273	–	unsigned int instruction = *((unsigned int *)(scp->sc_pc));
274	–	unsigned long fault_address = scp->sc_regs[(instruction >> 16) & 0x1f];
275	–	fault_address += (signed long)(signed short)(instruction & 0xffff);
276	–	return (sigsegv_address_t)fault_address;
277	–	}
307		#endif
308		#endif
309
310		// Irix 5 or 6 on MIPS
311	<	#if (defined(sgi) || defined(__sgi)) && (defined(SYSTYPE_SVR4) || defined(__SYSTYPE_SVR4))
311	>	#if (defined(sgi) || defined(__sgi)) && (defined(SYSTYPE_SVR4) || defined(_SYSTYPE_SVR4))
312		#include <ucontext.h>
313		#define SIGSEGV_FAULT_HANDLER_ARGLIST   int sig, int code, struct sigcontext *scp
314	<	#define SIGSEGV_FAULT_ADDRESS                   scp->sc_badvaddr
314	>	#define SIGSEGV_FAULT_HANDLER_ARGS              sig, code, scp
315	>	#define SIGSEGV_FAULT_ADDRESS                   (unsigned long)scp->sc_badvaddr
316	>	#define SIGSEGV_FAULT_INSTRUCTION               (unsigned long)scp->sc_pc
317		#define SIGSEGV_ALL_SIGNALS                             FAULT_HANDLER(SIGSEGV)
318		#endif
319
320		// HP-UX
321		#if (defined(hpux) || defined(__hpux__))
322		#define SIGSEGV_FAULT_HANDLER_ARGLIST   int sig, int code, struct sigcontext *scp
323	+	#define SIGSEGV_FAULT_HANDLER_ARGS              sig, code, scp
324		#define SIGSEGV_FAULT_ADDRESS                   scp->sc_sl.sl_ss.ss_narrow.ss_cr21
325		#define SIGSEGV_ALL_SIGNALS                             FAULT_HANDLER(SIGSEGV) FAULT_HANDLER(SIGBUS)
326		#endif
#	Line 297 | Line 329 | static sigsegv_address_t get_fault_addre
329		#if defined(__osf__)
330		#include <ucontext.h>
331		#define SIGSEGV_FAULT_HANDLER_ARGLIST   int sig, int code, struct sigcontext *scp
332	+	#define SIGSEGV_FAULT_HANDLER_ARGS              sig, code, scp
333		#define SIGSEGV_FAULT_ADDRESS                   scp->sc_traparg_a0
334		#define SIGSEGV_ALL_SIGNALS                             FAULT_HANDLER(SIGSEGV)
335		#endif
#	Line 304 | Line 337 | static sigsegv_address_t get_fault_addre
337		// AIX
338		#if defined(_AIX)
339		#define SIGSEGV_FAULT_HANDLER_ARGLIST   int sig, int code, struct sigcontext *scp
340	+	#define SIGSEGV_FAULT_HANDLER_ARGS              sig, code, scp
341		#define SIGSEGV_FAULT_ADDRESS                   scp->sc_jmpbuf.jmp_context.o_vaddr
342		#define SIGSEGV_ALL_SIGNALS                             FAULT_HANDLER(SIGSEGV)
343		#endif
344
345	<	// NetBSD or FreeBSD
346	<	#if defined(__NetBSD__) || defined(__FreeBSD__)
345	>	// NetBSD
346	>	#if defined(__NetBSD__)
347		#if (defined(m68k) || defined(__m68k__))
348		#include <m68k/frame.h>
349		#define SIGSEGV_FAULT_HANDLER_ARGLIST   int sig, int code, struct sigcontext *scp
350	+	#define SIGSEGV_FAULT_HANDLER_ARGS              sig, code, scp
351		#define SIGSEGV_FAULT_ADDRESS                   get_fault_address(scp)
352		#define SIGSEGV_ALL_SIGNALS                             FAULT_HANDLER(SIGSEGV)
353
#	Line 336 | Line 371 | static sigsegv_address_t get_fault_addre
371		}
372		return (sigsegv_address_t)fault_addr;
373		}
374	<	#else
375	<	#define SIGSEGV_FAULT_HANDLER_ARGLIST   int sig, int code, void *scp, char *addr
376	<	#define SIGSEGV_FAULT_ADDRESS                   addr
374	>	#endif
375	>	#if (defined(alpha) || defined(__alpha__))
376	>	#define SIGSEGV_FAULT_HANDLER_ARGLIST   int sig, int code, struct sigcontext *scp
377	>	#define SIGSEGV_FAULT_HANDLER_ARGS              sig, code, scp
378	>	#define SIGSEGV_FAULT_ADDRESS                   get_fault_address(scp)
379		#define SIGSEGV_ALL_SIGNALS                             FAULT_HANDLER(SIGBUS)
380		#endif
381	+	#if (defined(i386) || defined(__i386__))
382	+	#error "FIXME: need to decode instruction and compute EA"
383	+	#define SIGSEGV_FAULT_HANDLER_ARGLIST   int sig, int code, struct sigcontext *scp
384	+	#define SIGSEGV_FAULT_HANDLER_ARGS              sig, code, scp
385	+	#define SIGSEGV_ALL_SIGNALS                             FAULT_HANDLER(SIGSEGV)
386		#endif
387	+	#endif
388	+	#if defined(__FreeBSD__)
389	+	#define SIGSEGV_ALL_SIGNALS                             FAULT_HANDLER(SIGBUS)
390	+	#if (defined(i386) || defined(__i386__))
391	+	#define SIGSEGV_FAULT_HANDLER_ARGLIST   int sig, int code, struct sigcontext *scp, char *addr
392	+	#define SIGSEGV_FAULT_HANDLER_ARGS              sig, code, scp, addr
393	+	#define SIGSEGV_FAULT_ADDRESS                   addr
394	+	#define SIGSEGV_FAULT_INSTRUCTION               scp->sc_eip
395	+	#define SIGSEGV_REGISTER_FILE                   ((unsigned long *)&scp->sc_edi)
396	+	#define SIGSEGV_SKIP_INSTRUCTION                ix86_skip_instruction
397	+	#endif
398	+	#endif
399	+
400	+	// Extract fault address out of a sigcontext
401	+	#if (defined(alpha) || defined(__alpha__))
402	+	// From Boehm's GC 6.0alpha8
403	+	static sigsegv_address_t get_fault_address(struct sigcontext *scp)
404	+	{
405	+	unsigned int instruction = *((unsigned int *)(scp->sc_pc));
406	+	unsigned long fault_address = scp->sc_regs[(instruction >> 16) & 0x1f];
407	+	fault_address += (signed long)(signed short)(instruction & 0xffff);
408	+	return (sigsegv_address_t)fault_address;
409	+	}
410	+	#endif
411	+
412
413	<	// MacOS X
413	>	// MacOS X, not sure which version this works in. Under 10.1
414	>	// vm_protect does not appear to work from a signal handler. Under
415	>	// 10.2 signal handlers get siginfo type arguments but the si_addr
416	>	// field is the address of the faulting instruction and not the
417	>	// address that caused the SIGBUS. Maybe this works in 10.0? In any
418	>	// case with Mach exception handlers there is a way to do what this
419	>	// was meant to do.
420	>	#ifndef HAVE_MACH_EXCEPTIONS
421		#if defined(__APPLE__) && defined(__MACH__)
422		#if (defined(ppc) || defined(__ppc__))
423		#define SIGSEGV_FAULT_HANDLER_ARGLIST   int sig, int code, struct sigcontext *scp
424	+	#define SIGSEGV_FAULT_HANDLER_ARGS              sig, code, scp
425		#define SIGSEGV_FAULT_ADDRESS                   get_fault_address(scp)
426		#define SIGSEGV_FAULT_INSTRUCTION               scp->sc_ir
427		#define SIGSEGV_ALL_SIGNALS                             FAULT_HANDLER(SIGBUS)
#	Line 366 | Line 441 | static sigsegv_address_t get_fault_addre
441		#endif
442		#endif
443		#endif
444	+	#endif
445	+
446	+	#if HAVE_MACH_EXCEPTIONS
447	+
448	+	// This can easily be extended to other Mach systems, but really who
449	+	// uses HURD (oops GNU/HURD), Darwin/x86, NextStep, Rhapsody, or CMU
450	+	// Mach 2.5/3.0?
451	+	#if defined(__APPLE__) && defined(__MACH__)
452	+
453	+	#include <sys/types.h>
454	+	#include <stdlib.h>
455	+	#include <stdio.h>
456	+	#include <pthread.h>
457	+
458	+	/*
459	+	* If you are familiar with MIG then you will understand the frustration
460	+	* that was necessary to get these embedded into C++ code by hand.
461	+	*/
462	+	extern "C" {
463	+	#include <mach/mach.h>
464	+	#include <mach/mach_error.h>
465	+
466	+	extern boolean_t exc_server(mach_msg_header_t *, mach_msg_header_t *);
467	+	extern kern_return_t catch_exception_raise(mach_port_t, mach_port_t,
468	+	mach_port_t, exception_type_t, exception_data_t, mach_msg_type_number_t);
469	+	extern kern_return_t exception_raise(mach_port_t, mach_port_t, mach_port_t,
470	+	exception_type_t, exception_data_t, mach_msg_type_number_t);
471	+	extern kern_return_t exception_raise_state(mach_port_t, exception_type_t,
472	+	exception_data_t, mach_msg_type_number_t, thread_state_flavor_t *,
473	+	thread_state_t, mach_msg_type_number_t, thread_state_t, mach_msg_type_number_t *);
474	+	extern kern_return_t exception_raise_state_identity(mach_port_t, mach_port_t, mach_port_t,
475	+	exception_type_t, exception_data_t, mach_msg_type_number_t, thread_state_flavor_t *,
476	+	thread_state_t, mach_msg_type_number_t, thread_state_t, mach_msg_type_number_t *);
477	+	}
478	+
479	+	// Could make this dynamic by looking for a result of MIG_ARRAY_TOO_LARGE
480	+	#define HANDLER_COUNT 64
481	+
482	+	// structure to tuck away existing exception handlers
483	+	typedef struct _ExceptionPorts {
484	+	mach_msg_type_number_t maskCount;
485	+	exception_mask_t masks[HANDLER_COUNT];
486	+	exception_handler_t handlers[HANDLER_COUNT];
487	+	exception_behavior_t behaviors[HANDLER_COUNT];
488	+	thread_state_flavor_t flavors[HANDLER_COUNT];
489	+	} ExceptionPorts;
490	+
491	+	// exception handler thread
492	+	static pthread_t exc_thread;
493	+
494	+	// place where old exception handler info is stored
495	+	static ExceptionPorts ports;
496	+
497	+	// our exception port
498	+	static mach_port_t _exceptionPort = MACH_PORT_NULL;
499	+
500	+	#define MACH_CHECK_ERROR(name,ret) \
501	+	if (ret != KERN_SUCCESS) { \
502	+	mach_error(#name, ret); \
503	+	exit (1); \
504	+	}
505	+
506	+	#define SIGSEGV_FAULT_ADDRESS                   code[1]
507	+	#define SIGSEGV_FAULT_INSTRUCTION               get_fault_instruction(thread, state)
508	+	#define SIGSEGV_FAULT_HANDLER_INVOKE(ADDR, IP)  ((code[0] == KERN_PROTECTION_FAILURE) ? sigsegv_fault_handler(ADDR, IP) : SIGSEGV_RETURN_FAILURE)
509	+	#define SIGSEGV_FAULT_HANDLER_ARGLIST   mach_port_t thread, exception_data_t code, ppc_thread_state_t *state
510	+	#define SIGSEGV_FAULT_HANDLER_ARGS              thread, code, &state
511	+	#define SIGSEGV_SKIP_INSTRUCTION                powerpc_skip_instruction
512	+	#define SIGSEGV_REGISTER_FILE                   &state->srr0, &state->r0
513	+
514	+	// Given a suspended thread, stuff the current instruction and
515	+	// registers into state.
516	+	//
517	+	// It would have been nice to have this be ppc/x86 independant which
518	+	// could have been done easily with a thread_state_t instead of
519	+	// ppc_thread_state_t, but because of the way this is called it is
520	+	// easier to do it this way.
521	+	#if (defined(ppc) || defined(__ppc__))
522	+	static inline sigsegv_address_t get_fault_instruction(mach_port_t thread, ppc_thread_state_t *state)
523	+	{
524	+	kern_return_t krc;
525	+	mach_msg_type_number_t count;
526	+
527	+	count = MACHINE_THREAD_STATE_COUNT;
528	+	krc = thread_get_state(thread, MACHINE_THREAD_STATE, (thread_state_t)state, &count);
529	+	MACH_CHECK_ERROR (thread_get_state, krc);
530	+
531	+	return (sigsegv_address_t)state->srr0;
532	+	}
533	+	#endif
534	+
535	+	// Since there can only be one exception thread running at any time
536	+	// this is not a problem.
537	+	#define MSG_SIZE 512
538	+	static char msgbuf[MSG_SIZE];
539	+	static char replybuf[MSG_SIZE];
540	+
541	+	/*
542	+	* This is the entry point for the exception handler thread. The job
543	+	* of this thread is to wait for exception messages on the exception
544	+	* port that was setup beforehand and to pass them on to exc_server.
545	+	* exc_server is a MIG generated function that is a part of Mach.
546	+	* Its job is to decide what to do with the exception message. In our
547	+	* case exc_server calls catch_exception_raise on our behalf. After
548	+	* exc_server returns, it is our responsibility to send the reply.
549	+	*/
550	+	static void *
551	+	handleExceptions(void *priv)
552	+	{
553	+	mach_msg_header_t *msg, *reply;
554	+	kern_return_t krc;
555	+
556	+	msg = (mach_msg_header_t *)msgbuf;
557	+	reply = (mach_msg_header_t *)replybuf;
558	+
559	+	for (;;) {
560	+	krc = mach_msg(msg, MACH_RCV_MSG, MSG_SIZE, MSG_SIZE,
561	+	_exceptionPort, 0, MACH_PORT_NULL);
562	+	MACH_CHECK_ERROR(mach_msg, krc);
563	+
564	+	if (!exc_server(msg, reply)) {
565	+	fprintf(stderr, "exc_server hated the message\n");
566	+	exit(1);
567	+	}
568	+
569	+	krc = mach_msg(reply, MACH_SEND_MSG, reply->msgh_size, 0,
570	+	msg->msgh_local_port, 0, MACH_PORT_NULL);
571	+	if (krc != KERN_SUCCESS) {
572	+	fprintf(stderr, "Error sending message to original reply port, krc = %d, %s",
573	+	krc, mach_error_string(krc));
574	+	exit(1);
575	+	}
576	+	}
577	+	}
578	+	#endif
579	+	#endif
580
581
582		/*
#	Line 374 | Line 585 | static sigsegv_address_t get_fault_addre
585
586		#ifdef HAVE_SIGSEGV_SKIP_INSTRUCTION
587		// Decode and skip X86 instruction
588	<	#if (defined(i386) || defined(__i386__))
588	>	#if (defined(i386) || defined(__i386__)) || defined(__x86_64__)
589		#if defined(__linux__)
590		enum {
591	+	#if (defined(i386) || defined(__i386__))
592		X86_REG_EIP = 14,
593		X86_REG_EAX = 11,
594		X86_REG_ECX = 10,
#	Line 386 | Line 598 | enum {
598		X86_REG_EBP = 6,
599		X86_REG_ESI = 5,
600		X86_REG_EDI = 4
601	+	#endif
602	+	#if defined(__x86_64__)
603	+	X86_REG_R8  = 0,
604	+	X86_REG_R9  = 1,
605	+	X86_REG_R10 = 2,
606	+	X86_REG_R11 = 3,
607	+	X86_REG_R12 = 4,
608	+	X86_REG_R13 = 5,
609	+	X86_REG_R14 = 6,
610	+	X86_REG_R15 = 7,
611	+	X86_REG_EDI = 8,
612	+	X86_REG_ESI = 9,
613	+	X86_REG_EBP = 10,
614	+	X86_REG_EBX = 11,
615	+	X86_REG_EDX = 12,
616	+	X86_REG_EAX = 13,
617	+	X86_REG_ECX = 14,
618	+	X86_REG_ESP = 15,
619	+	X86_REG_EIP = 16
620	+	#endif
621	+	};
622	+	#endif
623	+	#if defined(__NetBSD__) || defined(__FreeBSD__)
624	+	enum {
625	+	#if (defined(i386) || defined(__i386__))
626	+	X86_REG_EIP = 10,
627	+	X86_REG_EAX = 7,
628	+	X86_REG_ECX = 6,
629	+	X86_REG_EDX = 5,
630	+	X86_REG_EBX = 4,
631	+	X86_REG_ESP = 13,
632	+	X86_REG_EBP = 2,
633	+	X86_REG_ESI = 1,
634	+	X86_REG_EDI = 0
635	+	#endif
636		};
637		#endif
638		// FIXME: this is partly redundant with the instruction decoding phase
#	Line 422 | Line 669 | static inline int ix86_step_over_modrm(u
669		return offset;
670		}
671
672	<	static bool ix86_skip_instruction(unsigned int * regs)
672	>	static bool ix86_skip_instruction(unsigned long * regs)
673		{
674		unsigned char * eip = (unsigned char *)regs[X86_REG_EIP];
675
676		if (eip == 0)
677		return false;
678
679	<	transfer_type_t transfer_type = TYPE_UNKNOWN;
679	>	transfer_type_t transfer_type = SIGSEGV_TRANSFER_UNKNOWN;
680		transfer_size_t transfer_size = SIZE_LONG;
681
682		int reg = -1;
683		int len = 0;
684	<
684	>
685	>	#if DEBUG
686	>	printf("IP: %p [%02x %02x %02x %02x...]\n",
687	>	eip, eip[0], eip[1], eip[2], eip[3]);
688	>	#endif
689	>
690		// Operand size prefix
691		if (*eip == 0x66) {
692		eip++;
#	Line 442 | Line 694 | static bool ix86_skip_instruction(unsign
694		transfer_size = SIZE_WORD;
695		}
696
697	+	// REX prefix
698	+	#if defined(__x86_64__)
699	+	struct rex_t {
700	+	unsigned char W;
701	+	unsigned char R;
702	+	unsigned char X;
703	+	unsigned char B;
704	+	};
705	+	rex_t rex = { 0, 0, 0, 0 };
706	+	bool has_rex = false;
707	+	if ((*eip & 0xf0) == 0x40) {
708	+	has_rex = true;
709	+	const unsigned char b = *eip;
710	+	rex.W = b & (1 << 3);
711	+	rex.R = b & (1 << 2);
712	+	rex.X = b & (1 << 1);
713	+	rex.B = b & (1 << 0);
714	+	#if DEBUG
715	+	printf("REX: %c,%c,%c,%c\n",
716	+	rex.W ? 'W' : '_',
717	+	rex.R ? 'R' : '_',
718	+	rex.X ? 'X' : '_',
719	+	rex.B ? 'B' : '_');
720	+	#endif
721	+	eip++;
722	+	len++;
723	+	if (rex.W)
724	+	transfer_size = SIZE_QUAD;
725	+	}
726	+	#else
727	+	const bool has_rex = false;
728	+	#endif
729	+
730		// Decode instruction
731		switch (eip[0]) {
732	+	case 0x0f:
733	+	switch (eip[1]) {
734	+	case 0xb6: // MOVZX r32, r/m8
735	+	case 0xb7: // MOVZX r32, r/m16
736	+	switch (eip[2] & 0xc0) {
737	+	case 0x80:
738	+	reg = (eip[2] >> 3) & 7;
739	+	transfer_type = SIGSEGV_TRANSFER_LOAD;
740	+	break;
741	+	case 0x40:
742	+	reg = (eip[2] >> 3) & 7;
743	+	transfer_type = SIGSEGV_TRANSFER_LOAD;
744	+	break;
745	+	case 0x00:
746	+	reg = (eip[2] >> 3) & 7;
747	+	transfer_type = SIGSEGV_TRANSFER_LOAD;
748	+	break;
749	+	}
750	+	len += 3 + ix86_step_over_modrm(eip + 2);
751	+	break;
752	+	}
753	+	break;
754		case 0x8a: // MOV r8, r/m8
755		transfer_size = SIZE_BYTE;
756		case 0x8b: // MOV r32, r/m32 (or 16-bit operation)
757		switch (eip[1] & 0xc0) {
758		case 0x80:
759		reg = (eip[1] >> 3) & 7;
760	<	transfer_type = TYPE_LOAD;
760	>	transfer_type = SIGSEGV_TRANSFER_LOAD;
761		break;
762		case 0x40:
763		reg = (eip[1] >> 3) & 7;
764	<	transfer_type = TYPE_LOAD;
764	>	transfer_type = SIGSEGV_TRANSFER_LOAD;
765		break;
766		case 0x00:
767		reg = (eip[1] >> 3) & 7;
768	<	transfer_type = TYPE_LOAD;
768	>	transfer_type = SIGSEGV_TRANSFER_LOAD;
769		break;
770		}
771		len += 2 + ix86_step_over_modrm(eip + 1);
#	Line 469 | Line 776 | static bool ix86_skip_instruction(unsign
776		switch (eip[1] & 0xc0) {
777		case 0x80:
778		reg = (eip[1] >> 3) & 7;
779	<	transfer_type = TYPE_STORE;
779	>	transfer_type = SIGSEGV_TRANSFER_STORE;
780		break;
781		case 0x40:
782		reg = (eip[1] >> 3) & 7;
783	<	transfer_type = TYPE_STORE;
783	>	transfer_type = SIGSEGV_TRANSFER_STORE;
784		break;
785		case 0x00:
786		reg = (eip[1] >> 3) & 7;
787	<	transfer_type = TYPE_STORE;
787	>	transfer_type = SIGSEGV_TRANSFER_STORE;
788		break;
789		}
790		len += 2 + ix86_step_over_modrm(eip + 1);
791		break;
792		}
793
794	<	if (transfer_type == TYPE_UNKNOWN) {
794	>	if (transfer_type == SIGSEGV_TRANSFER_UNKNOWN) {
795		// Unknown machine code, let it crash. Then patch the decoder
796		return false;
797		}
798
799	<	if (transfer_type == TYPE_LOAD && reg != -1) {
800	<	static const int x86_reg_map[8] = {
799	>	#if defined(__x86_64__)
800	>	if (rex.R)
801	>	reg += 8;
802	>	#endif
803	>
804	>	if (transfer_type == SIGSEGV_TRANSFER_LOAD && reg != -1) {
805	>	static const int x86_reg_map[] = {
806		X86_REG_EAX, X86_REG_ECX, X86_REG_EDX, X86_REG_EBX,
807	<	X86_REG_ESP, X86_REG_EBP, X86_REG_ESI, X86_REG_EDI
807	>	X86_REG_ESP, X86_REG_EBP, X86_REG_ESI, X86_REG_EDI,
808	>	#if defined(__x86_64__)
809	>	X86_REG_R8,  X86_REG_R9,  X86_REG_R10, X86_REG_R11,
810	>	X86_REG_R12, X86_REG_R13, X86_REG_R14, X86_REG_R15,
811	>	#endif
812		};
813
814	<	if (reg < 0 || reg >= 8)
814	>	if (reg < 0 || reg >= (sizeof(x86_reg_map)/sizeof(x86_reg_map[0]) - 1))
815		return false;
816
817	+	// Set 0 to the relevant register part
818	+	// NOTE: this is only valid for MOV alike instructions
819		int rloc = x86_reg_map[reg];
820		switch (transfer_size) {
821		case SIZE_BYTE:
822	<	regs[rloc] = (regs[rloc] & ~0xff);
822	>	if (has_rex || reg < 4)
823	>	regs[rloc] = (regs[rloc] & ~0x00ffL);
824	>	else {
825	>	rloc = x86_reg_map[reg - 4];
826	>	regs[rloc] = (regs[rloc] & ~0xff00L);
827	>	}
828		break;
829		case SIZE_WORD:
830	<	regs[rloc] = (regs[rloc] & ~0xffff);
830	>	regs[rloc] = (regs[rloc] & ~0xffffL);
831		break;
832		case SIZE_LONG:
833	+	case SIZE_QUAD: // zero-extension
834		regs[rloc] = 0;
835		break;
836		}
837		}
838
839		#if DEBUG
840	<	printf("%08x: %s %s access", fault_instruction,
841	<	transfer_size == SIZE_BYTE ? "byte" : transfer_size == SIZE_WORD ? "word" : "long",
842	<	transfer_type == TYPE_LOAD ? "read" : "write");
840	>	printf("%08x: %s %s access", regs[X86_REG_EIP],
841	>	transfer_size == SIZE_BYTE ? "byte" :
842	>	transfer_size == SIZE_WORD ? "word" :
843	>	transfer_size == SIZE_LONG ? "long" :
844	>	transfer_size == SIZE_QUAD ? "quad" : "unknown",
845	>	transfer_type == SIGSEGV_TRANSFER_LOAD ? "read" : "write");
846
847		if (reg != -1) {
848	<	static const char * x86_reg_str_map[8] = {
849	<	"eax", "ecx", "edx", "ebx",
850	<	"esp", "ebp", "esi", "edi"
848	>	static const char * x86_byte_reg_str_map[] = {
849	>	"al",   "cl",   "dl",   "bl",
850	>	"spl",  "bpl",  "sil",  "dil",
851	>	"r8b",  "r9b",  "r10b", "r11b",
852	>	"r12b", "r13b", "r14b", "r15b",
853	>	"ah",   "ch",   "dh",   "bh",
854	>	};
855	>	static const char * x86_word_reg_str_map[] = {
856	>	"ax",   "cx",   "dx",   "bx",
857	>	"sp",   "bp",   "si",   "di",
858	>	"r8w",  "r9w",  "r10w", "r11w",
859	>	"r12w", "r13w", "r14w", "r15w",
860	>	};
861	>	static const char *x86_long_reg_str_map[] = {
862	>	"eax",  "ecx",  "edx",  "ebx",
863	>	"esp",  "ebp",  "esi",  "edi",
864	>	"r8d",  "r9d",  "r10d", "r11d",
865	>	"r12d", "r13d", "r14d", "r15d",
866		};
867	<	printf(" %s register %%%s", transfer_type == TYPE_LOAD ? "to" : "from", x86_reg_str_map[reg]);
867	>	static const char *x86_quad_reg_str_map[] = {
868	>	"rax", "rcx", "rdx", "rbx",
869	>	"rsp", "rbp", "rsi", "rdi",
870	>	"r8",  "r9",  "r10", "r11",
871	>	"r12", "r13", "r14", "r15",
872	>	};
873	>	const char * reg_str = NULL;
874	>	switch (transfer_size) {
875	>	case SIZE_BYTE:
876	>	reg_str = x86_byte_reg_str_map[(!has_rex && reg >= 4 ? 12 : 0) + reg];
877	>	break;
878	>	case SIZE_WORD: reg_str = x86_word_reg_str_map[reg]; break;
879	>	case SIZE_LONG: reg_str = x86_long_reg_str_map[reg]; break;
880	>	case SIZE_QUAD: reg_str = x86_quad_reg_str_map[reg]; break;
881	>	}
882	>	if (reg_str)
883	>	printf(" %s register %%%s",
884	>	transfer_type == SIGSEGV_TRANSFER_LOAD ? "to" : "from",
885	>	reg_str);
886		}
887		printf(", %d bytes instruction\n", len);
888		#endif
#	Line 539 | Line 899 | static bool powerpc_skip_instruction(uns
899		instruction_t instr;
900		powerpc_decode_instruction(&instr, *nip_p, regs);
901
902	<	if (instr.transfer_type == TYPE_UNKNOWN) {
902	>	if (instr.transfer_type == SIGSEGV_TRANSFER_UNKNOWN) {
903		// Unknown machine code, let it crash. Then patch the decoder
904		return false;
905		}
#	Line 547 | Line 907 | static bool powerpc_skip_instruction(uns
907		#if DEBUG
908		printf("%08x: %s %s access", *nip_p,
909		instr.transfer_size == SIZE_BYTE ? "byte" : instr.transfer_size == SIZE_WORD ? "word" : "long",
910	<	instr.transfer_type == TYPE_LOAD ? "read" : "write");
910	>	instr.transfer_type == SIGSEGV_TRANSFER_LOAD ? "read" : "write");
911
912		if (instr.addr_mode == MODE_U || instr.addr_mode == MODE_UX)
913		printf(" r%d (ra = %08x)\n", instr.ra, instr.addr);
914	<	if (instr.transfer_type == TYPE_LOAD)
914	>	if (instr.transfer_type == SIGSEGV_TRANSFER_LOAD)
915		printf(" r%d (rd = 0)\n", instr.rd);
916		#endif
917
918		if (instr.addr_mode == MODE_U || instr.addr_mode == MODE_UX)
919		regs[instr.ra] = instr.addr;
920	<	if (instr.transfer_type == TYPE_LOAD)
920	>	if (instr.transfer_type == SIGSEGV_TRANSFER_LOAD)
921		regs[instr.rd] = 0;
922
923		*nip_p += 4;
#	Line 570 | Line 930 | static bool powerpc_skip_instruction(uns
930		#ifndef SIGSEGV_FAULT_INSTRUCTION
931		#define SIGSEGV_FAULT_INSTRUCTION               SIGSEGV_INVALID_PC
932		#endif
933	+	#ifndef SIGSEGV_FAULT_HANDLER_ARGLIST_1
934	+	#define SIGSEGV_FAULT_HANDLER_ARGLIST_1 SIGSEGV_FAULT_HANDLER_ARGLIST
935	+	#endif
936	+	#ifndef SIGSEGV_FAULT_HANDLER_INVOKE
937	+	#define SIGSEGV_FAULT_HANDLER_INVOKE(ADDR, IP)  sigsegv_fault_handler(ADDR, IP)
938	+	#endif
939
940		// SIGSEGV recovery supported ?
941		#if defined(SIGSEGV_ALL_SIGNALS) && defined(SIGSEGV_FAULT_HANDLER_ARGLIST) && defined(SIGSEGV_FAULT_ADDRESS)
#	Line 581 | Line 947 | static bool powerpc_skip_instruction(uns
947		*  SIGSEGV global handler
948		*/
949
950	<	#ifdef HAVE_SIGSEGV_RECOVERY
951	<	static void sigsegv_handler(SIGSEGV_FAULT_HANDLER_ARGLIST)
950	>	#if defined(HAVE_SIGSEGV_RECOVERY) || defined(HAVE_MACH_EXCEPTIONS)
951	>	// This function handles the badaccess to memory.
952	>	// It is called from the signal handler or the exception handler.
953	>	static bool handle_badaccess(SIGSEGV_FAULT_HANDLER_ARGLIST_1)
954		{
955		sigsegv_address_t fault_address = (sigsegv_address_t)SIGSEGV_FAULT_ADDRESS;
956		sigsegv_address_t fault_instruction = (sigsegv_address_t)SIGSEGV_FAULT_INSTRUCTION;
589	–	bool fault_recovered = false;
957
958		// Call user's handler and reinstall the global handler, if required
959	<	if (sigsegv_fault_handler(fault_address, fault_instruction)) {
960	<	#if (defined(HAVE_SIGACTION) ? defined(SIGACTION_NEED_REINSTALL) : defined(SIGNAL_NEED_REINSTALL))
961	<	sigsegv_do_install_handler(sig);
959	>	switch (SIGSEGV_FAULT_HANDLER_INVOKE(fault_address, fault_instruction)) {
960	>	case SIGSEGV_RETURN_SUCCESS:
961	>	return true;
962	>
963	>	#if HAVE_SIGSEGV_SKIP_INSTRUCTION
964	>	case SIGSEGV_RETURN_SKIP_INSTRUCTION:
965	>	// Call the instruction skipper with the register file
966	>	// available
967	>	if (SIGSEGV_SKIP_INSTRUCTION(SIGSEGV_REGISTER_FILE)) {
968	>	#ifdef HAVE_MACH_EXCEPTIONS
969	>	// Unlike UNIX signals where the thread state
970	>	// is modified off of the stack, in Mach we
971	>	// need to actually call thread_set_state to
972	>	// have the register values updated.
973	>	kern_return_t krc;
974	>
975	>	krc = thread_set_state(thread,
976	>	MACHINE_THREAD_STATE, (thread_state_t)state,
977	>	MACHINE_THREAD_STATE_COUNT);
978	>	MACH_CHECK_ERROR (thread_get_state, krc);
979	>	#endif
980	>	return true;
981	>	}
982	>	break;
983		#endif
596	–	fault_recovered = true;
984		}
985	<	#if HAVE_SIGSEGV_SKIP_INSTRUCTION
986	<	else if (sigsegv_ignore_fault) {
987	<	// Call the instruction skipper with the register file available
988	<	if (SIGSEGV_SKIP_INSTRUCTION(SIGSEGV_REGISTER_FILE))
989	<	fault_recovered = true;
985	>
986	>	// We can't do anything with the fault_address, dump state?
987	>	if (sigsegv_state_dumper != 0)
988	>	sigsegv_state_dumper(fault_address, fault_instruction);
989	>
990	>	return false;
991	>	}
992	>	#endif
993	>
994	>
995	>	/*
996	>	* There are two mechanisms for handling a bad memory access,
997	>	* Mach exceptions and UNIX signals. The implementation specific
998	>	* code appears below. Its reponsibility is to call handle_badaccess
999	>	* which is the routine that handles the fault in an implementation
1000	>	* agnostic manner. The implementation specific code below is then
1001	>	* reponsible for checking whether handle_badaccess was able
1002	>	* to handle the memory access error and perform any implementation
1003	>	* specific tasks necessary afterwards.
1004	>	*/
1005	>
1006	>	#ifdef HAVE_MACH_EXCEPTIONS
1007	>	/*
1008	>	* We need to forward all exceptions that we do not handle.
1009	>	* This is important, there are many exceptions that may be
1010	>	* handled by other exception handlers. For example debuggers
1011	>	* use exceptions and the exception hander is in another
1012	>	* process in such a case. (Timothy J. Wood states in his
1013	>	* message to the list that he based this code on that from
1014	>	* gdb for Darwin.)
1015	>	*/
1016	>	static inline kern_return_t
1017	>	forward_exception(mach_port_t thread_port,
1018	>	mach_port_t task_port,
1019	>	exception_type_t exception_type,
1020	>	exception_data_t exception_data,
1021	>	mach_msg_type_number_t data_count,
1022	>	ExceptionPorts *oldExceptionPorts)
1023	>	{
1024	>	kern_return_t kret;
1025	>	unsigned int portIndex;
1026	>	mach_port_t port;
1027	>	exception_behavior_t behavior;
1028	>	thread_state_flavor_t flavor;
1029	>	thread_state_t thread_state;
1030	>	mach_msg_type_number_t thread_state_count;
1031	>
1032	>	for (portIndex = 0; portIndex < oldExceptionPorts->maskCount; portIndex++) {
1033	>	if (oldExceptionPorts->masks[portIndex] & (1 << exception_type)) {
1034	>	// This handler wants the exception
1035	>	break;
1036	>	}
1037	>	}
1038	>
1039	>	if (portIndex >= oldExceptionPorts->maskCount) {
1040	>	fprintf(stderr, "No handler for exception_type = %d. Not fowarding\n", exception_type);
1041	>	return KERN_FAILURE;
1042	>	}
1043	>
1044	>	port = oldExceptionPorts->handlers[portIndex];
1045	>	behavior = oldExceptionPorts->behaviors[portIndex];
1046	>	flavor = oldExceptionPorts->flavors[portIndex];
1047	>
1048	>	/*
1049	>	fprintf(stderr, "forwarding exception, port = 0x%x, behaviour = %d, flavor = %d\n", port, behavior, flavor);
1050	>	*/
1051	>
1052	>	if (behavior != EXCEPTION_DEFAULT) {
1053	>	thread_state_count = THREAD_STATE_MAX;
1054	>	kret = thread_get_state (thread_port, flavor, thread_state,
1055	>	&thread_state_count);
1056	>	MACH_CHECK_ERROR (thread_get_state, kret);
1057	>	}
1058	>
1059	>	switch (behavior) {
1060	>	case EXCEPTION_DEFAULT:
1061	>	// fprintf(stderr, "forwarding to exception_raise\n");
1062	>	kret = exception_raise(port, thread_port, task_port, exception_type,
1063	>	exception_data, data_count);
1064	>	MACH_CHECK_ERROR (exception_raise, kret);
1065	>	break;
1066	>	case EXCEPTION_STATE:
1067	>	// fprintf(stderr, "forwarding to exception_raise_state\n");
1068	>	kret = exception_raise_state(port, exception_type, exception_data,
1069	>	data_count, &flavor,
1070	>	thread_state, thread_state_count,
1071	>	thread_state, &thread_state_count);
1072	>	MACH_CHECK_ERROR (exception_raise_state, kret);
1073	>	break;
1074	>	case EXCEPTION_STATE_IDENTITY:
1075	>	// fprintf(stderr, "forwarding to exception_raise_state_identity\n");
1076	>	kret = exception_raise_state_identity(port, thread_port, task_port,
1077	>	exception_type, exception_data,
1078	>	data_count, &flavor,
1079	>	thread_state, thread_state_count,
1080	>	thread_state, &thread_state_count);
1081	>	MACH_CHECK_ERROR (exception_raise_state_identity, kret);
1082	>	break;
1083	>	default:
1084	>	fprintf(stderr, "forward_exception got unknown behavior\n");
1085	>	break;
1086		}
1087	+
1088	+	if (behavior != EXCEPTION_DEFAULT) {
1089	+	kret = thread_set_state (thread_port, flavor, thread_state,
1090	+	thread_state_count);
1091	+	MACH_CHECK_ERROR (thread_set_state, kret);
1092	+	}
1093	+
1094	+	return KERN_SUCCESS;
1095	+	}
1096	+
1097	+	/*
1098	+	* This is the code that actually handles the exception.
1099	+	* It is called by exc_server. For Darwin 5 Apple changed
1100	+	* this a bit from how this family of functions worked in
1101	+	* Mach. If you are familiar with that it is a little
1102	+	* different. The main variation that concerns us here is
1103	+	* that code is an array of exception specific codes and
1104	+	* codeCount is a count of the number of codes in the code
1105	+	* array. In typical Mach all exceptions have a code
1106	+	* and sub-code. It happens to be the case that for a
1107	+	* EXC_BAD_ACCESS exception the first entry is the type of
1108	+	* bad access that occurred and the second entry is the
1109	+	* faulting address so these entries correspond exactly to
1110	+	* how the code and sub-code are used on Mach.
1111	+	*
1112	+	* This is a MIG interface. No code in Basilisk II should
1113	+	* call this directley. This has to have external C
1114	+	* linkage because that is what exc_server expects.
1115	+	*/
1116	+	kern_return_t
1117	+	catch_exception_raise(mach_port_t exception_port,
1118	+	mach_port_t thread,
1119	+	mach_port_t task,
1120	+	exception_type_t exception,
1121	+	exception_data_t code,
1122	+	mach_msg_type_number_t codeCount)
1123	+	{
1124	+	ppc_thread_state_t state;
1125	+	kern_return_t krc;
1126	+
1127	+	if ((exception == EXC_BAD_ACCESS)  && (codeCount >= 2)) {
1128	+	if (handle_badaccess(SIGSEGV_FAULT_HANDLER_ARGS))
1129	+	return KERN_SUCCESS;
1130	+	}
1131	+
1132	+	// In Mach we do not need to remove the exception handler.
1133	+	// If we forward the exception, eventually some exception handler
1134	+	// will take care of this exception.
1135	+	krc = forward_exception(thread, task, exception, code, codeCount, &ports);
1136	+
1137	+	return krc;
1138	+	}
1139	+	#endif
1140	+
1141	+	#ifdef HAVE_SIGSEGV_RECOVERY
1142	+	// Handle bad memory accesses with signal handler
1143	+	static void sigsegv_handler(SIGSEGV_FAULT_HANDLER_ARGLIST)
1144	+	{
1145	+	// Call handler and reinstall the global handler, if required
1146	+	if (handle_badaccess(SIGSEGV_FAULT_HANDLER_ARGS)) {
1147	+	#if (defined(HAVE_SIGACTION) ? defined(SIGACTION_NEED_REINSTALL) : defined(SIGNAL_NEED_REINSTALL))
1148	+	sigsegv_do_install_handler(sig);
1149		#endif
1150	+	return;
1151	+	}
1152
1153	<	if (!fault_recovered) {
607	<	// FAIL: reinstall default handler for "safe" crash
1153	>	// Failure: reinstall default handler for "safe" crash
1154		#define FAULT_HANDLER(sig) signal(sig, SIG_DFL);
1155	<	SIGSEGV_ALL_SIGNALS
1155	>	SIGSEGV_ALL_SIGNALS
1156		#undef FAULT_HANDLER
611	–
612	–	// We can't do anything with the fault_address, dump state?
613	–	if (sigsegv_state_dumper != 0)
614	–	sigsegv_state_dumper(fault_address, fault_instruction);
615	–	}
1157		}
1158		#endif
1159
#	Line 626 | Line 1167 | static bool sigsegv_do_install_handler(i
1167		{
1168		// Setup SIGSEGV handler to process writes to frame buffer
1169		#ifdef HAVE_SIGACTION
1170	<	struct sigaction vosf_sa;
1171	<	sigemptyset(&vosf_sa.sa_mask);
1172	<	vosf_sa.sa_sigaction = sigsegv_handler;
1173	<	vosf_sa.sa_flags = SA_SIGINFO;
1174	<	return (sigaction(sig, &vosf_sa, 0) == 0);
1170	>	struct sigaction sigsegv_sa;
1171	>	sigemptyset(&sigsegv_sa.sa_mask);
1172	>	sigsegv_sa.sa_sigaction = sigsegv_handler;
1173	>	sigsegv_sa.sa_flags = SA_SIGINFO;
1174	>	return (sigaction(sig, &sigsegv_sa, 0) == 0);
1175		#else
1176		return (signal(sig, (signal_handler)sigsegv_handler) != SIG_ERR);
1177		#endif
#	Line 642 | Line 1183 | static bool sigsegv_do_install_handler(i
1183		{
1184		// Setup SIGSEGV handler to process writes to frame buffer
1185		#ifdef HAVE_SIGACTION
1186	<	struct sigaction vosf_sa;
1187	<	sigemptyset(&vosf_sa.sa_mask);
1188	<	vosf_sa.sa_handler = (signal_handler)sigsegv_handler;
1186	>	struct sigaction sigsegv_sa;
1187	>	sigemptyset(&sigsegv_sa.sa_mask);
1188	>	sigsegv_sa.sa_handler = (signal_handler)sigsegv_handler;
1189	>	sigsegv_sa.sa_flags = 0;
1190		#if !EMULATED_68K && defined(__NetBSD__)
1191	<	sigaddset(&vosf_sa.sa_mask, SIGALRM);
1192	<	vosf_sa.sa_flags = SA_ONSTACK;
651	<	#else
652	<	vosf_sa.sa_flags = 0;
1191	>	sigaddset(&sigsegv_sa.sa_mask, SIGALRM);
1192	>	sigsegv_sa.sa_flags |= SA_ONSTACK;
1193		#endif
1194	<	return (sigaction(sig, &vosf_sa, 0) == 0);
1194	>	return (sigaction(sig, &sigsegv_sa, 0) == 0);
1195		#else
1196		return (signal(sig, (signal_handler)sigsegv_handler) != SIG_ERR);
1197		#endif
1198		}
1199		#endif
1200
1201	<	bool sigsegv_install_handler(sigsegv_fault_handler_t handler)
1201	>	#if defined(HAVE_MACH_EXCEPTIONS)
1202	>	static bool sigsegv_do_install_handler(sigsegv_fault_handler_t handler)
1203		{
1204	<	#ifdef HAVE_SIGSEGV_RECOVERY
1204	>	/*
1205	>	* Except for the exception port functions, this should be
1206	>	* pretty much stock Mach. If later you choose to support
1207	>	* other Mach's besides Darwin, just check for __MACH__
1208	>	* here and __APPLE__ where the actual differences are.
1209	>	*/
1210	>	#if defined(__APPLE__) && defined(__MACH__)
1211	>	if (sigsegv_fault_handler != NULL) {
1212	>	sigsegv_fault_handler = handler;
1213	>	return true;
1214	>	}
1215	>
1216	>	kern_return_t krc;
1217	>
1218	>	// create the the exception port
1219	>	krc = mach_port_allocate(mach_task_self(),
1220	>	MACH_PORT_RIGHT_RECEIVE, &_exceptionPort);
1221	>	if (krc != KERN_SUCCESS) {
1222	>	mach_error("mach_port_allocate", krc);
1223	>	return false;
1224	>	}
1225	>
1226	>	// add a port send right
1227	>	krc = mach_port_insert_right(mach_task_self(),
1228	>	_exceptionPort, _exceptionPort,
1229	>	MACH_MSG_TYPE_MAKE_SEND);
1230	>	if (krc != KERN_SUCCESS) {
1231	>	mach_error("mach_port_insert_right", krc);
1232	>	return false;
1233	>	}
1234	>
1235	>	// get the old exception ports
1236	>	ports.maskCount = sizeof (ports.masks) / sizeof (ports.masks[0]);
1237	>	krc = thread_get_exception_ports(mach_thread_self(), EXC_MASK_BAD_ACCESS, ports.masks,
1238	>	&ports.maskCount, ports.handlers, ports.behaviors, ports.flavors);
1239	>	if (krc != KERN_SUCCESS) {
1240	>	mach_error("thread_get_exception_ports", krc);
1241	>	return false;
1242	>	}
1243	>
1244	>	// set the new exception port
1245	>	//
1246	>	// We could have used EXCEPTION_STATE_IDENTITY instead of
1247	>	// EXCEPTION_DEFAULT to get the thread state in the initial
1248	>	// message, but it turns out that in the common case this is not
1249	>	// neccessary. If we need it we can later ask for it from the
1250	>	// suspended thread.
1251	>	//
1252	>	// Even with THREAD_STATE_NONE, Darwin provides the program
1253	>	// counter in the thread state.  The comments in the header file
1254	>	// seem to imply that you can count on the GPR's on an exception
1255	>	// as well but just to be safe I use MACHINE_THREAD_STATE because
1256	>	// you have to ask for all of the GPR's anyway just to get the
1257	>	// program counter. In any case because of update effective
1258	>	// address from immediate and update address from effective
1259	>	// addresses of ra and rb modes (as good an name as any for these
1260	>	// addressing modes) used in PPC instructions, you will need the
1261	>	// GPR state anyway.
1262	>	krc = thread_set_exception_ports(mach_thread_self(), EXC_MASK_BAD_ACCESS, _exceptionPort,
1263	>	EXCEPTION_DEFAULT, MACHINE_THREAD_STATE);
1264	>	if (krc != KERN_SUCCESS) {
1265	>	mach_error("thread_set_exception_ports", krc);
1266	>	return false;
1267	>	}
1268	>
1269	>	// create the exception handler thread
1270	>	if (pthread_create(&exc_thread, NULL, &handleExceptions, NULL) != 0) {
1271	>	(void)fprintf(stderr, "creation of exception thread failed\n");
1272	>	return false;
1273	>	}
1274	>
1275	>	// do not care about the exception thread any longer, let is run standalone
1276	>	(void)pthread_detach(exc_thread);
1277	>
1278		sigsegv_fault_handler = handler;
1279	+	return true;
1280	+	#else
1281	+	return false;
1282	+	#endif
1283	+	}
1284	+	#endif
1285	+
1286	+	bool sigsegv_install_handler(sigsegv_fault_handler_t handler)
1287	+	{
1288	+	#if defined(HAVE_SIGSEGV_RECOVERY)
1289		bool success = true;
1290		#define FAULT_HANDLER(sig) success = success && sigsegv_do_install_handler(sig);
1291		SIGSEGV_ALL_SIGNALS
1292		#undef FAULT_HANDLER
1293	+	if (success)
1294	+	sigsegv_fault_handler = handler;
1295		return success;
1296	+	#elif defined(HAVE_MACH_EXCEPTIONS)
1297	+	return sigsegv_do_install_handler(handler);
1298		#else
1299		// FAIL: no siginfo_t nor sigcontext subterfuge is available
1300		return false;
#	Line 680 | Line 1308 | bool sigsegv_install_handler(sigsegv_fau
1308
1309		void sigsegv_deinstall_handler(void)
1310		{
1311	+	// We do nothing for Mach exceptions, the thread would need to be
1312	+	// suspended if not already so, and we might mess with other
1313	+	// exception handlers that came after we registered ours. There is
1314	+	// no need to remove the exception handler, in fact this function is
1315	+	// not called anywhere in Basilisk II.
1316		#ifdef HAVE_SIGSEGV_RECOVERY
1317		sigsegv_fault_handler = 0;
1318		#define FAULT_HANDLER(sig) signal(sig, SIG_DFL);
#	Line 690 | Line 1323 | void sigsegv_deinstall_handler(void)
1323
1324
1325		/*
693	–	*  SIGSEGV ignore state modifier
694	–	*/
695	–
696	–	void sigsegv_set_ignore_state(bool ignore_fault)
697	–	{
698	–	sigsegv_ignore_fault = ignore_fault;
699	–	}
700	–
701	–
702	–	/*
1326		*  Set callback function when we cannot handle the fault
1327		*/
1328
#	Line 720 | Line 1343 | void sigsegv_set_dump_state(sigsegv_stat
1343		#include <sys/mman.h>
1344		#include "vm_alloc.h"
1345
1346	+	const int REF_INDEX = 123;
1347	+	const int REF_VALUE = 45;
1348	+
1349		static int page_size;
1350		static volatile char * page = 0;
1351		static volatile int handler_called = 0;
1352
1353	<	static bool sigsegv_test_handler(sigsegv_address_t fault_address, sigsegv_address_t instruction_address)
1353	>	#ifdef __GNUC__
1354	>	// Code range where we expect the fault to come from
1355	>	static void *b_region, *e_region;
1356	>	#endif
1357	>
1358	>	static sigsegv_return_t sigsegv_test_handler(sigsegv_address_t fault_address, sigsegv_address_t instruction_address)
1359		{
1360		handler_called++;
1361	<	if ((fault_address - 123) != page)
1362	<	exit(1);
1361	>	if ((fault_address - REF_INDEX) != page)
1362	>	exit(10);
1363	>	#ifdef __GNUC__
1364	>	// Make sure reported fault instruction address falls into
1365	>	// expected code range
1366	>	if (instruction_address != SIGSEGV_INVALID_PC
1367	>	&& ((instruction_address <  (sigsegv_address_t)b_region) ||
1368	>	(instruction_address >= (sigsegv_address_t)e_region)))
1369	>	exit(11);
1370	>	#endif
1371		if (vm_protect((char *)((unsigned long)fault_address & -page_size), page_size, VM_PAGE_READ | VM_PAGE_WRITE) != 0)
1372	<	exit(1);
1373	<	return true;
1372	>	exit(12);
1373	>	return SIGSEGV_RETURN_SUCCESS;
1374		}
1375
1376		#ifdef HAVE_SIGSEGV_SKIP_INSTRUCTION
1377	<	static bool sigsegv_insn_handler(sigsegv_address_t fault_address, sigsegv_address_t instruction_address)
1377	>	static sigsegv_return_t sigsegv_insn_handler(sigsegv_address_t fault_address, sigsegv_address_t instruction_address)
1378		{
1379	<	return false;
1379	>	if (((unsigned long)fault_address - (unsigned long)page) < page_size) {
1380	>	#ifdef __GNUC__
1381	>	// Make sure reported fault instruction address falls into
1382	>	// expected code range
1383	>	if (instruction_address != SIGSEGV_INVALID_PC
1384	>	&& ((instruction_address <  (sigsegv_address_t)b_region) ||
1385	>	(instruction_address >= (sigsegv_address_t)e_region)))
1386	>	return SIGSEGV_RETURN_FAILURE;
1387	>	#endif
1388	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
1389	>	}
1390	>
1391	>	return SIGSEGV_RETURN_FAILURE;
1392	>	}
1393	>
1394	>	// More sophisticated tests for instruction skipper
1395	>	static bool arch_insn_skipper_tests()
1396	>	{
1397	>	#if (defined(i386) || defined(__i386__)) || defined(__x86_64__)
1398	>	static const unsigned char code[] = {
1399	>	0x8a, 0x00,                    // mov    (%eax),%al
1400	>	0x8a, 0x2c, 0x18,              // mov    (%eax,%ebx,1),%ch
1401	>	0x88, 0x20,                    // mov    %ah,(%eax)
1402	>	0x88, 0x08,                    // mov    %cl,(%eax)
1403	>	0x66, 0x8b, 0x00,              // mov    (%eax),%ax
1404	>	0x66, 0x8b, 0x0c, 0x18,        // mov    (%eax,%ebx,1),%cx
1405	>	0x66, 0x89, 0x00,              // mov    %ax,(%eax)
1406	>	0x66, 0x89, 0x0c, 0x18,        // mov    %cx,(%eax,%ebx,1)
1407	>	0x8b, 0x00,                    // mov    (%eax),%eax
1408	>	0x8b, 0x0c, 0x18,              // mov    (%eax,%ebx,1),%ecx
1409	>	0x89, 0x00,                    // mov    %eax,(%eax)
1410	>	0x89, 0x0c, 0x18,              // mov    %ecx,(%eax,%ebx,1)
1411	>	#if defined(__x86_64__)
1412	>	0x44, 0x8a, 0x00,              // mov    (%rax),%r8b
1413	>	0x44, 0x8a, 0x20,              // mov    (%rax),%r12b
1414	>	0x42, 0x8a, 0x3c, 0x10,        // mov    (%rax,%r10,1),%dil
1415	>	0x44, 0x88, 0x00,              // mov    %r8b,(%rax)
1416	>	0x44, 0x88, 0x20,              // mov    %r12b,(%rax)
1417	>	0x42, 0x88, 0x3c, 0x10,        // mov    %dil,(%rax,%r10,1)
1418	>	0x66, 0x44, 0x8b, 0x00,        // mov    (%rax),%r8w
1419	>	0x66, 0x42, 0x8b, 0x0c, 0x10,  // mov    (%rax,%r10,1),%cx
1420	>	0x66, 0x44, 0x89, 0x00,        // mov    %r8w,(%rax)
1421	>	0x66, 0x42, 0x89, 0x0c, 0x10,  // mov    %cx,(%rax,%r10,1)
1422	>	0x44, 0x8b, 0x00,              // mov    (%rax),%r8d
1423	>	0x42, 0x8b, 0x0c, 0x10,        // mov    (%rax,%r10,1),%ecx
1424	>	0x44, 0x89, 0x00,              // mov    %r8d,(%rax)
1425	>	0x42, 0x89, 0x0c, 0x10,        // mov    %ecx,(%rax,%r10,1)
1426	>	0x48, 0x8b, 0x08,              // mov    (%rax),%rcx
1427	>	0x4c, 0x8b, 0x18,              // mov    (%rax),%r11
1428	>	0x4a, 0x8b, 0x0c, 0x10,        // mov    (%rax,%r10,1),%rcx
1429	>	0x4e, 0x8b, 0x1c, 0x10,        // mov    (%rax,%r10,1),%r11
1430	>	0x48, 0x89, 0x08,              // mov    %rcx,(%rax)
1431	>	0x4c, 0x89, 0x18,              // mov    %r11,(%rax)
1432	>	0x4a, 0x89, 0x0c, 0x10,        // mov    %rcx,(%rax,%r10,1)
1433	>	0x4e, 0x89, 0x1c, 0x10,        // mov    %r11,(%rax,%r10,1)
1434	>	#endif
1435	>	0                              // end
1436	>	};
1437	>	const int N_REGS = 20;
1438	>	unsigned long regs[N_REGS];
1439	>	for (int i = 0; i < N_REGS; i++)
1440	>	regs[i] = i;
1441	>	const unsigned long start_code = (unsigned long)&code;
1442	>	regs[X86_REG_EIP] = start_code;
1443	>	while ((regs[X86_REG_EIP] - start_code) < (sizeof(code) - 1)
1444	>	&& ix86_skip_instruction(regs))
1445	>	; /* simply iterate */
1446	>	return (regs[X86_REG_EIP] - start_code) == (sizeof(code) - 1);
1447	>	#endif
1448	>	return true;
1449		}
1450		#endif
1451
#	Line 748 | Line 1456 | int main(void)
1456
1457		page_size = getpagesize();
1458		if ((page = (char *)vm_acquire(page_size)) == VM_MAP_FAILED)
1459	<	return 1;
1459	>	return 2;
1460
1461	+	memset((void *)page, 0, page_size);
1462		if (vm_protect((char *)page, page_size, VM_PAGE_READ) < 0)
1463	<	return 1;
1463	>	return 3;
1464
1465		if (!sigsegv_install_handler(sigsegv_test_handler))
1466	<	return 1;
758	<
759	<	page[123] = 45;
760	<	page[123] = 45;
1466	>	return 4;
1467
1468	+	#ifdef __GNUC__
1469	+	b_region = &&L_b_region1;
1470	+	e_region = &&L_e_region1;
1471	+	#endif
1472	+	L_b_region1:
1473	+	page[REF_INDEX] = REF_VALUE;
1474	+	if (page[REF_INDEX] != REF_VALUE)
1475	+	exit(20);
1476	+	page[REF_INDEX] = REF_VALUE;
1477	+	L_e_region1:
1478	+
1479		if (handler_called != 1)
1480	<	return 1;
1480	>	return 5;
1481
1482		#ifdef HAVE_SIGSEGV_SKIP_INSTRUCTION
1483		if (!sigsegv_install_handler(sigsegv_insn_handler))
1484	<	return 1;
1484	>	return 6;
1485
1486	<	if (vm_protect((char *)page, page_size, VM_PAGE_WRITE) < 0)
1487	<	return 1;
1486	>	if (vm_protect((char *)page, page_size, VM_PAGE_READ | VM_PAGE_WRITE) < 0)
1487	>	return 7;
1488
1489		for (int i = 0; i < page_size; i++)
1490		page[i] = (i + 1) % page_size;
1491
1492		if (vm_protect((char *)page, page_size, VM_PAGE_NOACCESS) < 0)
1493	<	return 1;
1493	>	return 8;
1494
778	–	sigsegv_set_ignore_state(true);
779	–
1495		#define TEST_SKIP_INSTRUCTION(TYPE) do {                                \
1496	<	const unsigned int TAG = 0x12345678;                    \
1496	>	const unsigned long TAG = 0x12345678 |                  \
1497	>	(sizeof(long) == 8 ? 0x9abcdef0UL << 31 : 0);   \
1498		TYPE data = *((TYPE *)(page + sizeof(TYPE)));   \
1499	<	volatile unsigned int effect = data + TAG;              \
1499	>	volatile unsigned long effect = data + TAG;             \
1500		if (effect != TAG)                                                              \
1501	<	return 1;                                                                       \
1501	>	return 9;                                                                       \
1502		} while (0)
1503
1504	+	#ifdef __GNUC__
1505	+	b_region = &&L_b_region2;
1506	+	e_region = &&L_e_region2;
1507	+	#endif
1508	+	L_b_region2:
1509		TEST_SKIP_INSTRUCTION(unsigned char);
1510		TEST_SKIP_INSTRUCTION(unsigned short);
1511		TEST_SKIP_INSTRUCTION(unsigned int);
1512	+	TEST_SKIP_INSTRUCTION(unsigned long);
1513	+	L_e_region2:
1514	+
1515	+	if (!arch_insn_skipper_tests())
1516	+	return 20;
1517		#endif
1518
1519		vm_exit();

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