[Joel Mauras] GCC has become too smart - we need to slice the binary created to be sure the address of the trap is within the test addresses. This is why each trap occurs between two case labels and a new section of assembly code is set in between.
[Amadeusz Sławiński] fix check on gcc 4.4.3
windows fix try#2
make sigsegv work better with cygwin
move sigsegv_info_t declaration to header
[Patch from Mike Sliczniak] This first patch gets B2 and SS to build under Leopard and Tiger. I tested this on a 32-bit intel 10.5.6 mac like so: B2 ./autogen.sh --disable-standalone-gui --enable-vosf --enable-sdl-video --enable-sdl-audio --enable-addressing=real --without-esd --without-gtk --without-mon --without-x SS ./autogen.sh --disable-standalone-gui --enable-vosf -enable-sdl-video --disable-sdl-audio --enable-addressing=real --without-esd --without-gtk --without-mon --without-x --enable-jit There is also a little tweak so that you can use sdl audio in SheepShaver when building for Mac OS X.
64-bit Mach exceptions support. Note that mach_exc_server() et al. must be explicitly generated from mig. The advantage of that is to provide a "fast" path for x86_64 on Leopard too (fault address in code[1]). By "fast", this means +33% faster wrt. explicitly thread_get_state() but still pretty slow (40 usec/fault). This is on par with the i386 code path though.
Add support for Windows/ia64.
HPPA support.
Add support for HP-UX/ia64. It would be best to use libunwind so that to handle stacked registers access with ease...
Use fixed-size integer types, especially for 64-bit quantities. HP-UX for IPF is essentially an ILP32 platform but machine registers are 64-bit wide. Make IA64_SET_GR() set the NaT bit at the same time as the register value.
Fix build on MacOS X Leopard. Leopard kernel faster? This is pure marketing hype. For 32-bit applications, Mach exception recovery is 60% slower. For 64-bit applications, this is up to 40% faster though. In any case, MacOS X remains pretty slow wrt. Linux...
64-bit Windows support
Make it possible to override the Mach fault recovery scheme through an environment variable: SIGSEGV_MACH_FAULT. It can be set to "direct" to assume the fault address comes from code[1] argument, or "slow" to use the slow path through thread_get_status(EXCEPTION_STATE)->faultvaddr.
The Linux kernel actually allows to restart execution from the specified slot in the bundle. This is faster and more accurate as this avoids emulation. Also clean-up code so that to prepare the use of lib uaccess on hpux/ia64. XXX: this will need explicit use of uint64_t to define registers because HP/UX is ILP32 capable and all registers are 64-bit capable so "unsigned long" won't fit.
Further comment the ia64 decoder and (minimal) emulator.
Add initial support for instruction skipping on Linux/ia64. It was more complex than expected but it was fun to play with. Who designed this ISA? I'd love to see how the decoder is implemented in HW, by all means it is not "simplified" unless I missed some pattern...
Hack around over-optimized labels-as-values extension from GCC.
ISO C++ conformance fixes: remove superfluous coma at the end of enum definitions.
Don't clobber "sip" arg from our sigsegv_info wrapper (renamed to SIP).
Happy New Year!
Fix instruction skipping on MacOS X in the fast path case.
Add support for 64-bit MacOS X for PowerPC (untested beyond "it compiles").
According to kernel sources, that is XNU 344.49 (10.2.8), XNU 517.12.7 (10.3.9), XNU 792.21.3 (10.4.10) and XNU 1228 (10.5.0), exception handler code[1] always contains the fault address nowadays. So make it the default fast path but keep provisions to check that at run-time first. This yields a nearly 4x improvement in SIGSEGV recovery but MacOS X is still suboptimal wrt. Linux, so VOSF is still not possible with frameskip == 0. XXX: the ppc kernel had bugs that caused DAR (put into code[1]) to be incorrectly decoded. This would need a broader test audience or more careful audit of the sources changes.
Improve API for systems that require explicit calls to functions to retrieve the memory addresses that triggered a SIGSEGV (e.g. MacOS X).
Add Darwin/x86_64 support. Fix EDX register index for i386 insn decoder.
Arrangements for Linux/mips.
A few fixlets to the SIGSEGV library: - Don't export transfer types definitions (formerly used by older API) - Handle ADD instructions in ix86_skip_instruction() (generated by icc 9.1) - Use "%p" format for EIP/RIP addresses
MacOS X exception handling updates: - Call user handler for KERN_INVALID_ADDRESS too (SIGBUS) - Check for VALID_THREAD_STATE_FLAVOR in forward_exception() - Return KERN_FAILURE if forward_exception() got an unknown behavior code
decode movslq (generated by gcc4.1)
add some barriers to make sure L_e_region* really come after the test insns
ugly cast games
Code I wrote yesterday was totally broken. It's enough to make sure nPC is correctly updated too... Instruction skipper now works on Solaris/SPARC.
- Fix SPARC Store Doubleword transfer_size in decoder. - In the instruction skipper code, add a huge kludge (trampoline) to forcibly zero out %global registers when requested. Otherwise, Solaris/SPARC turned out to use %g1 during signal handling, and the zero we could have written to there vanished. This assumes [%sp-8] is valid to use (ABI states data below %sp is undefined though)
Adapt for MacOS X for Intel, also fix thread_state type in forward_exception()
Mach exception recovery and instruction skipping for Darwin/x86.
Enable instruction skipping for OpenBSD 3.4 on i386
instruction skipper for Solaris/i386 (Solaris 9)
NetBSD/ppc support
Happy New Year!
Fixes for NetBSD 2.0
Check that we can really read at the faulty eip in Windows prior to decoding the instruction. Also fix the unrecoverable fault dump to really be useful.
ppc64 fixes
Integrate SIGSEGV recovery from libsigsegv for Windows and Cygwin. Also implement instruction skipper for Windows/x86.
Decode MOVSX r32, r/m16 (generated by icc v8.0 on x86)
cosmetic fixes when printing movsbq operation summary
handle (skip) x86 movsbl instructions
Summary: possible support of SheepShaver on Zaurus PDAs Add Linux/ARM instruction skipping, includes support for ARMv4+ halfword and signed data transfer instructions. Note that load/store multiple are not handled and someone has to make sure post-incr/write-back logic is correctly implemented.
Added missing switch value to eliminate a warning
ARM/linux sigsegv handler. Instruction skipper yet to be written for happy Zaurus owners.
Happy New Year! :)
Instruction skipper for Solaris/SPARC.
Add support for Linux/hppa, FreeBSD/alpha. Misc debugging output.
MIPS instruction skipper. TODO: check LWL/LWR semantics.
Fix subterfuge mode on IRIX/mips. Get PC in both modes for Irix too
really fix writes to byte registers
fix configure tests. i.e. move up arch_insn_skipper_tests()
Extend x86 instruction skipper to AMD64. Add plenty of arch dependent opcodes to test it. Also fix DEBUG output & writes (zero'ing) to %xH regs
- FreeBSD/i386 sigcontext subterfuge support for instruction skipper - NetBSD/alpha support from Boehm GC - NetBSD/i386 won't work in sigcontext subterfuge mode unless instruction is decoded more accurately to compute the effective address. Also note that NetBSD 1.6 does not support siginfo_t yet.
Solaris/SPARC support for SIGSEGV_FAULT_INSTRUCTION
fix merge with Mach exception filters, we have preconditions to check
indentation fixes, optimize handle_badaccess() to receive only necessary data and don't copy a struct sigcontext again on x86.
return something more convenient to debug on errors
Make sure reported fault instruction address falls into the expected code range. This is a configure-time safety net that depends on the GCC "Labels as Values" extension.
Mach memory fault recovery from Michael Z. Sliczniak
really fix typo!
fix typo
New SIGSEGV API so that skip-instruction requests are more explicit. Yes, that's api change, but that's cooler now for SheepShaver. ;-)
Bring x86 instruction skipper back to life
New API to ignore a SIGSEGV fault. This should help on SheepShaver/x86 for now since I still don't know why MacOS would like to write to ROM on a particular test.
configure script is reportedly no longer crashing on FreeBSD when SIGSEGV_SKIP_INSTRUCTION is set.
- New arch support for IP retrieval on SIGSEGV.
Correctly guard FreeBSD bits
Backout "ignoresegv" support on FreeBSD/x86 for now. Unfortunately, the configure script would hang whereas standalone testing will pass all tests. Any idea why?? - Unix/sigsegv.cpp (ix86_skip_instruction): Add decoder for mozbl instruction. (SIGSEGV_REGISTER_FILE [FreeBSD/x86]): Note why we start at EDI offset rather than plain sigcontext pointer. i.e. I don't know sigset_t size beforehand and don't intend to.
Implement "ignoresegv" feature on FreeBSD/x86 (tested on FreeBSD 4.5) - sigsegv.cpp (ix86_skip_instruction): Add decoder for movzwl instructions. (main): oddly, FreeBSD doesn't seem to let a write to a page if it is write-only. Aka. make the page readable too.
- Fix compilation on Linux/x86 with SIGCONTEXT_SUBTERFUGE
- sigsegv.cpp (ix86_skip_instruction): Fix DEBUG compilation.
Implement "ignoresegv" feature on Darwin/ppc (tested on MacOS X) - Unix/sigsegv.cpp (powerpc_decode_instruction): New. (get_fault_instruction [MacOS X]): Factorize code. (get_fault_instruction [Linux/m68k]): Don't use expression statement. - README (ignoresegv): Add Darwin/ppc to list of supported platforms.
Implement "ignoresegv" feature on Linux/ppc: - Unix/sigsegv.cpp (powerpc_skip_instruction): New from SheepShaver code. - README (ignoresegv): Add Linux/ppc to list of supported platforms.
- video_vosh.h (Screen_fault_handler): Move unrecoverable fault case to... - main_unix.cpp (sigsegv_dump_state): ... Here. - sigsegv.h (sigsegv_fault_handler_t): Rename from sigsegv_handler_t. - sigsegv.h (sigsegv_state_dumper_t): New.
- Merge with clisp SIGSEGV library version 1.2 with support added for HP-UX (contributed by Paolo Bonzini) - Add missing? include <ucontext.h> for Irix and OSF/1 support
Implement the "ignoresegv" feature from SheepShaver. This is Unix-specific so far. Target platform is currently Linux/x86.
- Add fault instruction recovery for Linux/ppc and siginfo_t handlers
direct addressing works under FreeBSD (says Michael Alyn Miller :-)
- documentation updates - 2001 -> 2002 - version 0.9 -> 1.0
- Add EIP recovery on Linux/x86 when using siginfo_t based signal handlers
- small fixes for Linux/ia64
- added SIGSEGV support for Linux/Alpha (to be checked), Darwin/PPC - added uniform virtual memory allocation (supports mmap(), vm_allocate(), or fallbacks to malloc()/free()) - cleaned up memory allocation in main_unix.cpp
- use "volatile" to prevent from optimization for writes to page
- fixed "SIGSEGV recovery" not supported case
- new and updated SIGSEGV support functions: + configure script cleanups + possible support for Direct Addressing / VOSF on other platforms
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