75 |
|
uint8 *ROMBaseHost; // ROM base (host address space) |
76 |
|
uint32 ROMSize; // Size of ROM |
77 |
|
|
78 |
+ |
uint32 MacsBugFlags = 0xbff; |
79 |
+ |
|
80 |
|
|
81 |
|
// CPU and FPU type, addressing mode |
82 |
|
int CPUType; |
93 |
|
struct Library *IFFParseBase = NULL; |
94 |
|
struct Library *AslBase = NULL; |
95 |
|
struct Library *P96Base = NULL; |
96 |
+ |
struct Library *CyberGfxBase = NULL; |
97 |
|
struct Library *TimerBase = NULL; |
98 |
|
struct Library *AHIBase = NULL; |
99 |
|
struct Library *DiskBase = NULL; |
183 |
|
ErrorAlert(GetString(STR_NO_ASL_LIB_ERR)); |
184 |
|
QuitEmulator(); |
185 |
|
} |
186 |
+ |
|
187 |
+ |
// These two can fail (the respective gfx support won't be available, then) |
188 |
|
P96Base = OpenLibrary((UBYTE *)"Picasso96API.library", 2); |
189 |
+ |
CyberGfxBase = OpenLibrary((UBYTE *)"cybergraphics.library", 2); |
190 |
|
|
191 |
|
// Read preferences |
192 |
|
PrefsInit(); |
244 |
|
WarningAlert(GetString(STR_SMALL_RAM_WARN)); |
245 |
|
RAMSize = 1024*1024; |
246 |
|
} |
247 |
< |
RAMBaseHost = (uint8 *)AllocMem(RAMSize + 0x100000, MEMF_PUBLIC); |
248 |
< |
if (RAMBaseHost == NULL) { |
249 |
< |
ErrorAlert(GetString(STR_NO_MEM_ERR)); |
250 |
< |
QuitEmulator(); |
251 |
< |
} |
247 |
> |
RAMBaseHost = (uint8 *)AllocVec(RAMSize + 0x100000, MEMF_PUBLIC); |
248 |
> |
// if (RAMBaseHost == NULL) { |
249 |
> |
// ErrorAlert(GetString(STR_NO_MEM_ERR)); |
250 |
> |
// QuitEmulator(); |
251 |
> |
// } |
252 |
> |
if (RAMBaseHost == NULL) |
253 |
> |
{ |
254 |
> |
uint32 newRAMSize = AvailMem(MEMF_LARGEST) - 0x100000; |
255 |
> |
char xText[120]; |
256 |
> |
|
257 |
> |
sprintf(xText, GetString(STR_NOT_ENOUGH_MEM_WARN), RAMSize, newRAMSize); |
258 |
> |
|
259 |
> |
if (1 != ChoiceAlert(xText, "Use", "Quit")) |
260 |
> |
QuitEmulator(); |
261 |
> |
|
262 |
> |
RAMSize = newRAMSize; |
263 |
> |
RAMBaseHost = (uint8 *)AllocVec(RAMSize + 0x100000, MEMF_PUBLIC); |
264 |
> |
if (RAMBaseHost == NULL) { |
265 |
> |
ErrorAlert(GetString(STR_NO_MEM_ERR)); |
266 |
> |
QuitEmulator(); |
267 |
> |
} |
268 |
> |
} |
269 |
|
RAMBaseMac = (uint32)RAMBaseHost; |
270 |
|
D(bug("Mac RAM starts at %08lx\n", RAMBaseHost)); |
271 |
|
ROMBaseHost = RAMBaseHost + RAMSize; |
332 |
|
// Set task priority to -1 so we don't use all processing time |
333 |
|
SetTaskPri(MainTask, -1); |
334 |
|
|
335 |
+ |
WriteMacInt32(MacsBugFlags, 0); |
336 |
+ |
|
337 |
|
// Swap stack to Mac RAM area |
338 |
|
stack_swap.stk_Lower = RAMBaseHost; |
339 |
|
stack_swap.stk_Upper = (ULONG)RAMBaseHost + RAMSize; |
368 |
|
|
369 |
|
void QuitEmulator(void) |
370 |
|
{ |
371 |
+ |
// Stop 60Hz thread |
372 |
+ |
if (tick_proc) { |
373 |
+ |
SetSignal(0, SIGF_SINGLE); |
374 |
+ |
tick_proc_active = false; |
375 |
+ |
Wait(SIGF_SINGLE); |
376 |
+ |
} |
377 |
+ |
|
378 |
|
// Restore stack |
379 |
|
if (stack_swapped) { |
380 |
|
stack_swapped = false; |
388 |
|
FreeSignal(IRQSig); |
389 |
|
} |
390 |
|
|
359 |
– |
// Stop 60Hz thread |
360 |
– |
if (tick_proc) { |
361 |
– |
SetSignal(0, SIGF_SINGLE); |
362 |
– |
tick_proc_active = false; |
363 |
– |
Wait(SIGF_SINGLE); |
364 |
– |
} |
365 |
– |
|
391 |
|
// Remove trap handler |
392 |
|
MainTask->tc_TrapCode = OldTrapHandler; |
393 |
|
|
396 |
|
|
397 |
|
// Delete RAM/ROM area |
398 |
|
if (RAMBaseHost) |
399 |
< |
FreeMem(RAMBaseHost, RAMSize + 0x100000); |
399 |
> |
FreeVec(RAMBaseHost); |
400 |
|
|
401 |
|
// Delete scratch memory area |
402 |
|
if (ScratchMem) |
423 |
|
PrefsExit(); |
424 |
|
|
425 |
|
// Close libraries |
426 |
+ |
if (CyberGfxBase) |
427 |
+ |
CloseLibrary(CyberGfxBase); |
428 |
|
if (P96Base) |
429 |
|
CloseLibrary(P96Base); |
430 |
|
if (AslBase) |
474 |
|
Signal(MainTask, IRQSigMask); |
475 |
|
} |
476 |
|
|
477 |
+ |
void TriggerNMI(void) |
478 |
+ |
{ |
479 |
+ |
AsmTriggerNMI(); |
480 |
+ |
} |
481 |
+ |
|
482 |
|
|
483 |
|
/* |
484 |
|
* 60Hz thread |
521 |
|
if (++tick_counter > 60) { |
522 |
|
tick_counter = 0; |
523 |
|
WriteMacInt32(0x20c, TimerDateTime()); |
524 |
+ |
SetInterruptFlag(INTFLAG_1HZ); |
525 |
+ |
TriggerInterrupt(); |
526 |
|
} |
527 |
|
|
528 |
|
// Trigger 60Hz interrupt |
636 |
|
EmulatedSR |= 0x0700; |
637 |
|
|
638 |
|
// Call opcode routine |
639 |
< |
EmulOp(*(uint16 *)(r->pc), (M68kRegisters *)r); |
639 |
> |
EmulOp(opcode, (M68kRegisters *)r); |
640 |
|
r->pc += 2; |
641 |
|
|
642 |
|
// Restore interrupts |