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root/cebix/BasiliskII/src/AmigaOS/asm_support.asm

Comparing BasiliskII/src/AmigaOS/asm_support.asm (file contents):
Revision 1.4 by cebix, 2000-07-22T16:00:34Z vs.
Revision 1.13 by jlachmann, 2002-06-23T08:27:05Z

#	Line 1 | Line 1
1		*
2		* asm_support.asm - AmigaOS utility functions in assembly language
3		*
4	<	* Basilisk II (C) 1997-1999 Christian Bauer
4	>	* Basilisk II (C) 1997-2001 Christian Bauer
5		*
6		* This program is free software; you can redistribute it and/or modify
7		* it under the terms of the GNU General Public License as published by
#	Line 25 | Line 25
25		INCLUDE "dos/dos.i"
26		INCLUDE "devices/timer.i"
27
28	+	INCLUDE "asmsupp.i"
29	+
30		XDEF    _AtomicAnd
31		XDEF    _AtomicOr
32		XDEF    _MoveVBR
33	+	XDEF    _DisableSuperBypass
34		XDEF    _Execute68k
35		XDEF    _Execute68kTrap
36		XDEF    _TrapHandlerAsm
37		XDEF    _ExceptionHandlerAsm
38	<	XDEF    _Scod060Patch1
36	<	XDEF    _Scod060Patch2
37	<	XDEF    _ThInitFPUPatch
38	>	XDEF    _AsmTriggerNMI
39
40		XREF    _OldTrapHandler
41		XREF    _OldExceptionHandler
#	Line 47 | Line 48
48		XREF    _SysBase
49		XREF    _quit_emulator
50
51	+	INFO_LEVEL      equ     0
52	+
53		SECTION text,CODE
54
55	+	MACHINE 68020
56	+
57	+	IFGE    INFO_LEVEL
58	+	subSysName:     dc.b    '+',0
59	+	ENDIF
60	+
61		*
62		* Atomic bit operations (don't trust the compiler)
63		*
#	Line 106 | Line 115 | setvbr         movec   d0,vbr
115		rte
116
117		*
118	+	* Disable 68060 Super Bypass mode
119	+	*
120	+
121	+	_DisableSuperBypass
122	+	movem.l d0-d1/a0-a1/a5-a6,-(sp)
123	+	move.l  _SysBase,a6
124	+
125	+	lea     dissb,a5
126	+	JSRLIB  Supervisor
127	+
128	+	movem.l (sp)+,d0-d1/a0-a1/a5-a6
129	+	rts
130	+
131	+	MACHINE 68060
132	+
133	+	dissb           movec   pcr,d0
134	+	bset    #5,d0
135	+	movec   d0,pcr
136	+	rte
137	+
138	+	MACHINE 68020
139	+
140	+	*
141		* Execute 68k subroutine (must be ended with rts)
142		* r->a[7] and r->sr are unused!
143		*
#	Line 183 | Line 215 | _ExceptionHandlerAsm
215		pea     1$
216		move.w  _EmulatedSR,d0
217		move.w  d0,-(sp)
218	<	or.w    #$2100,d0               ;Set interrupt level in SR
218	>	or.w    #$2100,d0               ;Set interrupt level in SR, enter (virtual) supervisor mode
219		move.w  d0,_EmulatedSR
220	<	move.l  $64.w,a0                ;Jump to MacOS interrupt handler
221	<	jmp     (a0)
220	>	move.l  $64.w,-(sp)             ;Jump to MacOS interrupt handler
221	>	rts
222
223		1$              move.l  (sp)+,d0                ;Restore d0
224		rts
#	Line 217 | Line 249 | _ExceptionHandlerAsm
249		rts
250
251		*
252	<	* Process Manager 68060 FPU patches
252	>	* Trap handler of main task
253		*
254
255	<	_Scod060Patch1  fsave   -(sp)           ;Save FPU state
256	<	tst.b   2(sp)           ;Null?
257	<	beq.s   1$
258	<	fmovem.x fp0-fp7,-(sp)  ;No, save FPU registers
259	<	fmove.l fpiar,-(sp)
260	<	fmove.l fpsr,-(sp)
261	<	fmove.l fpcr,-(sp)
262	<	pea     -1              ;Push "FPU state saved" flag
263	<	1$              move.l  d1,-(sp)
264	<	move.l  d0,-(sp)
265	<	bsr.s   3$              ;Switch integer registers and stack
266	<	addq.l  #8,sp
267	<	tst.b   2(sp)           ;New FPU state null or "FPU state saved" flag set?
268	<	beq.s   2$
269	<	addq.l  #4,sp           ;Flag set, skip it
270	<	fmove.l (sp)+,fpcr      ;Restore FPU registers and state
271	<	fmove.l (sp)+,fpsr
272	<	fmove.l (sp)+,fpiar
273	<	fmovem.x (sp)+,fp0-fp7
274	<	2$              frestore (sp)+
275	<	movem.l (sp)+,d0-d1
276	<	rts
277	<
278	<	3$              move.l  4(sp),a0        ;Switch integer registers and stack
279	<	move    sr,-(sp)
280	<	movem.l d2-d7/a2-a6,-(sp)
281	<	cmp.w   #0,a0
282	<	beq.s   4$
283	<	move.l  sp,(a0)
284	<	4$              move.l  $36(sp),a0
285	<	movem.l (a0)+,d2-d7/a2-a6
286	<	move    (a0)+,sr
287	<	move.l  a0,sp
255	>	_TrapHandlerAsm:
256	>	IFEQ    INFO_LEVEL-1002
257	>	move.w  ([6,a0]),-(sp)
258	>	move.w  #0,-(sp)
259	>	move.l  (4+6,a0),-(sp)
260	>	PUTMSG  0,'%s/TrapHandlerAsm:  addr=%08lx  opcode=%04lx'
261	>	lea     (2*4,sp),sp
262	>	ENDC
263	>
264	>	cmp.l   #4,(sp)                 ;Illegal instruction?
265	>	beq.s   doillinstr
266	>	cmp.l   #10,(sp)                ;A-Line exception?
267	>	beq.s   doaline
268	>	cmp.l   #8,(sp)                 ;Privilege violation?
269	>	beq.s   doprivviol
270	>
271	>	cmp.l   #9,(sp)                 ;Trace?
272	>	beq     dotrace
273	>	cmp.l   #3,(sp)                 ;Illegal Address?
274	>	beq.s   doilladdr
275	>	cmp.l   #11,(sp)                ;F-Line exception
276	>	beq.s   dofline
277	>
278	>	cmp.l   #32,(sp)
279	>	blt     1$
280	>	cmp.l   #47,(sp)
281	>	ble     doTrapXX                ; Vector 32-47 : TRAP #0 - 15 Instruction Vectors
282	>
283	>	1$:
284	>	cmp.l   #48,(sp)
285	>	blt     2$
286	>	cmp.l   #55,(sp)
287	>	ble     doTrapFPU
288	>	2$:
289	>	IFEQ    INFO_LEVEL-1009
290	>	PUTMSG  0,'%s/TrapHandlerAsm:  stack=%08lx %08lx %08lx %08lx'
291	>	ENDC
292	>
293	>	move.l  _OldTrapHandler,-(sp)   ;No, jump to old trap handler
294		rts
295
296	<	_Scod060Patch2  move.l  d0,-(sp)        ;Create 68060 null frame on stack
297	<	move.l  d0,-(sp)
298	<	move.l  d0,-(sp)
299	<	frestore (sp)+          ;and load it
296	>	*
297	>	* TRAP #0 - 15 Instruction Vectors
298	>	*
299	>
300	>	doTrapXX:
301	>	IFEQ    INFO_LEVEL-1009
302	>	PUTMSG  0,'%s/doTrapXX:  stack=%08lx %08lx %08lx %08lx'
303	>	ENDC
304	>
305	>	movem.l a0/d0,-(sp)             ;Save a0,d0
306	>	move.l  (2*4,sp),d0             ;vector number 32-47
307	>
308	>	move.l  usp,a0                  ;Get user stack pointer
309	>	move.l  (4*4,sp),-(a0)          ;Copy 4-word stack frame to user stack
310	>	move.l  (3*4,sp),-(a0)
311	>	move.l  a0,usp                  ;Update USP
312	>	or.w    #$2000,(a0)             ;set Supervisor bit in SR
313	>
314	>	lsl.l   #2,d0                   ;convert vector number to vector offset
315	>	move.l  d0,a0
316	>	move.l  (a0),d0                 ;get mac trap vector
317	>
318	>	move.l  usp,a0                  ;Get user stack pointer
319	>	move.l  d0,-(a0)                ;store vector offset as return address
320	>	move.l  a0,usp                  ;Update USP
321	>
322	>	movem.l (sp)+,a0/d0             ;Restore a0,d0
323	>	addq.l  #4*2,sp                 ;Remove exception frame from supervisor stack
324	>
325	>	andi    #$d8ff,sr               ;Switch to user mode, enable interrupts
326		rts
327
328	+
329		*
330	<	* Thread Manager 68060 FPU patches
330	>	* FPU Exception Instruction Vectors
331		*
332
333	<	_ThInitFPUPatch tst.b   $40(a4)
334	<	bne.s   1$
335	<	moveq   #0,d0           ;Create 68060 null frame on stack
336	<	move.l  d0,-(a3)
337	<	move.l  d0,-(a3)
338	<	move.l  d0,-(a3)
339	<	1$              rts
333	>	doTrapFPU:
334	>	move.l  d0,(sp)
335	>	fmove.l fpcr,d0
336	>	and.w   #$00ff,d0               ;disable FPU exceptions
337	>	fmove.l d0,fpcr
338	>	move.l  (sp)+,d0                ;Restore d0
339	>	rte
340	>
341
342		*
343	<	* Trap handler of main task
343	>	* trace Vector
344		*
345
346	<	_TrapHandlerAsm cmp.l   #4,(sp)                 ;Illegal instruction?
347	<	beq.s   doillinstr
348	<	cmp.l   #10,(sp)                ;A-Line exception?
349	<	beq.s   doaline
284	<	cmp.l   #8,(sp)                 ;Privilege violation?
285	<	beq.s   doprivviol
346	>	dotrace
347	>	IFEQ    INFO_LEVEL-1009
348	>	PUTMSG  0,'%s/dotrace:  stack=%08lx %08lx %08lx %08lx'
349	>	ENDC
350
351	<	move.l  _OldTrapHandler,-(sp)   ;No, jump to old trap handler
351	>	move.l  a0,(sp)                 ;Save a0
352	>	move.l  usp,a0                  ;Get user stack pointer
353	>
354	>	IFEQ    INFO_LEVEL-1009
355	>	move.l  (12,a0),-(sp)
356	>	move.l  (8,a0),-(sp)
357	>	move.l  (4,a0),-(sp)
358	>	move.l  (0,a0),-(sp)
359	>	move.l  a0,-(sp)
360	>	move.l  a7,-(sp)
361	>	PUTMSG  0,'%s/dotrace:  sp=%08lx  usp=%08lx (%08lx %08lx %08lx %08lx)'
362	>	lea     (6*4,sp),sp
363	>	ENDC
364	>
365	>	move.l  3*4(sp),-(a0)           ;Copy 6-word stack frame to user stack
366	>	move.l  2*4(sp),-(a0)
367	>	move.l  1*4(sp),-(a0)
368	>	move.l  a0,usp                  ;Update USP
369	>	or.w    #$2000,(a0)             ;set Supervisor bit in SR
370	>	move.l  (sp)+,a0                ;Restore a0
371	>
372	>	lea     6*2(sp),sp              ;Remove exception frame from supervisor stack
373	>	andi    #$18ff,sr               ;Switch to user mode, enable interrupts, disable trace
374	>
375	>	move.l  $24.w,-(sp)             ;Jump to MacOS exception handler
376		rts
377
378	+
379		*
380		* A-Line handler: call MacOS A-Line handler
381		*
#	Line 296 | Line 385 | doaline                move.l  a0,(sp)                 ;Save a0
385		move.l  8(sp),-(a0)             ;Copy stack frame to user stack
386		move.l  4(sp),-(a0)
387		move.l  a0,usp                  ;Update USP
388	+
389	+	or.w    #$2000,(a0)             ;set Supervisor bit in SR
390		move.l  (sp)+,a0                ;Restore a0
391
392		addq.l  #8,sp                   ;Remove exception frame from supervisor stack
393		andi    #$d8ff,sr               ;Switch to user mode, enable interrupts
394
395	+	and.w   #$f8ff,_EmulatedSR      ;enable interrupts in EmulatedSR
396	+
397		move.l  $28.w,-(sp)             ;Jump to MacOS exception handler
398		rts
399
400		*
401	+	* F-Line handler: call F-Line exception handler
402	+	*
403	+
404	+	dofline         move.l  a0,(sp)                 ;Save a0
405	+	move.l  usp,a0                  ;Get user stack pointer
406	+	move.l  8(sp),-(a0)             ;Copy stack frame to user stack
407	+	move.l  4(sp),-(a0)
408	+	move.l  a0,usp                  ;Update USP
409	+	or.w    #$2000,(a0)             ;set Supervisor bit in SR
410	+	move.l  (sp)+,a0                ;Restore a0
411	+
412	+	addq.l  #8,sp                   ;Remove exception frame from supervisor stack
413	+	andi    #$d8ff,sr               ;Switch to user mode, enable interrupts
414	+
415	+	and.w   #$f8ff,_EmulatedSR      ;enable interrupts in EmulatedSR
416	+
417	+	move.l  $2c.w,-(sp)             ;Jump to MacOS exception handler
418	+	rts
419	+
420	+	*
421	+	* Illegal address handler
422	+	*
423	+
424	+	doilladdr:
425	+	IFEQ    INFO_LEVEL-1009
426	+	PUTMSG  0,'%s/doilladdr:  stack=%08lx %08lx %08lx %08lx'
427	+	ENDC
428	+
429	+	move.l  a0,(sp)                 ;Save a0
430	+
431	+	move.l  usp,a0                  ;Get user stack pointer
432	+	move.l  3*4(sp),-(a0)           ;Copy 6-word stack frame to user stack
433	+	move.l  2*4(sp),-(a0)
434	+	move.l  1*4(sp),-(a0)
435	+	move.l  a0,usp                  ;Update USP
436	+	or.w    #$2000,(a0)             ;set Supervisor bit in SR
437	+	move.l  (sp)+,a0                ;Restore a0
438	+
439	+	lea     6*2(sp),sp              ;Remove exception frame from supervisor stack
440	+	andi    #$d8ff,sr               ;Switch to user mode, enable interrupts
441	+
442	+	move.l  $0c.w,-(sp)             ;Jump to MacOS exception handler
443	+	rts
444	+
445	+
446	+	*
447		* Illegal instruction handler: call IllInstrHandler() (which calls EmulOp())
448		*   to execute extended opcodes (see emul_op.h)
449		*
450
451	<	doillinstr      move.l  a6,(sp)                 ;Save a6
451	>	doillinstr      movem.l a0/d0,-(sp)
452	>	move.w  ([6+2*4,sp]),d0
453	>	and.w   #$ff00,d0
454	>	cmp.w   #$7100,d0
455	>
456	>	IFEQ    INFO_LEVEL-1009
457	>	move.l  d0,-(sp)
458	>	PUTMSG  0,'%s/doillinst:  d0=%08lx stack=%08lx %08lx %08lx %08lx'
459	>	lea     (1*4,sp),sp
460	>	ENDC
461	>	movem.l (sp)+,a0/d0
462	>	beq     1$
463	>
464	>	move.l  a0,(sp)                 ;Save a0
465	>	move.l  usp,a0                  ;Get user stack pointer
466	>	move.l  8(sp),-(a0)             ;Copy stack frame to user stack
467	>	move.l  4(sp),-(a0)
468	>	move.l  a0,usp                  ;Update USP
469	>	or.w    #$2000,(a0)             ;set Supervisor bit in SR
470	>	move.l  (sp)+,a0                ;Restore a0
471	>
472	>	add.w   #3*4,sp                 ;Remove exception frame from supervisor stack
473	>	andi    #$d8ff,sr               ;Switch to user mode, enable interrupts
474	>
475	>	move.l  $10.w,-(sp)             ;Jump to MacOS exception handler
476	>	rts
477	>
478	>	1$:
479	>	move.l  a6,(sp)                 ;Save a6
480		move.l  usp,a6                  ;Get user stack pointer
481
482		move.l  a6,-10(a6)              ;Push USP (a7)
#	Line 339 | Line 506 | doillinstr     move.l  a6,(sp)                 ;Save a6
506		doprivviol      move.l  d0,(sp)                 ;Save d0
507		move.w  ([6,sp]),d0             ;Get instruction word
508
509	+	IFEQ    INFO_LEVEL-1001
510	+	move.w  ([6,a0]),-(sp)
511	+	move.w  #0,-(sp)
512	+	PUTMSG  0,'%s/doprivviol:  opcode=%04lx'
513	+	lea     (1*4,sp),sp
514	+	ENDC
515	+
516		cmp.w   #$40e7,d0               ;move sr,-(sp)?
517		beq     pushsr
518		cmp.w   #$46df,d0               ;move (sp)+,sr?
#	Line 364 | Line 538 | doprivviol     move.l  d0,(sp)                 ;Save d0
538		cmp.w   #$40d0,d0               ;move sr,(a0)?
539		beq     movefromsra0
540		cmp.w   #$40d7,d0               ;move sr,(sp)?
541	<	beq     movefromsra0
541	>	beq     movefromsrsp
542
543		cmp.w   #$f327,d0               ;fsave -(sp)?
544		beq     fsavepush
545		cmp.w   #$f35f,d0               ;frestore (sp)+?
546		beq     frestorepop
547	+	cmp.w   #$f32d,d0               ;fsave xxx(a5) ?
548	+	beq     fsavea5
549	+	cmp.w   #$f36d,d0               ;frestore xxx(a5) ?
550	+	beq     frestorea5
551
552		cmp.w   #$4e73,d0               ;rte?
553		beq     pvrte
#	Line 418 | Line 596 | doprivviol     move.l  d0,(sp)                 ;Save d0
596		cmp.w   #$f4f8,d0               ;cpusha dc/ic?
597		beq     cpushadcic
598
599	+	cmp.w   #$4e69,d0               ;move usp,a1
600	+	beq     moveuspa1
601	+	cmp.w   #$4e68,d0               ;move usp,a0
602	+	beq     moveuspa0
603	+
604	+	cmp.w   #$4e61,d0               ;move a1,usp
605	+	beq     moved1usp
606	+
607		pv_unhandled    move.l  (sp),d0                 ;Unhandled instruction, jump to handler in main.cpp
608		move.l  a6,(sp)                 ;Save a6
609		move.l  usp,a6                  ;Get user stack pointer
#	Line 451 | Line 637 | pushsr         move.l  a0,-(sp)                ;Save a0
637		move.l  (sp)+,a0                ;Restore a0
638		move.l  (sp)+,d0                ;Restore d0
639		addq.l  #2,2(sp)                ;Skip instruction
640	+
641	+	IFEQ    INFO_LEVEL-1001
642	+	move.l  (4),-(sp)
643	+	PUTMSG  0,'%s/doprivviol END:  Execbase=%08lx'
644	+	lea     (1*4,sp),sp
645	+	ENDC
646		rte
647
648		; move (sp)+,sr
#	Line 459 | Line 651 | popsr          move.l  a0,-(sp)                ;Save a0
651		move.w  (a0)+,d0                ;Get SR from user stack
652		move.w  d0,8(sp)                ;Store into CCR on exception stack frame
653		and.w   #$00ff,8(sp)
654	<	and.w   #$2700,d0               ;Extract supervisor bits
654	>	and.w   #$e700,d0               ;Extract supervisor bits
655		move.w  d0,_EmulatedSR          ;And save them
656
657		and.w   #$0700,d0               ;Rethrow exception if interrupts are pending and reenabled
#	Line 477 | Line 669 | popsr          move.l  a0,-(sp)                ;Save a0
669		move.l  (sp)+,a0                ;Restore a0
670		move.l  (sp)+,d0                ;Restore d0
671		addq.l  #2,2(sp)                ;Skip instruction
672	+
673	+	IFEQ    INFO_LEVEL-1001
674	+	move.l  (4),-(sp)
675	+	PUTMSG  0,'%s/doprivviol END:  Execbase=%08lx'
676	+	lea     (1*4,sp),sp
677	+	ENDC
678		rte
679
680		; ori #xxxx,sr
#	Line 485 | Line 683 | orisr          move.w  4(sp),d0                ;Get CCR from st
683		or.w    ([6,sp],2),d0           ;Or with immediate value
684		move.w  d0,4(sp)                ;Store into CCR on stack
685		and.w   #$00ff,4(sp)
686	<	and.w   #$2700,d0               ;Extract supervisor bits
686	>	and.w   #$e700,d0               ;Extract supervisor bits
687		move.w  d0,_EmulatedSR          ;And save them
688		move.l  (sp)+,d0                ;Restore d0
689		addq.l  #4,2(sp)                ;Skip instruction
690	+
691	+	IFEQ    INFO_LEVEL-1001
692	+	move.l  (4),-(sp)
693	+	PUTMSG  0,'%s/doprivviol END:  Execbase=%08lx'
694	+	lea     (1*4,sp),sp
695	+	ENDC
696		rte
697
698		; andi #xxxx,sr
#	Line 497 | Line 701 | andisr         move.w  4(sp),d0                ;Get CCR from s
701		and.w   ([6,sp],2),d0           ;And with immediate value
702		storesr4        move.w  d0,4(sp)                ;Store into CCR on stack
703		and.w   #$00ff,4(sp)
704	<	and.w   #$2700,d0               ;Extract supervisor bits
704	>	and.w   #$e700,d0               ;Extract supervisor bits
705		move.w  d0,_EmulatedSR          ;And save them
706
707		and.w   #$0700,d0               ;Rethrow exception if interrupts are pending and reenabled
#	Line 512 | Line 716 | storesr4       move.w  d0,4(sp)                ;Store into CC
716		movem.l (sp)+,d0-d1/a0-a1/a6
717		1$              move.l  (sp)+,d0                ;Restore d0
718		addq.l  #4,2(sp)                ;Skip instruction
719	+
720	+	IFEQ    INFO_LEVEL-1001
721	+	move.l  (4),-(sp)
722	+	PUTMSG  0,'%s/doprivviol END:  Execbase=%08lx'
723	+	lea     (1*4,sp),sp
724	+	ENDC
725		rte
726
727		; move #xxxx,sr
#	Line 543 | Line 753 | movefromsrabs  move.l  a0,-(sp)                ;Save a0
753		move.l  (sp)+,a0                ;Restore a0
754		move.l  (sp)+,d0                ;Restore d0
755		addq.l  #4,2(sp)                ;Skip instruction
756	+
757	+	IFEQ    INFO_LEVEL-1001
758	+	move.l  (4),-(sp)
759	+	PUTMSG  0,'%s/doprivviol END:  Execbase=%08lx'
760	+	lea     (1*4,sp),sp
761	+	ENDC
762		rte
763
764		; move sr,(a0)
#	Line 551 | Line 767 | movefromsra0   move.w  4(sp),d0                ;Get CCR
767		move.w  d0,(a0)                 ;Store SR
768		move.l  (sp)+,d0                ;Restore d0
769		addq.l  #2,2(sp)                ;Skip instruction
770	+
771	+	IFEQ    INFO_LEVEL-1001
772	+	move.l  (4),-(sp)
773	+	PUTMSG  0,'%s/doprivviol END:  Execbase=%08lx'
774	+	lea     (1*4,sp),sp
775	+	ENDC
776		rte
777
778		; move sr,(sp)
#	Line 562 | Line 784 | movefromsrsp   move.l  a0,-(sp)                ;Save a0
784		move.l  (sp)+,a0                ;Restore a0
785		move.l  (sp)+,d0                ;Restore d0
786		addq.l  #2,2(sp)                ;Skip instruction
787	+
788	+	IFEQ    INFO_LEVEL-1001
789	+	move.l  (4),-(sp)
790	+	PUTMSG  0,'%s/doprivviol END:  Execbase=%08lx'
791	+	lea     (1*4,sp),sp
792	+	ENDC
793		rte
794
795		; fsave -(sp)
796		fsavepush       move.l  (sp),d0                 ;Restore d0
797		move.l  a0,(sp)                 ;Save a0
798		move.l  usp,a0                  ;Get user stack pointer
799	<	fsave   -(a0)                   ;Push FP state
799	>	move.l  #$41000000,-(a0)        ;Push idle frame
800		move.l  a0,usp                  ;Update USP
801		move.l  (sp)+,a0                ;Restore a0
802		addq.l  #2,2(sp)                ;Skip instruction
803	+
804	+	IFEQ    INFO_LEVEL-1001
805	+	move.l  (4),-(sp)
806	+	PUTMSG  0,'%s/doprivviol END:  Execbase=%08lx'
807	+	lea     (1*4,sp),sp
808	+	ENDC
809	+	rte
810	+
811	+	; fsave xxx(a5)
812	+	fsavea5         move.l  (sp),d0                 ;Restore d0
813	+	move.l  a0,(sp)                 ;Save a0
814	+	move.l  a5,a0                   ;Get base register
815	+	add.w   ([6,sp],2),a0           ;Add offset to base register
816	+	move.l  #$41000000,(a0)         ;Push idle frame
817	+	move.l  (sp)+,a0                ;Restore a0
818	+	addq.l  #4,2(sp)                ;Skip instruction
819	+
820	+	IFEQ    INFO_LEVEL-1001
821	+	move.l  (4),-(sp)
822	+	PUTMSG  0,'%s/doprivviol END:  Execbase=%08lx'
823	+	lea     (1*4,sp),sp
824	+	ENDC
825		rte
826
827		; frestore (sp)+
828		frestorepop     move.l  (sp),d0                 ;Restore d0
829		move.l  a0,(sp)                 ;Save a0
830		move.l  usp,a0                  ;Get user stack pointer
831	<	frestore (a0)+                  ;Restore FP state
831	>	addq.l  #4,a0                   ;Nothing to do...
832		move.l  a0,usp                  ;Update USP
833		move.l  (sp)+,a0                ;Restore a0
834		addq.l  #2,2(sp)                ;Skip instruction
835	+
836	+	IFEQ    INFO_LEVEL-1001
837	+	move.l  (4),-(sp)
838	+	PUTMSG  0,'%s/doprivviol END:  Execbase=%08lx'
839	+	lea     (1*4,sp),sp
840	+	ENDC
841	+	rte
842	+
843	+	; frestore xxx(a5)
844	+	frestorea5      move.l  (sp),d0                 ;Restore d0
845	+	move.l  a0,(sp)                 ;Save a0
846	+	move.l  (sp)+,a0                ;Restore a0
847	+	addq.l  #4,2(sp)                ;Skip instruction
848	+
849	+	IFEQ    INFO_LEVEL-1001
850	+	move.l  (4),-(sp)
851	+	PUTMSG  0,'%s/doprivviol END:  Execbase=%08lx'
852	+	lea     (1*4,sp),sp
853	+	ENDC
854		rte
855
856	<	; rte (only handles format 0)
857	<	pvrte           move.l  a0,-(sp)                ;Save a0
856	>	; rte
857	>	pvrte           movem.l a0/a1,-(sp)             ;Save a0 and a1
858		move.l  usp,a0                  ;Get user stack pointer
859	+
860		move.w  (a0)+,d0                ;Get SR from user stack
861	<	move.w  d0,8(sp)                ;Store into CCR on exception stack frame
862	<	and.w   #$00ff,8(sp)
863	<	and.w   #$2700,d0               ;Extract supervisor bits
861	>	move.w  d0,8+4(sp)              ;Store into CCR on exception stack frame
862	>	and.w   #$c0ff,8+4(sp)
863	>	and.w   #$e700,d0               ;Extract supervisor bits
864		move.w  d0,_EmulatedSR          ;And save them
865	<	move.l  (a0)+,10(sp)            ;Store return address in exception stack frame
866	<	addq.l  #2,a0                   ;Skip format word
865	>	move.l  (a0)+,10+4(sp)          ;Store return address in exception stack frame
866	>
867	>	move.w  (a0)+,d0                ;get format word
868	>	lsr.w   #7,d0                   ;get stack frame Id
869	>	lsr.w   #4,d0
870	>	and.w   #$001e,d0
871	>	move.w  (StackFormatTable,pc,d0.w),d0   ; get total stack frame length
872	>	subq.w  #4,d0                   ; count only extra words
873	>	lea     16+4(sp),a1             ; destination address (in supervisor stack)
874	>	bra     1$
875	>
876	>	2$              move.w  (a0)+,(a1)+             ; copy additional stack words back to supervisor stack
877	>	1$              dbf     d0,2$
878	>
879		move.l  a0,usp                  ;Update USP
880	<	move.l  (sp)+,a0                ;Restore a0
880	>	movem.l (sp)+,a0/a1             ;Restore a0 and a1
881		move.l  (sp)+,d0                ;Restore d0
882	<	rte
882	>
883	>	IFEQ    INFO_LEVEL-1001
884	>	move.l  (4),-(sp)
885	>	PUTMSG  0,'%s/doprivviol END:  Execbase=%08lx'
886	>	lea     (1*4,sp),sp
887	>	ENDC
888	>	rte
889	>
890	>	; sizes of exceptions stack frames
891	>	StackFormatTable:
892	>	dc.w    4                       ; Four-word stack frame, format $0
893	>	dc.w    4                       ; Throwaway four-word stack frame, format $1
894	>	dc.w    6                       ; Six-word stack frame, format $2
895	>	dc.w    6                       ; MC68040 floating-point post-instruction stack frame, format $3
896	>	dc.w    8                       ; MC68EC040 and MC68LC040 floating-point unimplemented stack frame, format $4
897	>	dc.w    4                       ; Format $5
898	>	dc.w    4                       ; Format $6
899	>	dc.w    30                      ; MC68040 access error stack frame, Format $7
900	>	dc.w    29                      ; MC68010 bus and address error stack frame, format $8
901	>	dc.w    10                      ; MC68020 and MC68030 coprocessor mid-instruction stack frame, format $9
902	>	dc.w    16                      ; MC68020 and MC68030 short bus cycle stack frame, format $a
903	>	dc.w    46                      ; MC68020 and MC68030 long bus cycle stack frame, format $b
904	>	dc.w    12                      ; CPU32 bus error for prefetches and operands stack frame, format $c
905	>	dc.w    4                       ; Format $d
906	>	dc.w    4                       ; Format $e
907	>	dc.w    4                       ; Format $f
908
909		; move sr,dx
910		movefromsrd0    addq.l  #4,sp                   ;Skip saved d0
#	Line 605 | Line 912 | movefromsrd0   addq.l  #4,sp                   ;Skip saved
912		move.w  (sp),d0                 ;Get CCR
913		or.w    _EmulatedSR,d0          ;Add emulated supervisor bits
914		addq.l  #2,2(sp)                ;Skip instruction
915	+
916	+	IFEQ    INFO_LEVEL-1001
917	+	move.l  (4),-(sp)
918	+	PUTMSG  0,'%s/doprivviol END:  Execbase=%08lx'
919	+	lea     (1*4,sp),sp
920	+	ENDC
921		rte
922
923		movefromsrd1    move.l  (sp)+,d0
#	Line 612 | Line 925 | movefromsrd1   move.l  (sp)+,d0
925		move.w  (sp),d1
926		or.w    _EmulatedSR,d1
927		addq.l  #2,2(sp)
928	+
929	+	IFEQ    INFO_LEVEL-1001
930	+	move.l  (4),-(sp)
931	+	PUTMSG  0,'%s/doprivviol END:  Execbase=%08lx'
932	+	lea     (1*4,sp),sp
933	+	ENDC
934		rte
935
936		movefromsrd2    move.l  (sp)+,d0
#	Line 619 | Line 938 | movefromsrd2   move.l  (sp)+,d0
938		move.w  (sp),d2
939		or.w    _EmulatedSR,d2
940		addq.l  #2,2(sp)
941	+
942	+	IFEQ    INFO_LEVEL-1001
943	+	move.l  (4),-(sp)
944	+	PUTMSG  0,'%s/doprivviol END:  Execbase=%08lx'
945	+	lea     (1*4,sp),sp
946	+	ENDC
947		rte
948
949		movefromsrd3    move.l  (sp)+,d0
#	Line 626 | Line 951 | movefromsrd3   move.l  (sp)+,d0
951		move.w  (sp),d3
952		or.w    _EmulatedSR,d3
953		addq.l  #2,2(sp)
954	+
955	+	IFEQ    INFO_LEVEL-1001
956	+	move.l  (4),-(sp)
957	+	PUTMSG  0,'%s/doprivviol END:  Execbase=%08lx'
958	+	lea     (1*4,sp),sp
959	+	ENDC
960		rte
961
962		movefromsrd4    move.l  (sp)+,d0
#	Line 633 | Line 964 | movefromsrd4   move.l  (sp)+,d0
964		move.w  (sp),d4
965		or.w    _EmulatedSR,d4
966		addq.l  #2,2(sp)
967	+
968	+	IFEQ    INFO_LEVEL-1001
969	+	move.l  (4),-(sp)
970	+	PUTMSG  0,'%s/doprivviol END:  Execbase=%08lx'
971	+	lea     (1*4,sp),sp
972	+	ENDC
973		rte
974
975		movefromsrd5    move.l  (sp)+,d0
#	Line 640 | Line 977 | movefromsrd5   move.l  (sp)+,d0
977		move.w  (sp),d5
978		or.w    _EmulatedSR,d5
979		addq.l  #2,2(sp)
980	+
981	+	IFEQ    INFO_LEVEL-1001
982	+	move.l  (4),-(sp)
983	+	PUTMSG  0,'%s/doprivviol END:  Execbase=%08lx'
984	+	lea     (1*4,sp),sp
985	+	ENDC
986		rte
987
988		movefromsrd6    move.l  (sp)+,d0
#	Line 647 | Line 990 | movefromsrd6   move.l  (sp)+,d0
990		move.w  (sp),d6
991		or.w    _EmulatedSR,d6
992		addq.l  #2,2(sp)
993	+
994	+	IFEQ    INFO_LEVEL-1001
995	+	move.l  (4),-(sp)
996	+	PUTMSG  0,'%s/doprivviol END:  Execbase=%08lx'
997	+	lea     (1*4,sp),sp
998	+	ENDC
999		rte
1000
1001		movefromsrd7    move.l  (sp)+,d0
#	Line 654 | Line 1003 | movefromsrd7   move.l  (sp)+,d0
1003		move.w  (sp),d7
1004		or.w    _EmulatedSR,d7
1005		addq.l  #2,2(sp)
1006	+
1007	+	IFEQ    INFO_LEVEL-1001
1008	+	move.l  (4),-(sp)
1009	+	PUTMSG  0,'%s/doprivviol END:  Execbase=%08lx'
1010	+	lea     (1*4,sp),sp
1011	+	ENDC
1012		rte
1013
1014		; move dx,sr
1015		movetosrd0      move.l  (sp),d0
1016		storesr2        move.w  d0,4(sp)
1017		and.w   #$00ff,4(sp)
1018	<	and.w   #$2700,d0
1018	>	and.w   #$e700,d0
1019		move.w  d0,_EmulatedSR
1020
1021		and.w   #$0700,d0               ;Rethrow exception if interrupts are pending and reenabled
#	Line 675 | Line 1030 | storesr2       move.w  d0,4(sp)
1030		movem.l (sp)+,d0-d1/a0-a1/a6
1031		1$              move.l  (sp)+,d0
1032		addq.l  #2,2(sp)
1033	+
1034	+	IFEQ    INFO_LEVEL-1001
1035	+	move.l  (4),-(sp)
1036	+	PUTMSG  0,'%s/doprivviol END:  Execbase=%08lx'
1037	+	lea     (1*4,sp),sp
1038	+	ENDC
1039		rte
1040
1041		movetosrd1      move.l  d1,d0
#	Line 705 | Line 1066 | movecfromcr    move.w  ([6,sp],2),d0           ;Get n
1066		beq.s   movecvbra0
1067		cmp.w   #$9801,d0               ;movec vbr,a1?
1068		beq.s   movecvbra1
1069	+	cmp.w   #$A801,d0               ;movec vbr,a2?
1070	+	beq.s   movecvbra2
1071	+	cmp.w   #$1801,d0               ;movec vbr,d1?
1072	+	beq     movecvbrd1
1073		cmp.w   #$0002,d0               ;movec cacr,d0?
1074		beq.s   moveccacrd0
1075		cmp.w   #$1002,d0               ;movec cacr,d1?
#	Line 713 | Line 1078 | movecfromcr    move.w  ([6,sp],2),d0           ;Get n
1078		beq.s   movectcd0
1079		cmp.w   #$1003,d0               ;movec tc,d1?
1080		beq.s   movectcd1
1081	+	cmp.w   #$1000,d0               ;movec sfc,d1?
1082	+	beq     movecsfcd1
1083	+	cmp.w   #$1001,d0               ;movec dfc,d1?
1084	+	beq     movecdfcd1
1085	+	cmp.w   #$0806,d0               ;movec urp,d0?
1086	+	beq     movecurpd0
1087	+	cmp.w   #$0807,d0               ;movec srp,d0?
1088	+	beq.s   movecsrpd0
1089	+	cmp.w   #$0004,d0               ;movec itt0,d0
1090	+	beq.s   movecitt0d0
1091	+	cmp.w   #$0005,d0               ;movec itt1,d0
1092	+	beq.s   movecitt1d0
1093	+	cmp.w   #$0006,d0               ;movec dtt0,d0
1094	+	beq.s   movecdtt0d0
1095	+	cmp.w   #$0007,d0               ;movec dtt1,d0
1096	+	beq.s   movecdtt1d0
1097
1098		bra     pv_unhandled
1099
#	Line 720 | Line 1101 | movecfromcr    move.w  ([6,sp],2),d0           ;Get n
1101		moveccacrd0     move.l  (sp)+,d0
1102		move.l  #$3111,d0               ;All caches and bursts on
1103		addq.l  #4,2(sp)
1104	+
1105	+	IFEQ    INFO_LEVEL-1001
1106	+	move.l  (4),-(sp)
1107	+	PUTMSG  0,'%s/doprivviol END:  Execbase=%08lx'
1108	+	lea     (1*4,sp),sp
1109	+	ENDC
1110		rte
1111
1112		; movec cacr,d1
1113		moveccacrd1     move.l  (sp)+,d0
1114		move.l  #$3111,d1               ;All caches and bursts on
1115		addq.l  #4,2(sp)
1116	+
1117	+	IFEQ    INFO_LEVEL-1001
1118	+	move.l  (4),-(sp)
1119	+	PUTMSG  0,'%s/doprivviol END:  Execbase=%08lx'
1120	+	lea     (1*4,sp),sp
1121	+	ENDC
1122		rte
1123
1124		; movec vbr,a0
1125		movecvbra0      move.l  (sp)+,d0
1126		sub.l   a0,a0                   ;VBR always appears to be at 0
1127		addq.l  #4,2(sp)
1128	+
1129	+	IFEQ    INFO_LEVEL-1001
1130	+	move.l  (4),-(sp)
1131	+	PUTMSG  0,'%s/doprivviol END:  Execbase=%08lx'
1132	+	lea     (1*4,sp),sp
1133	+	ENDC
1134		rte
1135
1136		; movec vbr,a1
1137		movecvbra1      move.l  (sp)+,d0
1138		sub.l   a1,a1                   ;VBR always appears to be at 0
1139		addq.l  #4,2(sp)
1140	+
1141	+	IFEQ    INFO_LEVEL-1001
1142	+	move.l  (4),-(sp)
1143	+	PUTMSG  0,'%s/doprivviol END:  Execbase=%08lx'
1144	+	lea     (1*4,sp),sp
1145	+	ENDC
1146	+	rte
1147	+
1148	+	; movec vbr,a2
1149	+	movecvbra2      move.l  (sp)+,d0
1150	+	sub.l   a2,a2                   ;VBR always appears to be at 0
1151	+	addq.l  #4,2(sp)
1152	+
1153	+	IFEQ    INFO_LEVEL-1001
1154	+	move.l  (4),-(sp)
1155	+	PUTMSG  0,'%s/doprivviol END:  Execbase=%08lx'
1156	+	lea     (1*4,sp),sp
1157	+	ENDC
1158	+	rte
1159	+
1160	+	; movec vbr,d1
1161	+	movecvbrd1      move.l  (sp)+,d0
1162	+	moveq.l #0,d1                   ;VBR always appears to be at 0
1163	+	addq.l  #4,2(sp)
1164	+
1165	+	IFEQ    INFO_LEVEL-1001
1166	+	move.l  (4),-(sp)
1167	+	PUTMSG  0,'%s/doprivviol END:  Execbase=%08lx'
1168	+	lea     (1*4,sp),sp
1169	+	ENDC
1170		rte
1171
1172		; movec tc,d0
1173		movectcd0       addq.l  #4,sp
1174		moveq   #0,d0                   ;MMU is always off
1175		addq.l  #4,2(sp)
1176	+
1177	+	IFEQ    INFO_LEVEL-1001
1178	+	move.l  (4),-(sp)
1179	+	PUTMSG  0,'%s/doprivviol END:  Execbase=%08lx'
1180	+	lea     (1*4,sp),sp
1181	+	ENDC
1182		rte
1183
1184	<	; movec tc,d1
1185	<	movectcd1       addq.l  #4,sp
1184	>	; movec tc,d1   +jl+
1185	>	movectcd1       move.l  (sp)+,d0                ;Restore d0
1186		moveq   #0,d1                   ;MMU is always off
1187		addq.l  #4,2(sp)
1188	+
1189	+	IFEQ    INFO_LEVEL-1001
1190	+	move.l  (4),-(sp)
1191	+	PUTMSG  0,'%s/doprivviol END:  Execbase=%08lx'
1192	+	lea     (1*4,sp),sp
1193	+	ENDC
1194	+	rte
1195	+
1196	+	; movec sfc,d1  +jl+
1197	+	movecsfcd1      move.l  (sp)+,d0                ;Restore d0
1198	+	moveq   #0,d1
1199	+	addq.l  #4,2(sp)
1200	+
1201	+	IFEQ    INFO_LEVEL-1001
1202	+	move.l  (4),-(sp)
1203	+	PUTMSG  0,'%s/doprivviol END:  Execbase=%08lx'
1204	+	lea     (1*4,sp),sp
1205	+	ENDC
1206	+	rte
1207	+
1208	+	; movec dfc,d1  +jl+
1209	+	movecdfcd1      move.l  (sp)+,d0                ;Restore d0
1210	+	moveq   #0,d1
1211	+	addq.l  #4,2(sp)
1212	+
1213	+	IFEQ    INFO_LEVEL-1001
1214	+	move.l  (4),-(sp)
1215	+	PUTMSG  0,'%s/doprivviol END:  Execbase=%08lx'
1216	+	lea     (1*4,sp),sp
1217	+	ENDC
1218	+	rte
1219	+
1220	+	movecurpd0              ; movec urp,d0  +jl+
1221	+	movecsrpd0              ; movec srp,d0
1222	+	movecitt0d0             ; movec itt0,d0
1223	+	movecitt1d0             ; movec itt1,d0
1224	+	movecdtt0d0             ; movec dtt0,d0
1225	+	movecdtt1d0             ; movec dtt1,d0
1226	+	addq.l  #4,sp
1227	+	moveq.l #0,d0                   ;MMU is always off
1228	+	addq.l  #4,2(sp)                ;skip instruction
1229	+
1230	+	IFEQ    INFO_LEVEL-1001
1231	+	move.l  (4),-(sp)
1232	+	PUTMSG  0,'%s/doprivviol END:  Execbase=%08lx'
1233	+	lea     (1*4,sp),sp
1234	+	ENDC
1235		rte
1236
1237		; movec x,cr
#	Line 757 | Line 1239 | movectocr      move.w  ([6,sp],2),d0           ;Get nex
1239
1240		cmp.w   #$0801,d0               ;movec d0,vbr?
1241		beq.s   movectovbr
1242	+	cmp.w   #$1801,d0               ;movec d1,vbr?
1243	+	beq.s   movectovbr
1244	+	cmp.w   #$A801,d0               ;movec a2,vbr?
1245	+	beq.s   movectovbr
1246		cmp.w   #$0002,d0               ;movec d0,cacr?
1247		beq.s   movectocacr
1248		cmp.w   #$1002,d0               ;movec d1,cacr?
1249		beq.s   movectocacr
1250	+	cmp.w   #$1000,d0               ;movec d1,sfc?
1251	+	beq.s   movectoxfc
1252	+	cmp.w   #$1001,d0               ;movec d1,dfc?
1253	+	beq.s   movectoxfc
1254
1255		bra     pv_unhandled
1256
1257		; movec x,vbr
1258		movectovbr      move.l  (sp)+,d0                ;Ignore moves to VBR
1259		addq.l  #4,2(sp)
1260	+
1261	+	IFEQ    INFO_LEVEL-1001
1262	+	move.l  (4),-(sp)
1263	+	PUTMSG  0,'%s/doprivviol END:  Execbase=%08lx'
1264	+	lea     (1*4,sp),sp
1265	+	ENDC
1266		rte
1267
1268		; movec dx,cacr
#	Line 776 | Line 1272 | movectocacr    movem.l d1/a0-a1/a6,-(sp)       ;M
1272		movem.l (sp)+,d1/a0-a1/a6
1273		move.l  (sp)+,d0
1274		addq.l  #4,2(sp)
1275	+
1276	+	IFEQ    INFO_LEVEL-1001
1277	+	move.l  (4),-(sp)
1278	+	PUTMSG  0,'%s/doprivviol END:  Execbase=%08lx'
1279	+	lea     (1*4,sp),sp
1280	+	ENDC
1281	+	rte
1282	+
1283	+	; movec x,sfc
1284	+	; movec x,dfc
1285	+	movectoxfc      move.l  (sp)+,d0                ;Ignore moves to SFC, DFC
1286	+	addq.l  #4,2(sp)
1287	+
1288	+	IFEQ    INFO_LEVEL-1001
1289	+	move.l  (4),-(sp)
1290	+	PUTMSG  0,'%s/doprivviol END:  Execbase=%08lx'
1291	+	lea     (1*4,sp),sp
1292	+	ENDC
1293		rte
1294
1295		; cpusha
1296		cpushadc
1297	<	cpushadcic      movem.l d1/a0-a1/a6,-(sp)       ;Clear caches
1297	>	cpushadcic
1298	>	IFEQ    INFO_LEVEL-1003
1299	>	move.l  (4),-(sp)
1300	>	move.l  d0,-(sp)
1301	>	PUTMSG  0,'%s/cpushadc:  opcode=%04lx  Execbase=%08lx'
1302	>	lea     (2*4,sp),sp
1303	>	ENDC
1304	>	movem.l d1/a0-a1/a6,-(sp)       ;Clear caches
1305		move.l  _SysBase,a6
1306		JSRLIB  CacheClearU
1307		movem.l (sp)+,d1/a0-a1/a6
#	Line 788 | Line 1309 | cpushadcic     movem.l d1/a0-a1/a6,-(sp)       ;Cl
1309		addq.l  #2,2(sp)
1310		rte
1311
1312	+	; move usp,a1   +jl+
1313	+	moveuspa1       move.l  (sp)+,d0
1314	+	move    usp,a1
1315	+	addq.l  #2,2(sp)
1316	+
1317	+	IFEQ    INFO_LEVEL-1009
1318	+	move.l  a1,-(sp)
1319	+	move.l  a7,-(sp)
1320	+	PUTMSG  0,'%s/moveuspa1:  a7=%08lx  a1=%08lx'
1321	+	lea     (2*4,sp),sp
1322	+	ENDC
1323	+
1324	+	rte
1325	+
1326	+	; move usp,a0   +jl+
1327	+	moveuspa0       move.l  (sp)+,d0
1328	+	move    usp,a0
1329	+	addq.l  #2,2(sp)
1330	+
1331	+	IFEQ    INFO_LEVEL-1009
1332	+	move.l  a0,-(sp)
1333	+	move.l  a7,-(sp)
1334	+	PUTMSG  0,'%s/moveuspa0:  a7=%08lx  a0=%08lx'
1335	+	lea     (2*4,sp),sp
1336	+	ENDC
1337	+
1338	+	rte
1339	+
1340	+	; move a1,usp   +jl+
1341	+	moved1usp       move.l  (sp)+,d0
1342	+	move    a1,usp
1343	+	addq.l  #2,2(sp)
1344	+
1345	+	IFEQ    INFO_LEVEL-1001
1346	+	move.l  (4),-(sp)
1347	+	PUTMSG  0,'%s/doprivviol END:  Execbase=%08lx'
1348	+	lea     (1*4,sp),sp
1349	+	ENDC
1350	+	rte
1351	+
1352	+	;
1353	+	; Trigger NMI (Pop up debugger)
1354	+	;
1355	+
1356	+	_AsmTriggerNMI  move.l  d0,-(sp)                ;Save d0
1357	+	move.w  #$007c,-(sp)            ;Yes, fake NMI stack frame
1358	+	pea     1$
1359	+	move.w  _EmulatedSR,d0
1360	+	and.w   #$f8ff,d0               ;Set interrupt level in SR
1361	+	move.w  d0,-(sp)
1362	+	move.w  d0,_EmulatedSR
1363	+
1364	+	move.l  $7c.w,-(sp)             ;Jump to MacOS NMI handler
1365	+	rts
1366	+
1367	+	1$              move.l  (sp)+,d0                ;Restore d0
1368	+	rts
1369	+
1370	+
1371	+	CopyTrapStack:
1372	+	movem.l d0/a0/a1,-(sp)
1373	+
1374	+	move.w  (5*4+6,sp),d0           ;get format word
1375	+	lsr.w   #7,d0                   ;get stack frame Id
1376	+	lsr.w   #4,d0
1377	+	and.w   #$001e,d0
1378	+	move.w  (StackFormatTable,pc,d0.w),d0   ; get total stack frame length
1379	+
1380	+	lea     (5*4,sp),a0             ;get start of exception stack frame
1381	+	move.l  usp,a1                  ;Get user stack pointer
1382	+	bra     1$
1383	+
1384	+	2$              move.w  (a0)+,(a1)+             ; copy additional stack words back to supervisor stack
1385	+	1$              dbf     d0,2$
1386	+
1387	+	move.l  (3*4,sp),-(a0)          ;copy return address to new top of stack
1388	+	move.l  a0,sp
1389	+	rts
1390	+
1391		END

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