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* |
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* asm_support.asm - AmigaOS utility functions in assembly language |
| 3 |
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* |
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< |
* Basilisk II (C) 1997-1999 Christian Bauer |
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* Basilisk II (C) 1997-2002 Christian Bauer |
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* |
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* This program is free software; you can redistribute it and/or modify |
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* it under the terms of the GNU General Public License as published by |
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XDEF _AtomicAnd |
| 29 |
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XDEF _AtomicOr |
| 30 |
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XDEF _MoveVBR |
| 31 |
+ |
XDEF _DisableSuperBypass |
| 32 |
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XDEF _Execute68k |
| 33 |
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XDEF _Execute68kTrap |
| 34 |
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XDEF _TrapHandlerAsm |
| 35 |
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XDEF _ExceptionHandlerAsm |
| 35 |
– |
XDEF _Scod060Patch1 |
| 36 |
– |
XDEF _Scod060Patch2 |
| 37 |
– |
XDEF _ThInitFPUPatch |
| 36 |
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XDEF _AsmTriggerNMI |
| 37 |
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|
| 38 |
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XREF _OldTrapHandler |
| 45 |
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XREF _MainTask |
| 46 |
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XREF _SysBase |
| 47 |
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XREF _quit_emulator |
| 50 |
– |
XREF _kprintf |
| 48 |
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| 49 |
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SECTION text,CODE |
| 50 |
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| 51 |
+ |
MACHINE 68020 |
| 52 |
+ |
|
| 53 |
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* |
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* Atomic bit operations (don't trust the compiler) |
| 55 |
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* |
| 107 |
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rte |
| 108 |
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|
| 109 |
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* |
| 110 |
+ |
* Disable 68060 Super Bypass mode |
| 111 |
+ |
* |
| 112 |
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|
| 113 |
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_DisableSuperBypass |
| 114 |
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movem.l d0-d1/a0-a1/a5-a6,-(sp) |
| 115 |
+ |
move.l _SysBase,a6 |
| 116 |
+ |
|
| 117 |
+ |
lea dissb,a5 |
| 118 |
+ |
JSRLIB Supervisor |
| 119 |
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|
| 120 |
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movem.l (sp)+,d0-d1/a0-a1/a5-a6 |
| 121 |
+ |
rts |
| 122 |
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|
| 123 |
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MACHINE 68060 |
| 124 |
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|
| 125 |
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dissb movec pcr,d0 |
| 126 |
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bset #5,d0 |
| 127 |
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movec d0,pcr |
| 128 |
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rte |
| 129 |
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|
| 130 |
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MACHINE 68020 |
| 131 |
+ |
|
| 132 |
+ |
* |
| 133 |
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* Execute 68k subroutine (must be ended with rts) |
| 134 |
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* r->a[7] and r->sr are unused! |
| 135 |
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* |
| 241 |
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rts |
| 242 |
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|
| 243 |
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* |
| 222 |
– |
* Process Manager 68060 FPU patches |
| 223 |
– |
* |
| 224 |
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|
| 225 |
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_Scod060Patch1 fsave -(sp) ;Save FPU state |
| 226 |
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tst.b 2(sp) ;Null? |
| 227 |
– |
beq.s 1$ |
| 228 |
– |
fmovem.x fp0-fp7,-(sp) ;No, save FPU registers |
| 229 |
– |
fmove.l fpiar,-(sp) |
| 230 |
– |
fmove.l fpsr,-(sp) |
| 231 |
– |
fmove.l fpcr,-(sp) |
| 232 |
– |
pea -1 ;Push "FPU state saved" flag |
| 233 |
– |
1$ move.l d1,-(sp) |
| 234 |
– |
move.l d0,-(sp) |
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bsr.s 3$ ;Switch integer registers and stack |
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addq.l #8,sp |
| 237 |
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tst.b 2(sp) ;New FPU state null or "FPU state saved" flag set? |
| 238 |
– |
beq.s 2$ |
| 239 |
– |
addq.l #4,sp ;Flag set, skip it |
| 240 |
– |
fmove.l (sp)+,fpcr ;Restore FPU registers and state |
| 241 |
– |
fmove.l (sp)+,fpsr |
| 242 |
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fmove.l (sp)+,fpiar |
| 243 |
– |
fmovem.x (sp)+,fp0-fp7 |
| 244 |
– |
2$ frestore (sp)+ |
| 245 |
– |
movem.l (sp)+,d0-d1 |
| 246 |
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rts |
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– |
|
| 248 |
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3$ move.l 4(sp),a0 ;Switch integer registers and stack |
| 249 |
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move sr,-(sp) |
| 250 |
– |
movem.l d2-d7/a2-a6,-(sp) |
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cmp.w #0,a0 |
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beq.s 4$ |
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move.l sp,(a0) |
| 254 |
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4$ move.l $36(sp),a0 |
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movem.l (a0)+,d2-d7/a2-a6 |
| 256 |
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move (a0)+,sr |
| 257 |
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move.l a0,sp |
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rts |
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|
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_Scod060Patch2 move.l d0,-(sp) ;Create 68060 null frame on stack |
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move.l d0,-(sp) |
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move.l d0,-(sp) |
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frestore (sp)+ ;and load it |
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rts |
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– |
|
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– |
* |
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– |
* Thread Manager 68060 FPU patches |
| 268 |
– |
* |
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– |
|
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_ThInitFPUPatch tst.b $40(a4) |
| 271 |
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bne.s 1$ |
| 272 |
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moveq #0,d0 ;Create 68060 null frame on stack |
| 273 |
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move.l d0,-(a3) |
| 274 |
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move.l d0,-(a3) |
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move.l d0,-(a3) |
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1$ rts |
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– |
|
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* |
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* Trap handler of main task |
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* |
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cmp.l #47,(sp) |
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ble doTrapXX ; Vector 32-47 : TRAP #0 - 15 Instruction Vectors |
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1$: move.l _OldTrapHandler,-(sp) ;No, jump to old trap handler |
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1$ move.l _OldTrapHandler,-(sp) ;No, jump to old trap handler |
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rts |
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* |
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* TRAP #0 - 15 Instruction Vectors |
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* |
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doTrapXX: move.l a0,(sp) ;Save a0 |
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doTrapXX move.l a0,(sp) ;Save a0 |
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move.l usp,a0 ;Get user stack pointer |
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move.l 2*4(sp),-(a0) ;Copy 4-word stack frame to user stack |
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move.l 1*4(sp),-(a0) |
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* trace Vector |
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* |
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dotrace: move.l a0,(sp) ;Save a0 |
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dotrace move.l a0,(sp) ;Save a0 |
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move.l usp,a0 ;Get user stack pointer |
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move.l 3*4(sp),-(a0) ;Copy 6-word stack frame to user stack |
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addq.l #8,sp ;Remove exception frame from supervisor stack |
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andi #$d8ff,sr ;Switch to user mode, enable interrupts |
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IFNE 0 |
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; move.w ([2,sp]),($3800) |
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|
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cmp.w #$a9c3,([2,sp]) |
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< |
bne 1$ |
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< |
|
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move.l d0,-(sp) |
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move.l a0,-(sp) |
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< |
pea afmt(pc) |
| 364 |
< |
jsr _kprintf |
| 365 |
< |
lea 3*4(sp),sp |
| 366 |
< |
1$: |
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< |
ENDC |
| 319 |
> |
and.w #$d8ff,_EmulatedSR ;enable interrupts in EmulatedSR |
| 320 |
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|
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move.l $28.w,-(sp) ;Jump to MacOS exception handler |
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rts |
| 323 |
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|
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– |
afmt: dc.b 'a0=%08lx d0=%08lx\n',0 |
| 373 |
– |
cnop 0,4 |
| 374 |
– |
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* |
| 325 |
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* Illegal address handler |
| 326 |
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* |
| 327 |
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| 328 |
< |
doilladdr: move.l a0,(sp) ;Save a0 |
| 328 |
> |
doilladdr move.l a0,(sp) ;Save a0 |
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move.l usp,a0 ;Get user stack pointer |
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move.l 3*4(sp),-(a0) ;Copy 6-word stack frame to user stack |
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* to execute extended opcodes (see emul_op.h) |
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* |
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doillinstr |
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movem.l a0/d0,-(sp) |
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> |
doillinstr movem.l a0/d0,-(sp) |
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move.w ([6+2*4,sp]),d0 |
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and.w #$ff00,d0 |
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cmp.w #$7100,d0 |
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move.l $10.w,-(sp) ;Jump to MacOS exception handler |
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rts |
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|
| 369 |
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1$: |
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move.l a6,(sp) ;Save a6 |
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> |
1$ move.l a6,(sp) ;Save a6 |
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move.l usp,a6 ;Get user stack pointer |
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| 372 |
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move.l a6,-10(a6) ;Push USP (a7) |
| 637 |
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fsavepush move.l (sp),d0 ;Restore d0 |
| 638 |
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move.l a0,(sp) ;Save a0 |
| 639 |
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move.l usp,a0 ;Get user stack pointer |
| 640 |
< |
fsave -(a0) ;Push FP state |
| 640 |
> |
move.l #$41000000,-(a0) ;Push idle frame |
| 641 |
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move.l a0,usp ;Update USP |
| 642 |
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move.l (sp)+,a0 ;Restore a0 |
| 643 |
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addq.l #2,2(sp) ;Skip instruction |
| 644 |
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rte |
| 645 |
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|
| 646 |
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; fsave xxx(a5) |
| 647 |
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fsavea5 move.l (sp),d0 ;Restore d0 |
| 648 |
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move.l a0,(sp) ;Save a0 |
| 649 |
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move.l a5,a0 ;Get base register |
| 650 |
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add.w ([6,sp],2),a0 ;Add offset to base register |
| 651 |
+ |
move.l #$41000000,(a0) ;Push idle frame |
| 652 |
+ |
move.l (sp)+,a0 ;Restore a0 |
| 653 |
+ |
addq.l #4,2(sp) ;Skip instruction |
| 654 |
+ |
rte |
| 655 |
+ |
|
| 656 |
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; frestore (sp)+ |
| 657 |
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frestorepop move.l (sp),d0 ;Restore d0 |
| 658 |
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move.l a0,(sp) ;Save a0 |
| 659 |
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move.l usp,a0 ;Get user stack pointer |
| 660 |
< |
frestore (a0)+ ;Restore FP state |
| 660 |
> |
addq.l #4,a0 ;Nothing to do... |
| 661 |
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move.l a0,usp ;Update USP |
| 662 |
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move.l (sp)+,a0 ;Restore a0 |
| 663 |
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addq.l #2,2(sp) ;Skip instruction |
| 664 |
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rte |
| 665 |
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|
| 666 |
< |
; frestore xxx(a5) +jl+ |
| 666 |
> |
; frestore xxx(a5) |
| 667 |
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frestorea5 move.l (sp),d0 ;Restore d0 |
| 668 |
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move.l a0,(sp) ;Save a0 |
| 712 |
– |
move.l a5,a0 ;Get base register |
| 713 |
– |
add.w ([6,sp],2),a0 ;Add offset to base register |
| 714 |
– |
frestore (a0) ;Restore FP state from (a0) |
| 715 |
– |
move.l (sp)+,a0 ;Restore a0 |
| 716 |
– |
addq.l #4,2(sp) ;Skip instruction |
| 717 |
– |
rte |
| 718 |
– |
|
| 719 |
– |
; fsave xxx(a5) +jl+ |
| 720 |
– |
fsavea5: move.l (sp),d0 ;Restore d0 |
| 721 |
– |
move.l a0,(sp) ;Save a0 |
| 722 |
– |
move.l a5,a0 ;Get base register |
| 723 |
– |
add.w ([6,sp],2),a0 ;Add offset to base register |
| 724 |
– |
fsave (a0) ;Push FP state to (a0) |
| 669 |
|
move.l (sp)+,a0 ;Restore a0 |
| 670 |
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addq.l #4,2(sp) ;Skip instruction |
| 671 |
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rte |
| 690 |
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lea 16+4(sp),a1 ; destination address (in supervisor stack) |
| 691 |
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bra 1$ |
| 692 |
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|
| 693 |
< |
2$: move.w (a0)+,(a1)+ ; copy additional stack words back to supervisor stack |
| 694 |
< |
1$: dbf d0,2$ |
| 693 |
> |
2$ move.w (a0)+,(a1)+ ; copy additional stack words back to supervisor stack |
| 694 |
> |
1$ dbf d0,2$ |
| 695 |
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|
| 696 |
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move.l a0,usp ;Update USP |
| 697 |
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movem.l (sp)+,a0/a1 ;Restore a0 and a1 |
| 895 |
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rte |
| 896 |
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|
| 897 |
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; movec sfc,d1 +jl+ |
| 898 |
< |
movecsfcd1: move.l (sp)+,d0 ;Restore d0 |
| 898 |
> |
movecsfcd1 move.l (sp)+,d0 ;Restore d0 |
| 899 |
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moveq #0,d1 |
| 900 |
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addq.l #4,2(sp) |
| 901 |
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rte |
| 902 |
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|
| 903 |
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; movec dfc,d1 +jl+ |
| 904 |
< |
movecdfcd1: move.l (sp)+,d0 ;Restore d0 |
| 904 |
> |
movecdfcd1 move.l (sp)+,d0 ;Restore d0 |
| 905 |
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moveq #0,d1 |
| 906 |
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addq.l #4,2(sp) |
| 907 |
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rte |
| 908 |
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|
| 909 |
< |
movecurpd0: ; movec urp,d0 +jl+ |
| 910 |
< |
movecsrpd0: ; movec srp,d0 |
| 911 |
< |
movecitt0d0: ; movec itt0,d0 |
| 912 |
< |
movecitt1d0: ; movec itt1,d0 |
| 913 |
< |
movecdtt0d0: ; movec dtt0,d0 |
| 914 |
< |
movecdtt1d0: ; movec dtt1,d0 |
| 909 |
> |
movecurpd0 ; movec urp,d0 +jl+ |
| 910 |
> |
movecsrpd0 ; movec srp,d0 |
| 911 |
> |
movecitt0d0 ; movec itt0,d0 |
| 912 |
> |
movecitt1d0 ; movec itt1,d0 |
| 913 |
> |
movecdtt0d0 ; movec dtt0,d0 |
| 914 |
> |
movecdtt1d0 ; movec dtt1,d0 |
| 915 |
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addq.l #4,sp |
| 916 |
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moveq.l #0,d0 ;MMU is always off |
| 917 |
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addq.l #4,2(sp) ;skip instruction |
| 966 |
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rte |
| 967 |
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|
| 968 |
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; move usp,a1 +jl+ |
| 969 |
< |
moveuspa1: move.l (sp)+,d0 |
| 969 |
> |
moveuspa1 move.l (sp)+,d0 |
| 970 |
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move usp,a1 |
| 971 |
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addq.l #2,2(sp) |
| 972 |
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rte |
| 973 |
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|
| 974 |
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; move usp,a0 +jl+ |
| 975 |
< |
moveuspa0: move.l (sp)+,d0 |
| 975 |
> |
moveuspa0 move.l (sp)+,d0 |
| 976 |
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move usp,a0 |
| 977 |
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addq.l #2,2(sp) |
| 978 |
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rte |
| 979 |
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|
| 980 |
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; move a1,usp +jl+ |
| 981 |
< |
moved1usp: move.l (sp)+,d0 |
| 981 |
> |
moved1usp move.l (sp)+,d0 |
| 982 |
|
move a1,usp |
| 983 |
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addq.l #2,2(sp) |
| 984 |
|
rte |
| 987 |
|
; Trigger NMI (Pop up debugger) |
| 988 |
|
; |
| 989 |
|
|
| 990 |
< |
_AsmTriggerNMI: |
| 1047 |
< |
move.l d0,-(sp) ;Save d0 |
| 990 |
> |
_AsmTriggerNMI move.l d0,-(sp) ;Save d0 |
| 991 |
|
move.w #$007c,-(sp) ;Yes, fake NMI stack frame |
| 992 |
|
pea 1$ |
| 993 |
|
move.w _EmulatedSR,d0 |
