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root/cebix/BasiliskII/src/AmigaOS/asm_support.asm
Revision: 1.14
Committed: 2002-09-01T12:01:46Z (22 years, 2 months ago) by cebix
Branch: MAIN
CVS Tags: nigel-build-19, nigel-build-12, nigel-build-13, nigel-build-16, nigel-build-17, nigel-build-15, HEAD
Changes since 1.13: +5 -3 lines
Log Message:
- implemented direct SCSI transfers (bypassing the buffer)
- minor fixes

File Contents

# User Rev Content
1 cebix 1.1 *
2     * asm_support.asm - AmigaOS utility functions in assembly language
3     *
4 jlachmann 1.13 * Basilisk II (C) 1997-2001 Christian Bauer
5 cebix 1.1 *
6     * This program is free software; you can redistribute it and/or modify
7     * it under the terms of the GNU General Public License as published by
8     * the Free Software Foundation; either version 2 of the License, or
9     * (at your option) any later version.
10     *
11     * This program is distributed in the hope that it will be useful,
12     * but WITHOUT ANY WARRANTY; without even the implied warranty of
13     * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14     * GNU General Public License for more details.
15     *
16     * You should have received a copy of the GNU General Public License
17     * along with this program; if not, write to the Free Software
18     * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19     *
20    
21 cebix 1.14 DEBUG_DETAIL SET 1
22    
23 cebix 1.1 INCLUDE "exec/types.i"
24     INCLUDE "exec/macros.i"
25     INCLUDE "exec/memory.i"
26     INCLUDE "exec/tasks.i"
27     INCLUDE "dos/dos.i"
28     INCLUDE "devices/timer.i"
29    
30 cebix 1.14 ; INCLUDE "asmsupp.i"
31 jlachmann 1.13
32 cebix 1.1 XDEF _AtomicAnd
33     XDEF _AtomicOr
34     XDEF _MoveVBR
35 cebix 1.8 XDEF _DisableSuperBypass
36 cebix 1.1 XDEF _Execute68k
37     XDEF _Execute68kTrap
38     XDEF _TrapHandlerAsm
39     XDEF _ExceptionHandlerAsm
40 jlachmann 1.5 XDEF _AsmTriggerNMI
41 cebix 1.1
42     XREF _OldTrapHandler
43     XREF _OldExceptionHandler
44     XREF _IllInstrHandler
45     XREF _PrivViolHandler
46     XREF _EmulatedSR
47     XREF _IRQSigMask
48     XREF _InterruptFlags
49     XREF _MainTask
50     XREF _SysBase
51 cebix 1.2 XREF _quit_emulator
52 cebix 1.1
53 jlachmann 1.13 INFO_LEVEL equ 0
54    
55 cebix 1.1 SECTION text,CODE
56    
57 cebix 1.8 MACHINE 68020
58    
59 jlachmann 1.13 IFGE INFO_LEVEL
60     subSysName: dc.b '+',0
61     ENDIF
62    
63 cebix 1.1 *
64     * Atomic bit operations (don't trust the compiler)
65     *
66    
67     _AtomicAnd move.l 4(sp),a0
68     move.l 8(sp),d0
69     and.l d0,(a0)
70     rts
71    
72     _AtomicOr move.l 4(sp),a0
73     move.l 8(sp),d0
74     or.l d0,(a0)
75     rts
76    
77     *
78     * Move VBR away from 0 if neccessary
79     *
80    
81     _MoveVBR movem.l d0-d1/a0-a1/a5-a6,-(sp)
82     move.l _SysBase,a6
83    
84     lea getvbr,a5 ;VBR at 0?
85     JSRLIB Supervisor
86     tst.l d0
87     bne.s 1$
88    
89     move.l #$400,d0 ;Yes, allocate memory for new table
90     move.l #MEMF_PUBLIC,d1
91     JSRLIB AllocMem
92     tst.l d0
93     beq.s 1$
94    
95     JSRLIB Disable
96    
97     move.l d0,a5 ;Copy old table
98     move.l d0,a1
99     sub.l a0,a0
100     move.l #$400,d0
101     JSRLIB CopyMem
102     JSRLIB CacheClearU
103    
104     move.l a5,d0 ;Set VBR
105     lea setvbr,a5
106     JSRLIB Supervisor
107    
108     JSRLIB Enable
109    
110     1$ movem.l (sp)+,d0-d1/a0-a1/a5-a6
111     rts
112    
113     getvbr movec vbr,d0
114     rte
115    
116     setvbr movec d0,vbr
117     rte
118 cebix 1.8
119     *
120     * Disable 68060 Super Bypass mode
121     *
122    
123     _DisableSuperBypass
124     movem.l d0-d1/a0-a1/a5-a6,-(sp)
125     move.l _SysBase,a6
126    
127     lea dissb,a5
128     JSRLIB Supervisor
129    
130     movem.l (sp)+,d0-d1/a0-a1/a5-a6
131     rts
132    
133     MACHINE 68060
134    
135     dissb movec pcr,d0
136     bset #5,d0
137     movec d0,pcr
138     rte
139    
140     MACHINE 68020
141 cebix 1.1
142     *
143     * Execute 68k subroutine (must be ended with rts)
144     * r->a[7] and r->sr are unused!
145     *
146    
147     ; void Execute68k(uint32 addr, M68kRegisters *r);
148     _Execute68k
149     move.l 4(sp),d0 ;Get arguments
150     move.l 8(sp),a0
151    
152     movem.l d2-d7/a2-a6,-(sp) ;Save registers
153    
154     move.l a0,-(sp) ;Push pointer to M68kRegisters on stack
155     pea 1$ ;Push return address on stack
156     move.l d0,-(sp) ;Push pointer to 68k routine on stack
157     movem.l (a0),d0-d7/a0-a6 ;Load registers from M68kRegisters
158    
159     rts ;Jump into 68k routine
160    
161     1$ move.l a6,-(sp) ;Save a6
162     move.l 4(sp),a6 ;Get pointer to M68kRegisters
163     movem.l d0-d7/a0-a5,(a6) ;Save d0-d7/a0-a5 to M68kRegisters
164     move.l (sp)+,56(a6) ;Save a6 to M68kRegisters
165     addq.l #4,sp ;Remove pointer from stack
166    
167     movem.l (sp)+,d2-d7/a2-a6 ;Restore registers
168     rts
169    
170     *
171     * Execute MacOS 68k trap
172     * r->a[7] and r->sr are unused!
173     *
174    
175     ; void Execute68kTrap(uint16 trap, M68kRegisters *r);
176     _Execute68kTrap
177     move.l 4(sp),d0 ;Get arguments
178     move.l 8(sp),a0
179    
180     movem.l d2-d7/a2-a6,-(sp) ;Save registers
181    
182     move.l a0,-(sp) ;Push pointer to M68kRegisters on stack
183     move.w d0,-(sp) ;Push trap word on stack
184     subq.l #8,sp ;Create fake A-Line exception frame
185     movem.l (a0),d0-d7/a0-a6 ;Load registers from M68kRegisters
186    
187     move.l a2,-(sp) ;Save a2 and d2
188     move.l d2,-(sp)
189     lea 1$,a2 ;a2 points to return address
190     move.w 16(sp),d2 ;Load trap word into d2
191    
192     jmp ([$28.w],10) ;Jump into MacOS A-Line handler
193    
194     1$ move.l a6,-(sp) ;Save a6
195     move.l 6(sp),a6 ;Get pointer to M68kRegisters
196     movem.l d0-d7/a0-a5,(a6) ;Save d0-d7/a0-a5 to M68kRegisters
197     move.l (sp)+,56(a6) ;Save a6 to M68kRegisters
198     addq.l #6,sp ;Remove pointer and trap word from stack
199    
200     movem.l (sp)+,d2-d7/a2-a6 ;Restore registers
201     rts
202    
203     *
204 cebix 1.14 * Exception handler of main task (for interrupts)
205 cebix 1.1 *
206    
207     _ExceptionHandlerAsm
208     move.l d0,-(sp) ;Save d0
209    
210     and.l #SIGBREAKF_CTRL_C,d0 ;CTRL-C?
211     bne.s 2$
212    
213     move.w _EmulatedSR,d0 ;Interrupts enabled in emulated SR?
214     and.w #$0700,d0
215     bne 1$
216     move.w #$0064,-(sp) ;Yes, fake interrupt stack frame
217     pea 1$
218     move.w _EmulatedSR,d0
219     move.w d0,-(sp)
220 cebix 1.6 or.w #$2100,d0 ;Set interrupt level in SR, enter (virtual) supervisor mode
221 cebix 1.1 move.w d0,_EmulatedSR
222 jlachmann 1.5 move.l $64.w,-(sp) ;Jump to MacOS interrupt handler
223     rts
224 cebix 1.1
225     1$ move.l (sp)+,d0 ;Restore d0
226     rts
227    
228     2$ JSRLIB Forbid ;Waiting for Dos signal?
229     sub.l a1,a1
230     JSRLIB FindTask
231     move.l d0,a0
232     move.l TC_SIGWAIT(a0),d0
233     move.l TC_SIGRECVD(a0),d1
234     JSRLIB Permit
235     btst #SIGB_DOS,d0
236     beq 3$
237     btst #SIGB_DOS,d1
238     bne 4$
239    
240     3$ lea TC_SIZE(a0),a0 ;No, remove pending Dos packets
241     JSRLIB GetMsg
242    
243     move.w _EmulatedSR,d0
244     or.w #$0700,d0 ;Disable all interrupts
245     move.w d0,_EmulatedSR
246     moveq #0,d0 ;Disable all exception signals
247     moveq #-1,d1
248     JSRLIB SetExcept
249 cebix 1.2 jsr _quit_emulator ;CTRL-C, quit emulator
250 cebix 1.1 4$ move.l (sp)+,d0
251     rts
252    
253     *
254     * Trap handler of main task
255     *
256    
257 jlachmann 1.5 _TrapHandlerAsm:
258 jlachmann 1.13 IFEQ INFO_LEVEL-1002
259     move.w ([6,a0]),-(sp)
260     move.w #0,-(sp)
261     move.l (4+6,a0),-(sp)
262     PUTMSG 0,'%s/TrapHandlerAsm: addr=%08lx opcode=%04lx'
263     lea (2*4,sp),sp
264     ENDC
265    
266 jlachmann 1.5 cmp.l #4,(sp) ;Illegal instruction?
267 cebix 1.1 beq.s doillinstr
268     cmp.l #10,(sp) ;A-Line exception?
269     beq.s doaline
270     cmp.l #8,(sp) ;Privilege violation?
271     beq.s doprivviol
272 jlachmann 1.13
273 jlachmann 1.5 cmp.l #9,(sp) ;Trace?
274     beq dotrace
275     cmp.l #3,(sp) ;Illegal Address?
276     beq.s doilladdr
277 jlachmann 1.13 cmp.l #11,(sp) ;F-Line exception
278     beq.s dofline
279 jlachmann 1.5
280     cmp.l #32,(sp)
281     blt 1$
282     cmp.l #47,(sp)
283     ble doTrapXX ; Vector 32-47 : TRAP #0 - 15 Instruction Vectors
284    
285 jlachmann 1.13 1$:
286     cmp.l #48,(sp)
287     blt 2$
288     cmp.l #55,(sp)
289     ble doTrapFPU
290     2$:
291     IFEQ INFO_LEVEL-1009
292     PUTMSG 0,'%s/TrapHandlerAsm: stack=%08lx %08lx %08lx %08lx'
293     ENDC
294    
295     move.l _OldTrapHandler,-(sp) ;No, jump to old trap handler
296 jlachmann 1.5 rts
297    
298     *
299     * TRAP #0 - 15 Instruction Vectors
300     *
301    
302 jlachmann 1.13 doTrapXX:
303     IFEQ INFO_LEVEL-1009
304     PUTMSG 0,'%s/doTrapXX: stack=%08lx %08lx %08lx %08lx'
305     ENDC
306    
307     movem.l a0/d0,-(sp) ;Save a0,d0
308     move.l (2*4,sp),d0 ;vector number 32-47
309    
310 jlachmann 1.5 move.l usp,a0 ;Get user stack pointer
311 jlachmann 1.13 move.l (4*4,sp),-(a0) ;Copy 4-word stack frame to user stack
312     move.l (3*4,sp),-(a0)
313     move.l a0,usp ;Update USP
314     or.w #$2000,(a0) ;set Supervisor bit in SR
315    
316     lsl.l #2,d0 ;convert vector number to vector offset
317     move.l d0,a0
318     move.l (a0),d0 ;get mac trap vector
319    
320     move.l usp,a0 ;Get user stack pointer
321     move.l d0,-(a0) ;store vector offset as return address
322 jlachmann 1.5 move.l a0,usp ;Update USP
323    
324 jlachmann 1.13 movem.l (sp)+,a0/d0 ;Restore a0,d0
325 jlachmann 1.5 addq.l #4*2,sp ;Remove exception frame from supervisor stack
326 jlachmann 1.13
327 jlachmann 1.5 andi #$d8ff,sr ;Switch to user mode, enable interrupts
328 jlachmann 1.13 rts
329    
330    
331     *
332     * FPU Exception Instruction Vectors
333     *
334 cebix 1.1
335 jlachmann 1.13 doTrapFPU:
336     move.l d0,(sp)
337     fmove.l fpcr,d0
338     and.w #$00ff,d0 ;disable FPU exceptions
339     fmove.l d0,fpcr
340     move.l (sp)+,d0 ;Restore d0
341     rte
342 cebix 1.1
343 jlachmann 1.5
344     *
345     * trace Vector
346     *
347    
348 jlachmann 1.13 dotrace
349     IFEQ INFO_LEVEL-1009
350     PUTMSG 0,'%s/dotrace: stack=%08lx %08lx %08lx %08lx'
351     ENDC
352 jlachmann 1.5
353 jlachmann 1.13 move.l a0,(sp) ;Save a0
354 jlachmann 1.5 move.l usp,a0 ;Get user stack pointer
355 jlachmann 1.13
356     IFEQ INFO_LEVEL-1009
357     move.l (12,a0),-(sp)
358     move.l (8,a0),-(sp)
359     move.l (4,a0),-(sp)
360     move.l (0,a0),-(sp)
361     move.l a0,-(sp)
362     move.l a7,-(sp)
363     PUTMSG 0,'%s/dotrace: sp=%08lx usp=%08lx (%08lx %08lx %08lx %08lx)'
364     lea (6*4,sp),sp
365     ENDC
366    
367 jlachmann 1.5 move.l 3*4(sp),-(a0) ;Copy 6-word stack frame to user stack
368     move.l 2*4(sp),-(a0)
369     move.l 1*4(sp),-(a0)
370     move.l a0,usp ;Update USP
371 jlachmann 1.13 or.w #$2000,(a0) ;set Supervisor bit in SR
372 jlachmann 1.5 move.l (sp)+,a0 ;Restore a0
373    
374     lea 6*2(sp),sp ;Remove exception frame from supervisor stack
375     andi #$18ff,sr ;Switch to user mode, enable interrupts, disable trace
376    
377     move.l $24.w,-(sp) ;Jump to MacOS exception handler
378     rts
379    
380    
381 cebix 1.1 *
382     * A-Line handler: call MacOS A-Line handler
383     *
384    
385     doaline move.l a0,(sp) ;Save a0
386     move.l usp,a0 ;Get user stack pointer
387     move.l 8(sp),-(a0) ;Copy stack frame to user stack
388     move.l 4(sp),-(a0)
389     move.l a0,usp ;Update USP
390 jlachmann 1.13
391     or.w #$2000,(a0) ;set Supervisor bit in SR
392 cebix 1.1 move.l (sp)+,a0 ;Restore a0
393    
394     addq.l #8,sp ;Remove exception frame from supervisor stack
395     andi #$d8ff,sr ;Switch to user mode, enable interrupts
396    
397 cebix 1.14 ; and.w #$f8ff,_EmulatedSR ;enable interrupts in EmulatedSR
398 jlachmann 1.11
399 cebix 1.1 move.l $28.w,-(sp) ;Jump to MacOS exception handler
400     rts
401    
402 jlachmann 1.5 *
403 jlachmann 1.13 * F-Line handler: call F-Line exception handler
404     *
405    
406     dofline move.l a0,(sp) ;Save a0
407     move.l usp,a0 ;Get user stack pointer
408     move.l 8(sp),-(a0) ;Copy stack frame to user stack
409     move.l 4(sp),-(a0)
410     move.l a0,usp ;Update USP
411     or.w #$2000,(a0) ;set Supervisor bit in SR
412     move.l (sp)+,a0 ;Restore a0
413    
414     addq.l #8,sp ;Remove exception frame from supervisor stack
415     andi #$d8ff,sr ;Switch to user mode, enable interrupts
416    
417     and.w #$f8ff,_EmulatedSR ;enable interrupts in EmulatedSR
418    
419     move.l $2c.w,-(sp) ;Jump to MacOS exception handler
420     rts
421    
422     *
423 jlachmann 1.5 * Illegal address handler
424     *
425    
426 jlachmann 1.13 doilladdr:
427     IFEQ INFO_LEVEL-1009
428     PUTMSG 0,'%s/doilladdr: stack=%08lx %08lx %08lx %08lx'
429     ENDC
430    
431     move.l a0,(sp) ;Save a0
432 jlachmann 1.5
433     move.l usp,a0 ;Get user stack pointer
434     move.l 3*4(sp),-(a0) ;Copy 6-word stack frame to user stack
435     move.l 2*4(sp),-(a0)
436     move.l 1*4(sp),-(a0)
437     move.l a0,usp ;Update USP
438 jlachmann 1.13 or.w #$2000,(a0) ;set Supervisor bit in SR
439 jlachmann 1.5 move.l (sp)+,a0 ;Restore a0
440    
441     lea 6*2(sp),sp ;Remove exception frame from supervisor stack
442     andi #$d8ff,sr ;Switch to user mode, enable interrupts
443    
444     move.l $0c.w,-(sp) ;Jump to MacOS exception handler
445     rts
446    
447    
448 cebix 1.1 *
449     * Illegal instruction handler: call IllInstrHandler() (which calls EmulOp())
450     * to execute extended opcodes (see emul_op.h)
451     *
452    
453 cebix 1.7 doillinstr movem.l a0/d0,-(sp)
454 jlachmann 1.5 move.w ([6+2*4,sp]),d0
455     and.w #$ff00,d0
456     cmp.w #$7100,d0
457 jlachmann 1.13
458     IFEQ INFO_LEVEL-1009
459     move.l d0,-(sp)
460     PUTMSG 0,'%s/doillinst: d0=%08lx stack=%08lx %08lx %08lx %08lx'
461     lea (1*4,sp),sp
462     ENDC
463 jlachmann 1.5 movem.l (sp)+,a0/d0
464     beq 1$
465    
466     move.l a0,(sp) ;Save a0
467     move.l usp,a0 ;Get user stack pointer
468     move.l 8(sp),-(a0) ;Copy stack frame to user stack
469     move.l 4(sp),-(a0)
470     move.l a0,usp ;Update USP
471 jlachmann 1.13 or.w #$2000,(a0) ;set Supervisor bit in SR
472 jlachmann 1.5 move.l (sp)+,a0 ;Restore a0
473    
474     add.w #3*4,sp ;Remove exception frame from supervisor stack
475     andi #$d8ff,sr ;Switch to user mode, enable interrupts
476    
477     move.l $10.w,-(sp) ;Jump to MacOS exception handler
478     rts
479    
480 jlachmann 1.13 1$:
481     move.l a6,(sp) ;Save a6
482 cebix 1.1 move.l usp,a6 ;Get user stack pointer
483    
484     move.l a6,-10(a6) ;Push USP (a7)
485     move.l 6(sp),-(a6) ;Push PC
486     move.w 4(sp),-(a6) ;Push SR
487     subq.l #4,a6 ;Skip saved USP
488     move.l (sp),-(a6) ;Push old a6
489     movem.l d0-d7/a0-a5,-(a6) ;Push remaining registers
490     move.l a6,usp ;Update USP
491    
492     add.w #12,sp ;Remove exception frame from supervisor stack
493     andi #$d8ff,sr ;Switch to user mode, enable interrupts
494    
495     move.l a6,-(sp) ;Jump to IllInstrHandler() in main.cpp
496     jsr _IllInstrHandler
497     addq.l #4,sp
498    
499     movem.l (sp)+,d0-d7/a0-a6 ;Restore registers
500     addq.l #4,sp ;Skip saved USP (!!)
501     rtr ;Return from exception
502    
503     *
504     * Privilege violation handler: MacOS runs in supervisor mode,
505     * so we have to emulate certain privileged instructions
506     *
507    
508     doprivviol move.l d0,(sp) ;Save d0
509     move.w ([6,sp]),d0 ;Get instruction word
510    
511 jlachmann 1.13 IFEQ INFO_LEVEL-1001
512     move.w ([6,a0]),-(sp)
513     move.w #0,-(sp)
514     PUTMSG 0,'%s/doprivviol: opcode=%04lx'
515     lea (1*4,sp),sp
516     ENDC
517    
518 cebix 1.1 cmp.w #$40e7,d0 ;move sr,-(sp)?
519     beq pushsr
520     cmp.w #$46df,d0 ;move (sp)+,sr?
521     beq popsr
522    
523     cmp.w #$007c,d0 ;ori #xxxx,sr?
524     beq orisr
525     cmp.w #$027c,d0 ;andi #xxxx,sr?
526     beq andisr
527    
528     cmp.w #$46fc,d0 ;move #xxxx,sr?
529     beq movetosrimm
530    
531     cmp.w #$46ef,d0 ;move (xxxx,sp),sr?
532     beq movetosrsprel
533     cmp.w #$46d8,d0 ;move (a0)+,sr?
534     beq movetosra0p
535     cmp.w #$46d9,d0 ;move (a1)+,sr?
536     beq movetosra1p
537    
538     cmp.w #$40f8,d0 ;move sr,xxxx.w?
539     beq movefromsrabs
540     cmp.w #$40d0,d0 ;move sr,(a0)?
541     beq movefromsra0
542     cmp.w #$40d7,d0 ;move sr,(sp)?
543 cebix 1.6 beq movefromsrsp
544 cebix 1.1
545     cmp.w #$f327,d0 ;fsave -(sp)?
546     beq fsavepush
547     cmp.w #$f35f,d0 ;frestore (sp)+?
548     beq frestorepop
549 jlachmann 1.5 cmp.w #$f32d,d0 ;fsave xxx(a5) ?
550     beq fsavea5
551     cmp.w #$f36d,d0 ;frestore xxx(a5) ?
552     beq frestorea5
553 cebix 1.1
554     cmp.w #$4e73,d0 ;rte?
555     beq pvrte
556    
557     cmp.w #$40c0,d0 ;move sr,d0?
558     beq movefromsrd0
559     cmp.w #$40c1,d0 ;move sr,d1?
560     beq movefromsrd1
561     cmp.w #$40c2,d0 ;move sr,d2?
562     beq movefromsrd2
563     cmp.w #$40c3,d0 ;move sr,d3?
564     beq movefromsrd3
565     cmp.w #$40c4,d0 ;move sr,d4?
566     beq movefromsrd4
567     cmp.w #$40c5,d0 ;move sr,d5?
568     beq movefromsrd5
569     cmp.w #$40c6,d0 ;move sr,d6?
570     beq movefromsrd6
571     cmp.w #$40c7,d0 ;move sr,d7?
572     beq movefromsrd7
573    
574     cmp.w #$46c0,d0 ;move d0,sr?
575     beq movetosrd0
576     cmp.w #$46c1,d0 ;move d1,sr?
577     beq movetosrd1
578     cmp.w #$46c2,d0 ;move d2,sr?
579     beq movetosrd2
580     cmp.w #$46c3,d0 ;move d3,sr?
581     beq movetosrd3
582     cmp.w #$46c4,d0 ;move d4,sr?
583     beq movetosrd4
584     cmp.w #$46c5,d0 ;move d5,sr?
585     beq movetosrd5
586     cmp.w #$46c6,d0 ;move d6,sr?
587     beq movetosrd6
588     cmp.w #$46c7,d0 ;move d7,sr?
589     beq movetosrd7
590    
591     cmp.w #$4e7a,d0 ;movec cr,x?
592     beq movecfromcr
593     cmp.w #$4e7b,d0 ;movec x,cr?
594     beq movectocr
595    
596     cmp.w #$f478,d0 ;cpusha dc?
597     beq cpushadc
598     cmp.w #$f4f8,d0 ;cpusha dc/ic?
599     beq cpushadcic
600    
601 jlachmann 1.5 cmp.w #$4e69,d0 ;move usp,a1
602     beq moveuspa1
603     cmp.w #$4e68,d0 ;move usp,a0
604     beq moveuspa0
605    
606     cmp.w #$4e61,d0 ;move a1,usp
607     beq moved1usp
608    
609 cebix 1.1 pv_unhandled move.l (sp),d0 ;Unhandled instruction, jump to handler in main.cpp
610     move.l a6,(sp) ;Save a6
611     move.l usp,a6 ;Get user stack pointer
612    
613     move.l a6,-10(a6) ;Push USP (a7)
614     move.l 6(sp),-(a6) ;Push PC
615     move.w 4(sp),-(a6) ;Push SR
616     subq.l #4,a6 ;Skip saved USP
617     move.l (sp),-(a6) ;Push old a6
618     movem.l d0-d7/a0-a5,-(a6) ;Push remaining registers
619     move.l a6,usp ;Update USP
620    
621     add.w #12,sp ;Remove exception frame from supervisor stack
622     andi #$d8ff,sr ;Switch to user mode, enable interrupts
623    
624     move.l a6,-(sp) ;Jump to PrivViolHandler() in main.cpp
625     jsr _PrivViolHandler
626     addq.l #4,sp
627    
628     movem.l (sp)+,d0-d7/a0-a6 ;Restore registers
629     addq.l #4,sp ;Skip saved USP
630     rtr ;Return from exception
631    
632     ; move sr,-(sp)
633     pushsr move.l a0,-(sp) ;Save a0
634     move.l usp,a0 ;Get user stack pointer
635     move.w 8(sp),d0 ;Get CCR from exception stack frame
636     or.w _EmulatedSR,d0 ;Add emulated supervisor bits
637     move.w d0,-(a0) ;Store SR on user stack
638     move.l a0,usp ;Update USP
639     move.l (sp)+,a0 ;Restore a0
640     move.l (sp)+,d0 ;Restore d0
641     addq.l #2,2(sp) ;Skip instruction
642 jlachmann 1.13
643     IFEQ INFO_LEVEL-1001
644     move.l (4),-(sp)
645     PUTMSG 0,'%s/doprivviol END: Execbase=%08lx'
646     lea (1*4,sp),sp
647     ENDC
648 cebix 1.1 rte
649    
650     ; move (sp)+,sr
651     popsr move.l a0,-(sp) ;Save a0
652     move.l usp,a0 ;Get user stack pointer
653     move.w (a0)+,d0 ;Get SR from user stack
654     move.w d0,8(sp) ;Store into CCR on exception stack frame
655     and.w #$00ff,8(sp)
656 jlachmann 1.5 and.w #$e700,d0 ;Extract supervisor bits
657 cebix 1.1 move.w d0,_EmulatedSR ;And save them
658    
659     and.w #$0700,d0 ;Rethrow exception if interrupts are pending and reenabled
660     bne 1$
661     tst.l _InterruptFlags
662     beq 1$
663     movem.l d0-d1/a0-a1/a6,-(sp)
664     move.l _SysBase,a6
665     move.l _MainTask,a1
666     move.l _IRQSigMask,d0
667     JSRLIB Signal
668     movem.l (sp)+,d0-d1/a0-a1/a6
669     1$
670     move.l a0,usp ;Update USP
671     move.l (sp)+,a0 ;Restore a0
672     move.l (sp)+,d0 ;Restore d0
673     addq.l #2,2(sp) ;Skip instruction
674 jlachmann 1.13
675     IFEQ INFO_LEVEL-1001
676     move.l (4),-(sp)
677     PUTMSG 0,'%s/doprivviol END: Execbase=%08lx'
678     lea (1*4,sp),sp
679     ENDC
680 cebix 1.1 rte
681    
682     ; ori #xxxx,sr
683     orisr move.w 4(sp),d0 ;Get CCR from stack
684     or.w _EmulatedSR,d0 ;Add emulated supervisor bits
685     or.w ([6,sp],2),d0 ;Or with immediate value
686     move.w d0,4(sp) ;Store into CCR on stack
687     and.w #$00ff,4(sp)
688 jlachmann 1.5 and.w #$e700,d0 ;Extract supervisor bits
689 cebix 1.1 move.w d0,_EmulatedSR ;And save them
690     move.l (sp)+,d0 ;Restore d0
691     addq.l #4,2(sp) ;Skip instruction
692 jlachmann 1.13
693     IFEQ INFO_LEVEL-1001
694     move.l (4),-(sp)
695     PUTMSG 0,'%s/doprivviol END: Execbase=%08lx'
696     lea (1*4,sp),sp
697     ENDC
698 cebix 1.1 rte
699    
700     ; andi #xxxx,sr
701     andisr move.w 4(sp),d0 ;Get CCR from stack
702     or.w _EmulatedSR,d0 ;Add emulated supervisor bits
703     and.w ([6,sp],2),d0 ;And with immediate value
704     storesr4 move.w d0,4(sp) ;Store into CCR on stack
705     and.w #$00ff,4(sp)
706 jlachmann 1.5 and.w #$e700,d0 ;Extract supervisor bits
707 cebix 1.1 move.w d0,_EmulatedSR ;And save them
708    
709     and.w #$0700,d0 ;Rethrow exception if interrupts are pending and reenabled
710     bne.s 1$
711     tst.l _InterruptFlags
712     beq.s 1$
713     movem.l d0-d1/a0-a1/a6,-(sp)
714     move.l _SysBase,a6
715     move.l _MainTask,a1
716     move.l _IRQSigMask,d0
717     JSRLIB Signal
718     movem.l (sp)+,d0-d1/a0-a1/a6
719     1$ move.l (sp)+,d0 ;Restore d0
720     addq.l #4,2(sp) ;Skip instruction
721 jlachmann 1.13
722     IFEQ INFO_LEVEL-1001
723     move.l (4),-(sp)
724     PUTMSG 0,'%s/doprivviol END: Execbase=%08lx'
725     lea (1*4,sp),sp
726     ENDC
727 cebix 1.1 rte
728    
729     ; move #xxxx,sr
730     movetosrimm move.w ([6,sp],2),d0 ;Get immediate value
731     bra.s storesr4
732    
733     ; move (xxxx,sp),sr
734     movetosrsprel move.l a0,-(sp) ;Save a0
735     move.l usp,a0 ;Get user stack pointer
736     move.w ([10,sp],2),d0 ;Get offset
737     move.w (a0,d0.w),d0 ;Read word
738     move.l (sp)+,a0 ;Restore a0
739     bra.s storesr4
740    
741     ; move (a0)+,sr
742     movetosra0p move.w (a0)+,d0 ;Read word
743     bra storesr2
744    
745     ; move (a1)+,sr
746     movetosra1p move.w (a1)+,d0 ;Read word
747     bra storesr2
748    
749     ; move sr,xxxx.w
750     movefromsrabs move.l a0,-(sp) ;Save a0
751     move.w ([10,sp],2),a0 ;Get address
752     move.w 8(sp),d0 ;Get CCR
753     or.w _EmulatedSR,d0 ;Add emulated supervisor bits
754     move.w d0,(a0) ;Store SR
755     move.l (sp)+,a0 ;Restore a0
756     move.l (sp)+,d0 ;Restore d0
757     addq.l #4,2(sp) ;Skip instruction
758 jlachmann 1.13
759     IFEQ INFO_LEVEL-1001
760     move.l (4),-(sp)
761     PUTMSG 0,'%s/doprivviol END: Execbase=%08lx'
762     lea (1*4,sp),sp
763     ENDC
764 cebix 1.1 rte
765    
766     ; move sr,(a0)
767     movefromsra0 move.w 4(sp),d0 ;Get CCR
768     or.w _EmulatedSR,d0 ;Add emulated supervisor bits
769     move.w d0,(a0) ;Store SR
770     move.l (sp)+,d0 ;Restore d0
771     addq.l #2,2(sp) ;Skip instruction
772 jlachmann 1.13
773     IFEQ INFO_LEVEL-1001
774     move.l (4),-(sp)
775     PUTMSG 0,'%s/doprivviol END: Execbase=%08lx'
776     lea (1*4,sp),sp
777     ENDC
778 cebix 1.1 rte
779    
780     ; move sr,(sp)
781     movefromsrsp move.l a0,-(sp) ;Save a0
782     move.l usp,a0 ;Get user stack pointer
783     move.w 8(sp),d0 ;Get CCR
784     or.w _EmulatedSR,d0 ;Add emulated supervisor bits
785     move.w d0,(a0) ;Store SR
786     move.l (sp)+,a0 ;Restore a0
787     move.l (sp)+,d0 ;Restore d0
788     addq.l #2,2(sp) ;Skip instruction
789 jlachmann 1.13
790     IFEQ INFO_LEVEL-1001
791     move.l (4),-(sp)
792     PUTMSG 0,'%s/doprivviol END: Execbase=%08lx'
793     lea (1*4,sp),sp
794     ENDC
795 cebix 1.1 rte
796    
797     ; fsave -(sp)
798     fsavepush move.l (sp),d0 ;Restore d0
799     move.l a0,(sp) ;Save a0
800     move.l usp,a0 ;Get user stack pointer
801 cebix 1.10 move.l #$41000000,-(a0) ;Push idle frame
802 cebix 1.1 move.l a0,usp ;Update USP
803     move.l (sp)+,a0 ;Restore a0
804     addq.l #2,2(sp) ;Skip instruction
805 jlachmann 1.13
806     IFEQ INFO_LEVEL-1001
807     move.l (4),-(sp)
808     PUTMSG 0,'%s/doprivviol END: Execbase=%08lx'
809     lea (1*4,sp),sp
810     ENDC
811 cebix 1.1 rte
812    
813 cebix 1.10 ; fsave xxx(a5)
814     fsavea5 move.l (sp),d0 ;Restore d0
815     move.l a0,(sp) ;Save a0
816     move.l a5,a0 ;Get base register
817     add.w ([6,sp],2),a0 ;Add offset to base register
818     move.l #$41000000,(a0) ;Push idle frame
819     move.l (sp)+,a0 ;Restore a0
820     addq.l #4,2(sp) ;Skip instruction
821 jlachmann 1.13
822     IFEQ INFO_LEVEL-1001
823     move.l (4),-(sp)
824     PUTMSG 0,'%s/doprivviol END: Execbase=%08lx'
825     lea (1*4,sp),sp
826     ENDC
827 cebix 1.10 rte
828    
829 cebix 1.1 ; frestore (sp)+
830     frestorepop move.l (sp),d0 ;Restore d0
831     move.l a0,(sp) ;Save a0
832     move.l usp,a0 ;Get user stack pointer
833 cebix 1.10 addq.l #4,a0 ;Nothing to do...
834 cebix 1.1 move.l a0,usp ;Update USP
835     move.l (sp)+,a0 ;Restore a0
836     addq.l #2,2(sp) ;Skip instruction
837 jlachmann 1.13
838     IFEQ INFO_LEVEL-1001
839     move.l (4),-(sp)
840     PUTMSG 0,'%s/doprivviol END: Execbase=%08lx'
841     lea (1*4,sp),sp
842     ENDC
843 cebix 1.1 rte
844    
845 cebix 1.10 ; frestore xxx(a5)
846 jlachmann 1.5 frestorea5 move.l (sp),d0 ;Restore d0
847     move.l a0,(sp) ;Save a0
848     move.l (sp)+,a0 ;Restore a0
849     addq.l #4,2(sp) ;Skip instruction
850 jlachmann 1.13
851     IFEQ INFO_LEVEL-1001
852     move.l (4),-(sp)
853     PUTMSG 0,'%s/doprivviol END: Execbase=%08lx'
854     lea (1*4,sp),sp
855     ENDC
856 jlachmann 1.5 rte
857    
858     ; rte
859     pvrte movem.l a0/a1,-(sp) ;Save a0 and a1
860 cebix 1.1 move.l usp,a0 ;Get user stack pointer
861 jlachmann 1.5
862 cebix 1.1 move.w (a0)+,d0 ;Get SR from user stack
863 jlachmann 1.5 move.w d0,8+4(sp) ;Store into CCR on exception stack frame
864     and.w #$c0ff,8+4(sp)
865     and.w #$e700,d0 ;Extract supervisor bits
866 cebix 1.1 move.w d0,_EmulatedSR ;And save them
867 jlachmann 1.5 move.l (a0)+,10+4(sp) ;Store return address in exception stack frame
868    
869     move.w (a0)+,d0 ;get format word
870     lsr.w #7,d0 ;get stack frame Id
871     lsr.w #4,d0
872     and.w #$001e,d0
873     move.w (StackFormatTable,pc,d0.w),d0 ; get total stack frame length
874     subq.w #4,d0 ; count only extra words
875     lea 16+4(sp),a1 ; destination address (in supervisor stack)
876     bra 1$
877    
878 cebix 1.7 2$ move.w (a0)+,(a1)+ ; copy additional stack words back to supervisor stack
879     1$ dbf d0,2$
880 jlachmann 1.5
881 cebix 1.1 move.l a0,usp ;Update USP
882 jlachmann 1.5 movem.l (sp)+,a0/a1 ;Restore a0 and a1
883 cebix 1.1 move.l (sp)+,d0 ;Restore d0
884 jlachmann 1.13
885     IFEQ INFO_LEVEL-1001
886     move.l (4),-(sp)
887     PUTMSG 0,'%s/doprivviol END: Execbase=%08lx'
888     lea (1*4,sp),sp
889     ENDC
890 cebix 1.1 rte
891    
892 jlachmann 1.5 ; sizes of exceptions stack frames
893     StackFormatTable:
894     dc.w 4 ; Four-word stack frame, format $0
895     dc.w 4 ; Throwaway four-word stack frame, format $1
896     dc.w 6 ; Six-word stack frame, format $2
897     dc.w 6 ; MC68040 floating-point post-instruction stack frame, format $3
898     dc.w 8 ; MC68EC040 and MC68LC040 floating-point unimplemented stack frame, format $4
899     dc.w 4 ; Format $5
900     dc.w 4 ; Format $6
901     dc.w 30 ; MC68040 access error stack frame, Format $7
902     dc.w 29 ; MC68010 bus and address error stack frame, format $8
903     dc.w 10 ; MC68020 and MC68030 coprocessor mid-instruction stack frame, format $9
904     dc.w 16 ; MC68020 and MC68030 short bus cycle stack frame, format $a
905     dc.w 46 ; MC68020 and MC68030 long bus cycle stack frame, format $b
906     dc.w 12 ; CPU32 bus error for prefetches and operands stack frame, format $c
907     dc.w 4 ; Format $d
908     dc.w 4 ; Format $e
909     dc.w 4 ; Format $f
910    
911 cebix 1.1 ; move sr,dx
912     movefromsrd0 addq.l #4,sp ;Skip saved d0
913     moveq #0,d0
914     move.w (sp),d0 ;Get CCR
915     or.w _EmulatedSR,d0 ;Add emulated supervisor bits
916     addq.l #2,2(sp) ;Skip instruction
917 jlachmann 1.13
918     IFEQ INFO_LEVEL-1001
919     move.l (4),-(sp)
920     PUTMSG 0,'%s/doprivviol END: Execbase=%08lx'
921     lea (1*4,sp),sp
922     ENDC
923 cebix 1.1 rte
924    
925     movefromsrd1 move.l (sp)+,d0
926     moveq #0,d1
927     move.w (sp),d1
928     or.w _EmulatedSR,d1
929     addq.l #2,2(sp)
930 jlachmann 1.13
931     IFEQ INFO_LEVEL-1001
932     move.l (4),-(sp)
933     PUTMSG 0,'%s/doprivviol END: Execbase=%08lx'
934     lea (1*4,sp),sp
935     ENDC
936 cebix 1.1 rte
937    
938     movefromsrd2 move.l (sp)+,d0
939     moveq #0,d2
940     move.w (sp),d2
941     or.w _EmulatedSR,d2
942     addq.l #2,2(sp)
943 jlachmann 1.13
944     IFEQ INFO_LEVEL-1001
945     move.l (4),-(sp)
946     PUTMSG 0,'%s/doprivviol END: Execbase=%08lx'
947     lea (1*4,sp),sp
948     ENDC
949 cebix 1.1 rte
950    
951     movefromsrd3 move.l (sp)+,d0
952     moveq #0,d3
953     move.w (sp),d3
954     or.w _EmulatedSR,d3
955     addq.l #2,2(sp)
956 jlachmann 1.13
957     IFEQ INFO_LEVEL-1001
958     move.l (4),-(sp)
959     PUTMSG 0,'%s/doprivviol END: Execbase=%08lx'
960     lea (1*4,sp),sp
961     ENDC
962 cebix 1.1 rte
963    
964     movefromsrd4 move.l (sp)+,d0
965     moveq #0,d4
966     move.w (sp),d4
967     or.w _EmulatedSR,d4
968     addq.l #2,2(sp)
969 jlachmann 1.13
970     IFEQ INFO_LEVEL-1001
971     move.l (4),-(sp)
972     PUTMSG 0,'%s/doprivviol END: Execbase=%08lx'
973     lea (1*4,sp),sp
974     ENDC
975 cebix 1.1 rte
976    
977     movefromsrd5 move.l (sp)+,d0
978     moveq #0,d5
979     move.w (sp),d5
980     or.w _EmulatedSR,d5
981     addq.l #2,2(sp)
982 jlachmann 1.13
983     IFEQ INFO_LEVEL-1001
984     move.l (4),-(sp)
985     PUTMSG 0,'%s/doprivviol END: Execbase=%08lx'
986     lea (1*4,sp),sp
987     ENDC
988 cebix 1.1 rte
989    
990     movefromsrd6 move.l (sp)+,d0
991     moveq #0,d6
992     move.w (sp),d6
993     or.w _EmulatedSR,d6
994     addq.l #2,2(sp)
995 jlachmann 1.13
996     IFEQ INFO_LEVEL-1001
997     move.l (4),-(sp)
998     PUTMSG 0,'%s/doprivviol END: Execbase=%08lx'
999     lea (1*4,sp),sp
1000     ENDC
1001 cebix 1.1 rte
1002    
1003     movefromsrd7 move.l (sp)+,d0
1004     moveq #0,d7
1005     move.w (sp),d7
1006     or.w _EmulatedSR,d7
1007     addq.l #2,2(sp)
1008 jlachmann 1.13
1009     IFEQ INFO_LEVEL-1001
1010     move.l (4),-(sp)
1011     PUTMSG 0,'%s/doprivviol END: Execbase=%08lx'
1012     lea (1*4,sp),sp
1013     ENDC
1014 cebix 1.1 rte
1015    
1016     ; move dx,sr
1017     movetosrd0 move.l (sp),d0
1018     storesr2 move.w d0,4(sp)
1019     and.w #$00ff,4(sp)
1020 jlachmann 1.5 and.w #$e700,d0
1021 cebix 1.1 move.w d0,_EmulatedSR
1022    
1023     and.w #$0700,d0 ;Rethrow exception if interrupts are pending and reenabled
1024     bne.s 1$
1025     tst.l _InterruptFlags
1026     beq.s 1$
1027     movem.l d0-d1/a0-a1/a6,-(sp)
1028     move.l _SysBase,a6
1029     move.l _MainTask,a1
1030     move.l _IRQSigMask,d0
1031     JSRLIB Signal
1032     movem.l (sp)+,d0-d1/a0-a1/a6
1033     1$ move.l (sp)+,d0
1034     addq.l #2,2(sp)
1035 jlachmann 1.13
1036     IFEQ INFO_LEVEL-1001
1037     move.l (4),-(sp)
1038     PUTMSG 0,'%s/doprivviol END: Execbase=%08lx'
1039     lea (1*4,sp),sp
1040     ENDC
1041 cebix 1.1 rte
1042    
1043     movetosrd1 move.l d1,d0
1044     bra.s storesr2
1045    
1046     movetosrd2 move.l d2,d0
1047     bra.s storesr2
1048    
1049     movetosrd3 move.l d3,d0
1050     bra.s storesr2
1051    
1052     movetosrd4 move.l d4,d0
1053     bra.s storesr2
1054    
1055     movetosrd5 move.l d5,d0
1056     bra.s storesr2
1057    
1058     movetosrd6 move.l d6,d0
1059     bra.s storesr2
1060    
1061     movetosrd7 move.l d7,d0
1062     bra.s storesr2
1063    
1064     ; movec cr,x
1065     movecfromcr move.w ([6,sp],2),d0 ;Get next instruction word
1066    
1067     cmp.w #$8801,d0 ;movec vbr,a0?
1068     beq.s movecvbra0
1069     cmp.w #$9801,d0 ;movec vbr,a1?
1070     beq.s movecvbra1
1071 jlachmann 1.13 cmp.w #$A801,d0 ;movec vbr,a2?
1072     beq.s movecvbra2
1073 jlachmann 1.5 cmp.w #$1801,d0 ;movec vbr,d1?
1074     beq movecvbrd1
1075 cebix 1.1 cmp.w #$0002,d0 ;movec cacr,d0?
1076     beq.s moveccacrd0
1077     cmp.w #$1002,d0 ;movec cacr,d1?
1078     beq.s moveccacrd1
1079     cmp.w #$0003,d0 ;movec tc,d0?
1080     beq.s movectcd0
1081     cmp.w #$1003,d0 ;movec tc,d1?
1082     beq.s movectcd1
1083 cebix 1.6 cmp.w #$1000,d0 ;movec sfc,d1?
1084 jlachmann 1.5 beq movecsfcd1
1085 cebix 1.6 cmp.w #$1001,d0 ;movec dfc,d1?
1086 jlachmann 1.5 beq movecdfcd1
1087 cebix 1.6 cmp.w #$0806,d0 ;movec urp,d0?
1088 jlachmann 1.5 beq movecurpd0
1089 cebix 1.6 cmp.w #$0807,d0 ;movec srp,d0?
1090 jlachmann 1.5 beq.s movecsrpd0
1091 cebix 1.6 cmp.w #$0004,d0 ;movec itt0,d0
1092 jlachmann 1.5 beq.s movecitt0d0
1093 cebix 1.6 cmp.w #$0005,d0 ;movec itt1,d0
1094 jlachmann 1.5 beq.s movecitt1d0
1095 cebix 1.6 cmp.w #$0006,d0 ;movec dtt0,d0
1096 jlachmann 1.5 beq.s movecdtt0d0
1097 cebix 1.6 cmp.w #$0007,d0 ;movec dtt1,d0
1098 jlachmann 1.5 beq.s movecdtt1d0
1099 cebix 1.1
1100     bra pv_unhandled
1101    
1102     ; movec cacr,d0
1103     moveccacrd0 move.l (sp)+,d0
1104     move.l #$3111,d0 ;All caches and bursts on
1105     addq.l #4,2(sp)
1106 jlachmann 1.13
1107     IFEQ INFO_LEVEL-1001
1108     move.l (4),-(sp)
1109     PUTMSG 0,'%s/doprivviol END: Execbase=%08lx'
1110     lea (1*4,sp),sp
1111     ENDC
1112 cebix 1.1 rte
1113    
1114     ; movec cacr,d1
1115     moveccacrd1 move.l (sp)+,d0
1116     move.l #$3111,d1 ;All caches and bursts on
1117     addq.l #4,2(sp)
1118 jlachmann 1.13
1119     IFEQ INFO_LEVEL-1001
1120     move.l (4),-(sp)
1121     PUTMSG 0,'%s/doprivviol END: Execbase=%08lx'
1122     lea (1*4,sp),sp
1123     ENDC
1124 cebix 1.1 rte
1125    
1126     ; movec vbr,a0
1127     movecvbra0 move.l (sp)+,d0
1128     sub.l a0,a0 ;VBR always appears to be at 0
1129     addq.l #4,2(sp)
1130 jlachmann 1.13
1131     IFEQ INFO_LEVEL-1001
1132     move.l (4),-(sp)
1133     PUTMSG 0,'%s/doprivviol END: Execbase=%08lx'
1134     lea (1*4,sp),sp
1135     ENDC
1136 cebix 1.1 rte
1137    
1138     ; movec vbr,a1
1139     movecvbra1 move.l (sp)+,d0
1140     sub.l a1,a1 ;VBR always appears to be at 0
1141     addq.l #4,2(sp)
1142 jlachmann 1.13
1143     IFEQ INFO_LEVEL-1001
1144     move.l (4),-(sp)
1145     PUTMSG 0,'%s/doprivviol END: Execbase=%08lx'
1146     lea (1*4,sp),sp
1147     ENDC
1148     rte
1149    
1150     ; movec vbr,a2
1151     movecvbra2 move.l (sp)+,d0
1152     sub.l a2,a2 ;VBR always appears to be at 0
1153     addq.l #4,2(sp)
1154    
1155     IFEQ INFO_LEVEL-1001
1156     move.l (4),-(sp)
1157     PUTMSG 0,'%s/doprivviol END: Execbase=%08lx'
1158     lea (1*4,sp),sp
1159     ENDC
1160 cebix 1.1 rte
1161    
1162 jlachmann 1.5 ; movec vbr,d1
1163     movecvbrd1 move.l (sp)+,d0
1164     moveq.l #0,d1 ;VBR always appears to be at 0
1165     addq.l #4,2(sp)
1166 jlachmann 1.13
1167     IFEQ INFO_LEVEL-1001
1168     move.l (4),-(sp)
1169     PUTMSG 0,'%s/doprivviol END: Execbase=%08lx'
1170     lea (1*4,sp),sp
1171     ENDC
1172 jlachmann 1.5 rte
1173    
1174 cebix 1.1 ; movec tc,d0
1175     movectcd0 addq.l #4,sp
1176     moveq #0,d0 ;MMU is always off
1177     addq.l #4,2(sp)
1178 jlachmann 1.13
1179     IFEQ INFO_LEVEL-1001
1180     move.l (4),-(sp)
1181     PUTMSG 0,'%s/doprivviol END: Execbase=%08lx'
1182     lea (1*4,sp),sp
1183     ENDC
1184 cebix 1.1 rte
1185    
1186 jlachmann 1.5 ; movec tc,d1 +jl+
1187     movectcd1 move.l (sp)+,d0 ;Restore d0
1188     moveq #0,d1 ;MMU is always off
1189     addq.l #4,2(sp)
1190 jlachmann 1.13
1191     IFEQ INFO_LEVEL-1001
1192     move.l (4),-(sp)
1193     PUTMSG 0,'%s/doprivviol END: Execbase=%08lx'
1194     lea (1*4,sp),sp
1195     ENDC
1196 jlachmann 1.5 rte
1197    
1198 cebix 1.6 ; movec sfc,d1 +jl+
1199 cebix 1.7 movecsfcd1 move.l (sp)+,d0 ;Restore d0
1200 cebix 1.6 moveq #0,d1
1201 jlachmann 1.5 addq.l #4,2(sp)
1202 jlachmann 1.13
1203     IFEQ INFO_LEVEL-1001
1204     move.l (4),-(sp)
1205     PUTMSG 0,'%s/doprivviol END: Execbase=%08lx'
1206     lea (1*4,sp),sp
1207     ENDC
1208 jlachmann 1.5 rte
1209    
1210 cebix 1.6 ; movec dfc,d1 +jl+
1211 cebix 1.7 movecdfcd1 move.l (sp)+,d0 ;Restore d0
1212 cebix 1.6 moveq #0,d1
1213 cebix 1.1 addq.l #4,2(sp)
1214 jlachmann 1.13
1215     IFEQ INFO_LEVEL-1001
1216     move.l (4),-(sp)
1217     PUTMSG 0,'%s/doprivviol END: Execbase=%08lx'
1218     lea (1*4,sp),sp
1219     ENDC
1220 cebix 1.1 rte
1221    
1222 cebix 1.7 movecurpd0 ; movec urp,d0 +jl+
1223     movecsrpd0 ; movec srp,d0
1224     movecitt0d0 ; movec itt0,d0
1225     movecitt1d0 ; movec itt1,d0
1226     movecdtt0d0 ; movec dtt0,d0
1227     movecdtt1d0 ; movec dtt1,d0
1228 jlachmann 1.5 addq.l #4,sp
1229     moveq.l #0,d0 ;MMU is always off
1230     addq.l #4,2(sp) ;skip instruction
1231 jlachmann 1.13
1232     IFEQ INFO_LEVEL-1001
1233     move.l (4),-(sp)
1234     PUTMSG 0,'%s/doprivviol END: Execbase=%08lx'
1235     lea (1*4,sp),sp
1236     ENDC
1237 jlachmann 1.5 rte
1238    
1239 cebix 1.1 ; movec x,cr
1240     movectocr move.w ([6,sp],2),d0 ;Get next instruction word
1241    
1242     cmp.w #$0801,d0 ;movec d0,vbr?
1243     beq.s movectovbr
1244 jlachmann 1.5 cmp.w #$1801,d0 ;movec d1,vbr?
1245     beq.s movectovbr
1246 jlachmann 1.13 cmp.w #$A801,d0 ;movec a2,vbr?
1247     beq.s movectovbr
1248 cebix 1.1 cmp.w #$0002,d0 ;movec d0,cacr?
1249     beq.s movectocacr
1250     cmp.w #$1002,d0 ;movec d1,cacr?
1251     beq.s movectocacr
1252 cebix 1.6 cmp.w #$1000,d0 ;movec d1,sfc?
1253 jlachmann 1.5 beq.s movectoxfc
1254 cebix 1.6 cmp.w #$1001,d0 ;movec d1,dfc?
1255 jlachmann 1.5 beq.s movectoxfc
1256 cebix 1.1
1257     bra pv_unhandled
1258    
1259     ; movec x,vbr
1260     movectovbr move.l (sp)+,d0 ;Ignore moves to VBR
1261     addq.l #4,2(sp)
1262 jlachmann 1.13
1263     IFEQ INFO_LEVEL-1001
1264     move.l (4),-(sp)
1265     PUTMSG 0,'%s/doprivviol END: Execbase=%08lx'
1266     lea (1*4,sp),sp
1267     ENDC
1268 cebix 1.1 rte
1269    
1270     ; movec dx,cacr
1271     movectocacr movem.l d1/a0-a1/a6,-(sp) ;Move to CACR, clear caches
1272     move.l _SysBase,a6
1273     JSRLIB CacheClearU
1274     movem.l (sp)+,d1/a0-a1/a6
1275     move.l (sp)+,d0
1276     addq.l #4,2(sp)
1277 jlachmann 1.13
1278     IFEQ INFO_LEVEL-1001
1279     move.l (4),-(sp)
1280     PUTMSG 0,'%s/doprivviol END: Execbase=%08lx'
1281     lea (1*4,sp),sp
1282     ENDC
1283 cebix 1.1 rte
1284    
1285 cebix 1.6 ; movec x,sfc
1286     ; movec x,dfc
1287 jlachmann 1.5 movectoxfc move.l (sp)+,d0 ;Ignore moves to SFC, DFC
1288     addq.l #4,2(sp)
1289 jlachmann 1.13
1290     IFEQ INFO_LEVEL-1001
1291     move.l (4),-(sp)
1292     PUTMSG 0,'%s/doprivviol END: Execbase=%08lx'
1293     lea (1*4,sp),sp
1294     ENDC
1295 jlachmann 1.5 rte
1296    
1297 cebix 1.1 ; cpusha
1298     cpushadc
1299 jlachmann 1.13 cpushadcic
1300     IFEQ INFO_LEVEL-1003
1301     move.l (4),-(sp)
1302     move.l d0,-(sp)
1303     PUTMSG 0,'%s/cpushadc: opcode=%04lx Execbase=%08lx'
1304     lea (2*4,sp),sp
1305     ENDC
1306     movem.l d1/a0-a1/a6,-(sp) ;Clear caches
1307 cebix 1.1 move.l _SysBase,a6
1308     JSRLIB CacheClearU
1309     movem.l (sp)+,d1/a0-a1/a6
1310     move.l (sp)+,d0
1311     addq.l #2,2(sp)
1312     rte
1313 jlachmann 1.5
1314     ; move usp,a1 +jl+
1315 cebix 1.7 moveuspa1 move.l (sp)+,d0
1316 jlachmann 1.5 move usp,a1
1317     addq.l #2,2(sp)
1318 jlachmann 1.13
1319     IFEQ INFO_LEVEL-1009
1320     move.l a1,-(sp)
1321     move.l a7,-(sp)
1322     PUTMSG 0,'%s/moveuspa1: a7=%08lx a1=%08lx'
1323     lea (2*4,sp),sp
1324     ENDC
1325    
1326 jlachmann 1.5 rte
1327    
1328     ; move usp,a0 +jl+
1329 cebix 1.7 moveuspa0 move.l (sp)+,d0
1330 jlachmann 1.5 move usp,a0
1331     addq.l #2,2(sp)
1332 jlachmann 1.13
1333     IFEQ INFO_LEVEL-1009
1334     move.l a0,-(sp)
1335     move.l a7,-(sp)
1336     PUTMSG 0,'%s/moveuspa0: a7=%08lx a0=%08lx'
1337     lea (2*4,sp),sp
1338     ENDC
1339    
1340 jlachmann 1.5 rte
1341    
1342     ; move a1,usp +jl+
1343 cebix 1.7 moved1usp move.l (sp)+,d0
1344 jlachmann 1.5 move a1,usp
1345     addq.l #2,2(sp)
1346 jlachmann 1.13
1347     IFEQ INFO_LEVEL-1001
1348     move.l (4),-(sp)
1349     PUTMSG 0,'%s/doprivviol END: Execbase=%08lx'
1350     lea (1*4,sp),sp
1351     ENDC
1352 jlachmann 1.5 rte
1353    
1354     ;
1355     ; Trigger NMI (Pop up debugger)
1356     ;
1357    
1358 cebix 1.7 _AsmTriggerNMI move.l d0,-(sp) ;Save d0
1359 jlachmann 1.5 move.w #$007c,-(sp) ;Yes, fake NMI stack frame
1360     pea 1$
1361     move.w _EmulatedSR,d0
1362     and.w #$f8ff,d0 ;Set interrupt level in SR
1363     move.w d0,-(sp)
1364     move.w d0,_EmulatedSR
1365    
1366     move.l $7c.w,-(sp) ;Jump to MacOS NMI handler
1367     rts
1368    
1369     1$ move.l (sp)+,d0 ;Restore d0
1370     rts
1371    
1372 jlachmann 1.13
1373     CopyTrapStack:
1374     movem.l d0/a0/a1,-(sp)
1375    
1376     move.w (5*4+6,sp),d0 ;get format word
1377     lsr.w #7,d0 ;get stack frame Id
1378     lsr.w #4,d0
1379     and.w #$001e,d0
1380     move.w (StackFormatTable,pc,d0.w),d0 ; get total stack frame length
1381    
1382     lea (5*4,sp),a0 ;get start of exception stack frame
1383     move.l usp,a1 ;Get user stack pointer
1384     bra 1$
1385    
1386     2$ move.w (a0)+,(a1)+ ; copy additional stack words back to supervisor stack
1387     1$ dbf d0,2$
1388    
1389     move.l (3*4,sp),-(a0) ;copy return address to new top of stack
1390     move.l a0,sp
1391     rts
1392 cebix 1.1
1393     END