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root/cebix/BasiliskII/src/AmigaOS/asm_support.asm
Revision: 1.13
Committed: 2002-06-23T08:27:05Z (22 years ago) by jlachmann
Branch: MAIN
Changes since 1.12: +399 -13 lines
Log Message:
Adapted to OO video scheme; Audio volume/muting/sample rate now settable

File Contents

# User Rev Content
1 cebix 1.1 *
2     * asm_support.asm - AmigaOS utility functions in assembly language
3     *
4 jlachmann 1.13 * Basilisk II (C) 1997-2001 Christian Bauer
5 cebix 1.1 *
6     * This program is free software; you can redistribute it and/or modify
7     * it under the terms of the GNU General Public License as published by
8     * the Free Software Foundation; either version 2 of the License, or
9     * (at your option) any later version.
10     *
11     * This program is distributed in the hope that it will be useful,
12     * but WITHOUT ANY WARRANTY; without even the implied warranty of
13     * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14     * GNU General Public License for more details.
15     *
16     * You should have received a copy of the GNU General Public License
17     * along with this program; if not, write to the Free Software
18     * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19     *
20    
21     INCLUDE "exec/types.i"
22     INCLUDE "exec/macros.i"
23     INCLUDE "exec/memory.i"
24     INCLUDE "exec/tasks.i"
25     INCLUDE "dos/dos.i"
26     INCLUDE "devices/timer.i"
27    
28 jlachmann 1.13 INCLUDE "asmsupp.i"
29    
30 cebix 1.1 XDEF _AtomicAnd
31     XDEF _AtomicOr
32     XDEF _MoveVBR
33 cebix 1.8 XDEF _DisableSuperBypass
34 cebix 1.1 XDEF _Execute68k
35     XDEF _Execute68kTrap
36     XDEF _TrapHandlerAsm
37     XDEF _ExceptionHandlerAsm
38 jlachmann 1.5 XDEF _AsmTriggerNMI
39 cebix 1.1
40     XREF _OldTrapHandler
41     XREF _OldExceptionHandler
42     XREF _IllInstrHandler
43     XREF _PrivViolHandler
44     XREF _EmulatedSR
45     XREF _IRQSigMask
46     XREF _InterruptFlags
47     XREF _MainTask
48     XREF _SysBase
49 cebix 1.2 XREF _quit_emulator
50 cebix 1.1
51 jlachmann 1.13 INFO_LEVEL equ 0
52    
53 cebix 1.1 SECTION text,CODE
54    
55 cebix 1.8 MACHINE 68020
56    
57 jlachmann 1.13 IFGE INFO_LEVEL
58     subSysName: dc.b '+',0
59     ENDIF
60    
61 cebix 1.1 *
62     * Atomic bit operations (don't trust the compiler)
63     *
64    
65     _AtomicAnd move.l 4(sp),a0
66     move.l 8(sp),d0
67     and.l d0,(a0)
68     rts
69    
70     _AtomicOr move.l 4(sp),a0
71     move.l 8(sp),d0
72     or.l d0,(a0)
73     rts
74    
75     *
76     * Move VBR away from 0 if neccessary
77     *
78    
79     _MoveVBR movem.l d0-d1/a0-a1/a5-a6,-(sp)
80     move.l _SysBase,a6
81    
82     lea getvbr,a5 ;VBR at 0?
83     JSRLIB Supervisor
84     tst.l d0
85     bne.s 1$
86    
87     move.l #$400,d0 ;Yes, allocate memory for new table
88     move.l #MEMF_PUBLIC,d1
89     JSRLIB AllocMem
90     tst.l d0
91     beq.s 1$
92    
93     JSRLIB Disable
94    
95     move.l d0,a5 ;Copy old table
96     move.l d0,a1
97     sub.l a0,a0
98     move.l #$400,d0
99     JSRLIB CopyMem
100     JSRLIB CacheClearU
101    
102     move.l a5,d0 ;Set VBR
103     lea setvbr,a5
104     JSRLIB Supervisor
105    
106     JSRLIB Enable
107    
108     1$ movem.l (sp)+,d0-d1/a0-a1/a5-a6
109     rts
110    
111     getvbr movec vbr,d0
112     rte
113    
114     setvbr movec d0,vbr
115     rte
116 cebix 1.8
117     *
118     * Disable 68060 Super Bypass mode
119     *
120    
121     _DisableSuperBypass
122     movem.l d0-d1/a0-a1/a5-a6,-(sp)
123     move.l _SysBase,a6
124    
125     lea dissb,a5
126     JSRLIB Supervisor
127    
128     movem.l (sp)+,d0-d1/a0-a1/a5-a6
129     rts
130    
131     MACHINE 68060
132    
133     dissb movec pcr,d0
134     bset #5,d0
135     movec d0,pcr
136     rte
137    
138     MACHINE 68020
139 cebix 1.1
140     *
141     * Execute 68k subroutine (must be ended with rts)
142     * r->a[7] and r->sr are unused!
143     *
144    
145     ; void Execute68k(uint32 addr, M68kRegisters *r);
146     _Execute68k
147     move.l 4(sp),d0 ;Get arguments
148     move.l 8(sp),a0
149    
150     movem.l d2-d7/a2-a6,-(sp) ;Save registers
151    
152     move.l a0,-(sp) ;Push pointer to M68kRegisters on stack
153     pea 1$ ;Push return address on stack
154     move.l d0,-(sp) ;Push pointer to 68k routine on stack
155     movem.l (a0),d0-d7/a0-a6 ;Load registers from M68kRegisters
156    
157     rts ;Jump into 68k routine
158    
159     1$ move.l a6,-(sp) ;Save a6
160     move.l 4(sp),a6 ;Get pointer to M68kRegisters
161     movem.l d0-d7/a0-a5,(a6) ;Save d0-d7/a0-a5 to M68kRegisters
162     move.l (sp)+,56(a6) ;Save a6 to M68kRegisters
163     addq.l #4,sp ;Remove pointer from stack
164    
165     movem.l (sp)+,d2-d7/a2-a6 ;Restore registers
166     rts
167    
168     *
169     * Execute MacOS 68k trap
170     * r->a[7] and r->sr are unused!
171     *
172    
173     ; void Execute68kTrap(uint16 trap, M68kRegisters *r);
174     _Execute68kTrap
175     move.l 4(sp),d0 ;Get arguments
176     move.l 8(sp),a0
177    
178     movem.l d2-d7/a2-a6,-(sp) ;Save registers
179    
180     move.l a0,-(sp) ;Push pointer to M68kRegisters on stack
181     move.w d0,-(sp) ;Push trap word on stack
182     subq.l #8,sp ;Create fake A-Line exception frame
183     movem.l (a0),d0-d7/a0-a6 ;Load registers from M68kRegisters
184    
185     move.l a2,-(sp) ;Save a2 and d2
186     move.l d2,-(sp)
187     lea 1$,a2 ;a2 points to return address
188     move.w 16(sp),d2 ;Load trap word into d2
189    
190     jmp ([$28.w],10) ;Jump into MacOS A-Line handler
191    
192     1$ move.l a6,-(sp) ;Save a6
193     move.l 6(sp),a6 ;Get pointer to M68kRegisters
194     movem.l d0-d7/a0-a5,(a6) ;Save d0-d7/a0-a5 to M68kRegisters
195     move.l (sp)+,56(a6) ;Save a6 to M68kRegisters
196     addq.l #6,sp ;Remove pointer and trap word from stack
197    
198     movem.l (sp)+,d2-d7/a2-a6 ;Restore registers
199     rts
200    
201     *
202     * Exception handler of main task (for 60Hz interrupts)
203     *
204    
205     _ExceptionHandlerAsm
206     move.l d0,-(sp) ;Save d0
207    
208     and.l #SIGBREAKF_CTRL_C,d0 ;CTRL-C?
209     bne.s 2$
210    
211     move.w _EmulatedSR,d0 ;Interrupts enabled in emulated SR?
212     and.w #$0700,d0
213     bne 1$
214     move.w #$0064,-(sp) ;Yes, fake interrupt stack frame
215     pea 1$
216     move.w _EmulatedSR,d0
217     move.w d0,-(sp)
218 cebix 1.6 or.w #$2100,d0 ;Set interrupt level in SR, enter (virtual) supervisor mode
219 cebix 1.1 move.w d0,_EmulatedSR
220 jlachmann 1.5 move.l $64.w,-(sp) ;Jump to MacOS interrupt handler
221     rts
222 cebix 1.1
223     1$ move.l (sp)+,d0 ;Restore d0
224     rts
225    
226     2$ JSRLIB Forbid ;Waiting for Dos signal?
227     sub.l a1,a1
228     JSRLIB FindTask
229     move.l d0,a0
230     move.l TC_SIGWAIT(a0),d0
231     move.l TC_SIGRECVD(a0),d1
232     JSRLIB Permit
233     btst #SIGB_DOS,d0
234     beq 3$
235     btst #SIGB_DOS,d1
236     bne 4$
237    
238     3$ lea TC_SIZE(a0),a0 ;No, remove pending Dos packets
239     JSRLIB GetMsg
240    
241     move.w _EmulatedSR,d0
242     or.w #$0700,d0 ;Disable all interrupts
243     move.w d0,_EmulatedSR
244     moveq #0,d0 ;Disable all exception signals
245     moveq #-1,d1
246     JSRLIB SetExcept
247 cebix 1.2 jsr _quit_emulator ;CTRL-C, quit emulator
248 cebix 1.1 4$ move.l (sp)+,d0
249     rts
250    
251     *
252     * Trap handler of main task
253     *
254    
255 jlachmann 1.5 _TrapHandlerAsm:
256 jlachmann 1.13 IFEQ INFO_LEVEL-1002
257     move.w ([6,a0]),-(sp)
258     move.w #0,-(sp)
259     move.l (4+6,a0),-(sp)
260     PUTMSG 0,'%s/TrapHandlerAsm: addr=%08lx opcode=%04lx'
261     lea (2*4,sp),sp
262     ENDC
263    
264 jlachmann 1.5 cmp.l #4,(sp) ;Illegal instruction?
265 cebix 1.1 beq.s doillinstr
266     cmp.l #10,(sp) ;A-Line exception?
267     beq.s doaline
268     cmp.l #8,(sp) ;Privilege violation?
269     beq.s doprivviol
270 jlachmann 1.13
271 jlachmann 1.5 cmp.l #9,(sp) ;Trace?
272     beq dotrace
273     cmp.l #3,(sp) ;Illegal Address?
274     beq.s doilladdr
275 jlachmann 1.13 cmp.l #11,(sp) ;F-Line exception
276     beq.s dofline
277 jlachmann 1.5
278     cmp.l #32,(sp)
279     blt 1$
280     cmp.l #47,(sp)
281     ble doTrapXX ; Vector 32-47 : TRAP #0 - 15 Instruction Vectors
282    
283 jlachmann 1.13 1$:
284     cmp.l #48,(sp)
285     blt 2$
286     cmp.l #55,(sp)
287     ble doTrapFPU
288     2$:
289     IFEQ INFO_LEVEL-1009
290     PUTMSG 0,'%s/TrapHandlerAsm: stack=%08lx %08lx %08lx %08lx'
291     ENDC
292    
293     move.l _OldTrapHandler,-(sp) ;No, jump to old trap handler
294 jlachmann 1.5 rts
295    
296     *
297     * TRAP #0 - 15 Instruction Vectors
298     *
299    
300 jlachmann 1.13 doTrapXX:
301     IFEQ INFO_LEVEL-1009
302     PUTMSG 0,'%s/doTrapXX: stack=%08lx %08lx %08lx %08lx'
303     ENDC
304    
305     movem.l a0/d0,-(sp) ;Save a0,d0
306     move.l (2*4,sp),d0 ;vector number 32-47
307    
308 jlachmann 1.5 move.l usp,a0 ;Get user stack pointer
309 jlachmann 1.13 move.l (4*4,sp),-(a0) ;Copy 4-word stack frame to user stack
310     move.l (3*4,sp),-(a0)
311     move.l a0,usp ;Update USP
312     or.w #$2000,(a0) ;set Supervisor bit in SR
313    
314     lsl.l #2,d0 ;convert vector number to vector offset
315     move.l d0,a0
316     move.l (a0),d0 ;get mac trap vector
317    
318     move.l usp,a0 ;Get user stack pointer
319     move.l d0,-(a0) ;store vector offset as return address
320 jlachmann 1.5 move.l a0,usp ;Update USP
321    
322 jlachmann 1.13 movem.l (sp)+,a0/d0 ;Restore a0,d0
323 jlachmann 1.5 addq.l #4*2,sp ;Remove exception frame from supervisor stack
324 jlachmann 1.13
325 jlachmann 1.5 andi #$d8ff,sr ;Switch to user mode, enable interrupts
326 jlachmann 1.13 rts
327    
328    
329     *
330     * FPU Exception Instruction Vectors
331     *
332 cebix 1.1
333 jlachmann 1.13 doTrapFPU:
334     move.l d0,(sp)
335     fmove.l fpcr,d0
336     and.w #$00ff,d0 ;disable FPU exceptions
337     fmove.l d0,fpcr
338     move.l (sp)+,d0 ;Restore d0
339     rte
340 cebix 1.1
341 jlachmann 1.5
342     *
343     * trace Vector
344     *
345    
346 jlachmann 1.13 dotrace
347     IFEQ INFO_LEVEL-1009
348     PUTMSG 0,'%s/dotrace: stack=%08lx %08lx %08lx %08lx'
349     ENDC
350 jlachmann 1.5
351 jlachmann 1.13 move.l a0,(sp) ;Save a0
352 jlachmann 1.5 move.l usp,a0 ;Get user stack pointer
353 jlachmann 1.13
354     IFEQ INFO_LEVEL-1009
355     move.l (12,a0),-(sp)
356     move.l (8,a0),-(sp)
357     move.l (4,a0),-(sp)
358     move.l (0,a0),-(sp)
359     move.l a0,-(sp)
360     move.l a7,-(sp)
361     PUTMSG 0,'%s/dotrace: sp=%08lx usp=%08lx (%08lx %08lx %08lx %08lx)'
362     lea (6*4,sp),sp
363     ENDC
364    
365 jlachmann 1.5 move.l 3*4(sp),-(a0) ;Copy 6-word stack frame to user stack
366     move.l 2*4(sp),-(a0)
367     move.l 1*4(sp),-(a0)
368     move.l a0,usp ;Update USP
369 jlachmann 1.13 or.w #$2000,(a0) ;set Supervisor bit in SR
370 jlachmann 1.5 move.l (sp)+,a0 ;Restore a0
371    
372     lea 6*2(sp),sp ;Remove exception frame from supervisor stack
373     andi #$18ff,sr ;Switch to user mode, enable interrupts, disable trace
374    
375     move.l $24.w,-(sp) ;Jump to MacOS exception handler
376     rts
377    
378    
379 cebix 1.1 *
380     * A-Line handler: call MacOS A-Line handler
381     *
382    
383     doaline move.l a0,(sp) ;Save a0
384     move.l usp,a0 ;Get user stack pointer
385     move.l 8(sp),-(a0) ;Copy stack frame to user stack
386     move.l 4(sp),-(a0)
387     move.l a0,usp ;Update USP
388 jlachmann 1.13
389     or.w #$2000,(a0) ;set Supervisor bit in SR
390 cebix 1.1 move.l (sp)+,a0 ;Restore a0
391    
392     addq.l #8,sp ;Remove exception frame from supervisor stack
393     andi #$d8ff,sr ;Switch to user mode, enable interrupts
394    
395 jlachmann 1.13 and.w #$f8ff,_EmulatedSR ;enable interrupts in EmulatedSR
396 jlachmann 1.11
397 cebix 1.1 move.l $28.w,-(sp) ;Jump to MacOS exception handler
398     rts
399    
400 jlachmann 1.5 *
401 jlachmann 1.13 * F-Line handler: call F-Line exception handler
402     *
403    
404     dofline move.l a0,(sp) ;Save a0
405     move.l usp,a0 ;Get user stack pointer
406     move.l 8(sp),-(a0) ;Copy stack frame to user stack
407     move.l 4(sp),-(a0)
408     move.l a0,usp ;Update USP
409     or.w #$2000,(a0) ;set Supervisor bit in SR
410     move.l (sp)+,a0 ;Restore a0
411    
412     addq.l #8,sp ;Remove exception frame from supervisor stack
413     andi #$d8ff,sr ;Switch to user mode, enable interrupts
414    
415     and.w #$f8ff,_EmulatedSR ;enable interrupts in EmulatedSR
416    
417     move.l $2c.w,-(sp) ;Jump to MacOS exception handler
418     rts
419    
420     *
421 jlachmann 1.5 * Illegal address handler
422     *
423    
424 jlachmann 1.13 doilladdr:
425     IFEQ INFO_LEVEL-1009
426     PUTMSG 0,'%s/doilladdr: stack=%08lx %08lx %08lx %08lx'
427     ENDC
428    
429     move.l a0,(sp) ;Save a0
430 jlachmann 1.5
431     move.l usp,a0 ;Get user stack pointer
432     move.l 3*4(sp),-(a0) ;Copy 6-word stack frame to user stack
433     move.l 2*4(sp),-(a0)
434     move.l 1*4(sp),-(a0)
435     move.l a0,usp ;Update USP
436 jlachmann 1.13 or.w #$2000,(a0) ;set Supervisor bit in SR
437 jlachmann 1.5 move.l (sp)+,a0 ;Restore a0
438    
439     lea 6*2(sp),sp ;Remove exception frame from supervisor stack
440     andi #$d8ff,sr ;Switch to user mode, enable interrupts
441    
442     move.l $0c.w,-(sp) ;Jump to MacOS exception handler
443     rts
444    
445    
446 cebix 1.1 *
447     * Illegal instruction handler: call IllInstrHandler() (which calls EmulOp())
448     * to execute extended opcodes (see emul_op.h)
449     *
450    
451 cebix 1.7 doillinstr movem.l a0/d0,-(sp)
452 jlachmann 1.5 move.w ([6+2*4,sp]),d0
453     and.w #$ff00,d0
454     cmp.w #$7100,d0
455 jlachmann 1.13
456     IFEQ INFO_LEVEL-1009
457     move.l d0,-(sp)
458     PUTMSG 0,'%s/doillinst: d0=%08lx stack=%08lx %08lx %08lx %08lx'
459     lea (1*4,sp),sp
460     ENDC
461 jlachmann 1.5 movem.l (sp)+,a0/d0
462     beq 1$
463    
464     move.l a0,(sp) ;Save a0
465     move.l usp,a0 ;Get user stack pointer
466     move.l 8(sp),-(a0) ;Copy stack frame to user stack
467     move.l 4(sp),-(a0)
468     move.l a0,usp ;Update USP
469 jlachmann 1.13 or.w #$2000,(a0) ;set Supervisor bit in SR
470 jlachmann 1.5 move.l (sp)+,a0 ;Restore a0
471    
472     add.w #3*4,sp ;Remove exception frame from supervisor stack
473     andi #$d8ff,sr ;Switch to user mode, enable interrupts
474    
475     move.l $10.w,-(sp) ;Jump to MacOS exception handler
476     rts
477    
478 jlachmann 1.13 1$:
479     move.l a6,(sp) ;Save a6
480 cebix 1.1 move.l usp,a6 ;Get user stack pointer
481    
482     move.l a6,-10(a6) ;Push USP (a7)
483     move.l 6(sp),-(a6) ;Push PC
484     move.w 4(sp),-(a6) ;Push SR
485     subq.l #4,a6 ;Skip saved USP
486     move.l (sp),-(a6) ;Push old a6
487     movem.l d0-d7/a0-a5,-(a6) ;Push remaining registers
488     move.l a6,usp ;Update USP
489    
490     add.w #12,sp ;Remove exception frame from supervisor stack
491     andi #$d8ff,sr ;Switch to user mode, enable interrupts
492    
493     move.l a6,-(sp) ;Jump to IllInstrHandler() in main.cpp
494     jsr _IllInstrHandler
495     addq.l #4,sp
496    
497     movem.l (sp)+,d0-d7/a0-a6 ;Restore registers
498     addq.l #4,sp ;Skip saved USP (!!)
499     rtr ;Return from exception
500    
501     *
502     * Privilege violation handler: MacOS runs in supervisor mode,
503     * so we have to emulate certain privileged instructions
504     *
505    
506     doprivviol move.l d0,(sp) ;Save d0
507     move.w ([6,sp]),d0 ;Get instruction word
508    
509 jlachmann 1.13 IFEQ INFO_LEVEL-1001
510     move.w ([6,a0]),-(sp)
511     move.w #0,-(sp)
512     PUTMSG 0,'%s/doprivviol: opcode=%04lx'
513     lea (1*4,sp),sp
514     ENDC
515    
516 cebix 1.1 cmp.w #$40e7,d0 ;move sr,-(sp)?
517     beq pushsr
518     cmp.w #$46df,d0 ;move (sp)+,sr?
519     beq popsr
520    
521     cmp.w #$007c,d0 ;ori #xxxx,sr?
522     beq orisr
523     cmp.w #$027c,d0 ;andi #xxxx,sr?
524     beq andisr
525    
526     cmp.w #$46fc,d0 ;move #xxxx,sr?
527     beq movetosrimm
528    
529     cmp.w #$46ef,d0 ;move (xxxx,sp),sr?
530     beq movetosrsprel
531     cmp.w #$46d8,d0 ;move (a0)+,sr?
532     beq movetosra0p
533     cmp.w #$46d9,d0 ;move (a1)+,sr?
534     beq movetosra1p
535    
536     cmp.w #$40f8,d0 ;move sr,xxxx.w?
537     beq movefromsrabs
538     cmp.w #$40d0,d0 ;move sr,(a0)?
539     beq movefromsra0
540     cmp.w #$40d7,d0 ;move sr,(sp)?
541 cebix 1.6 beq movefromsrsp
542 cebix 1.1
543     cmp.w #$f327,d0 ;fsave -(sp)?
544     beq fsavepush
545     cmp.w #$f35f,d0 ;frestore (sp)+?
546     beq frestorepop
547 jlachmann 1.5 cmp.w #$f32d,d0 ;fsave xxx(a5) ?
548     beq fsavea5
549     cmp.w #$f36d,d0 ;frestore xxx(a5) ?
550     beq frestorea5
551 cebix 1.1
552     cmp.w #$4e73,d0 ;rte?
553     beq pvrte
554    
555     cmp.w #$40c0,d0 ;move sr,d0?
556     beq movefromsrd0
557     cmp.w #$40c1,d0 ;move sr,d1?
558     beq movefromsrd1
559     cmp.w #$40c2,d0 ;move sr,d2?
560     beq movefromsrd2
561     cmp.w #$40c3,d0 ;move sr,d3?
562     beq movefromsrd3
563     cmp.w #$40c4,d0 ;move sr,d4?
564     beq movefromsrd4
565     cmp.w #$40c5,d0 ;move sr,d5?
566     beq movefromsrd5
567     cmp.w #$40c6,d0 ;move sr,d6?
568     beq movefromsrd6
569     cmp.w #$40c7,d0 ;move sr,d7?
570     beq movefromsrd7
571    
572     cmp.w #$46c0,d0 ;move d0,sr?
573     beq movetosrd0
574     cmp.w #$46c1,d0 ;move d1,sr?
575     beq movetosrd1
576     cmp.w #$46c2,d0 ;move d2,sr?
577     beq movetosrd2
578     cmp.w #$46c3,d0 ;move d3,sr?
579     beq movetosrd3
580     cmp.w #$46c4,d0 ;move d4,sr?
581     beq movetosrd4
582     cmp.w #$46c5,d0 ;move d5,sr?
583     beq movetosrd5
584     cmp.w #$46c6,d0 ;move d6,sr?
585     beq movetosrd6
586     cmp.w #$46c7,d0 ;move d7,sr?
587     beq movetosrd7
588    
589     cmp.w #$4e7a,d0 ;movec cr,x?
590     beq movecfromcr
591     cmp.w #$4e7b,d0 ;movec x,cr?
592     beq movectocr
593    
594     cmp.w #$f478,d0 ;cpusha dc?
595     beq cpushadc
596     cmp.w #$f4f8,d0 ;cpusha dc/ic?
597     beq cpushadcic
598    
599 jlachmann 1.5 cmp.w #$4e69,d0 ;move usp,a1
600     beq moveuspa1
601     cmp.w #$4e68,d0 ;move usp,a0
602     beq moveuspa0
603    
604     cmp.w #$4e61,d0 ;move a1,usp
605     beq moved1usp
606    
607 cebix 1.1 pv_unhandled move.l (sp),d0 ;Unhandled instruction, jump to handler in main.cpp
608     move.l a6,(sp) ;Save a6
609     move.l usp,a6 ;Get user stack pointer
610    
611     move.l a6,-10(a6) ;Push USP (a7)
612     move.l 6(sp),-(a6) ;Push PC
613     move.w 4(sp),-(a6) ;Push SR
614     subq.l #4,a6 ;Skip saved USP
615     move.l (sp),-(a6) ;Push old a6
616     movem.l d0-d7/a0-a5,-(a6) ;Push remaining registers
617     move.l a6,usp ;Update USP
618    
619     add.w #12,sp ;Remove exception frame from supervisor stack
620     andi #$d8ff,sr ;Switch to user mode, enable interrupts
621    
622     move.l a6,-(sp) ;Jump to PrivViolHandler() in main.cpp
623     jsr _PrivViolHandler
624     addq.l #4,sp
625    
626     movem.l (sp)+,d0-d7/a0-a6 ;Restore registers
627     addq.l #4,sp ;Skip saved USP
628     rtr ;Return from exception
629    
630     ; move sr,-(sp)
631     pushsr move.l a0,-(sp) ;Save a0
632     move.l usp,a0 ;Get user stack pointer
633     move.w 8(sp),d0 ;Get CCR from exception stack frame
634     or.w _EmulatedSR,d0 ;Add emulated supervisor bits
635     move.w d0,-(a0) ;Store SR on user stack
636     move.l a0,usp ;Update USP
637     move.l (sp)+,a0 ;Restore a0
638     move.l (sp)+,d0 ;Restore d0
639     addq.l #2,2(sp) ;Skip instruction
640 jlachmann 1.13
641     IFEQ INFO_LEVEL-1001
642     move.l (4),-(sp)
643     PUTMSG 0,'%s/doprivviol END: Execbase=%08lx'
644     lea (1*4,sp),sp
645     ENDC
646 cebix 1.1 rte
647    
648     ; move (sp)+,sr
649     popsr move.l a0,-(sp) ;Save a0
650     move.l usp,a0 ;Get user stack pointer
651     move.w (a0)+,d0 ;Get SR from user stack
652     move.w d0,8(sp) ;Store into CCR on exception stack frame
653     and.w #$00ff,8(sp)
654 jlachmann 1.5 and.w #$e700,d0 ;Extract supervisor bits
655 cebix 1.1 move.w d0,_EmulatedSR ;And save them
656    
657     and.w #$0700,d0 ;Rethrow exception if interrupts are pending and reenabled
658     bne 1$
659     tst.l _InterruptFlags
660     beq 1$
661     movem.l d0-d1/a0-a1/a6,-(sp)
662     move.l _SysBase,a6
663     move.l _MainTask,a1
664     move.l _IRQSigMask,d0
665     JSRLIB Signal
666     movem.l (sp)+,d0-d1/a0-a1/a6
667     1$
668     move.l a0,usp ;Update USP
669     move.l (sp)+,a0 ;Restore a0
670     move.l (sp)+,d0 ;Restore d0
671     addq.l #2,2(sp) ;Skip instruction
672 jlachmann 1.13
673     IFEQ INFO_LEVEL-1001
674     move.l (4),-(sp)
675     PUTMSG 0,'%s/doprivviol END: Execbase=%08lx'
676     lea (1*4,sp),sp
677     ENDC
678 cebix 1.1 rte
679    
680     ; ori #xxxx,sr
681     orisr move.w 4(sp),d0 ;Get CCR from stack
682     or.w _EmulatedSR,d0 ;Add emulated supervisor bits
683     or.w ([6,sp],2),d0 ;Or with immediate value
684     move.w d0,4(sp) ;Store into CCR on stack
685     and.w #$00ff,4(sp)
686 jlachmann 1.5 and.w #$e700,d0 ;Extract supervisor bits
687 cebix 1.1 move.w d0,_EmulatedSR ;And save them
688     move.l (sp)+,d0 ;Restore d0
689     addq.l #4,2(sp) ;Skip instruction
690 jlachmann 1.13
691     IFEQ INFO_LEVEL-1001
692     move.l (4),-(sp)
693     PUTMSG 0,'%s/doprivviol END: Execbase=%08lx'
694     lea (1*4,sp),sp
695     ENDC
696 cebix 1.1 rte
697    
698     ; andi #xxxx,sr
699     andisr move.w 4(sp),d0 ;Get CCR from stack
700     or.w _EmulatedSR,d0 ;Add emulated supervisor bits
701     and.w ([6,sp],2),d0 ;And with immediate value
702     storesr4 move.w d0,4(sp) ;Store into CCR on stack
703     and.w #$00ff,4(sp)
704 jlachmann 1.5 and.w #$e700,d0 ;Extract supervisor bits
705 cebix 1.1 move.w d0,_EmulatedSR ;And save them
706    
707     and.w #$0700,d0 ;Rethrow exception if interrupts are pending and reenabled
708     bne.s 1$
709     tst.l _InterruptFlags
710     beq.s 1$
711     movem.l d0-d1/a0-a1/a6,-(sp)
712     move.l _SysBase,a6
713     move.l _MainTask,a1
714     move.l _IRQSigMask,d0
715     JSRLIB Signal
716     movem.l (sp)+,d0-d1/a0-a1/a6
717     1$ move.l (sp)+,d0 ;Restore d0
718     addq.l #4,2(sp) ;Skip instruction
719 jlachmann 1.13
720     IFEQ INFO_LEVEL-1001
721     move.l (4),-(sp)
722     PUTMSG 0,'%s/doprivviol END: Execbase=%08lx'
723     lea (1*4,sp),sp
724     ENDC
725 cebix 1.1 rte
726    
727     ; move #xxxx,sr
728     movetosrimm move.w ([6,sp],2),d0 ;Get immediate value
729     bra.s storesr4
730    
731     ; move (xxxx,sp),sr
732     movetosrsprel move.l a0,-(sp) ;Save a0
733     move.l usp,a0 ;Get user stack pointer
734     move.w ([10,sp],2),d0 ;Get offset
735     move.w (a0,d0.w),d0 ;Read word
736     move.l (sp)+,a0 ;Restore a0
737     bra.s storesr4
738    
739     ; move (a0)+,sr
740     movetosra0p move.w (a0)+,d0 ;Read word
741     bra storesr2
742    
743     ; move (a1)+,sr
744     movetosra1p move.w (a1)+,d0 ;Read word
745     bra storesr2
746    
747     ; move sr,xxxx.w
748     movefromsrabs move.l a0,-(sp) ;Save a0
749     move.w ([10,sp],2),a0 ;Get address
750     move.w 8(sp),d0 ;Get CCR
751     or.w _EmulatedSR,d0 ;Add emulated supervisor bits
752     move.w d0,(a0) ;Store SR
753     move.l (sp)+,a0 ;Restore a0
754     move.l (sp)+,d0 ;Restore d0
755     addq.l #4,2(sp) ;Skip instruction
756 jlachmann 1.13
757     IFEQ INFO_LEVEL-1001
758     move.l (4),-(sp)
759     PUTMSG 0,'%s/doprivviol END: Execbase=%08lx'
760     lea (1*4,sp),sp
761     ENDC
762 cebix 1.1 rte
763    
764     ; move sr,(a0)
765     movefromsra0 move.w 4(sp),d0 ;Get CCR
766     or.w _EmulatedSR,d0 ;Add emulated supervisor bits
767     move.w d0,(a0) ;Store SR
768     move.l (sp)+,d0 ;Restore d0
769     addq.l #2,2(sp) ;Skip instruction
770 jlachmann 1.13
771     IFEQ INFO_LEVEL-1001
772     move.l (4),-(sp)
773     PUTMSG 0,'%s/doprivviol END: Execbase=%08lx'
774     lea (1*4,sp),sp
775     ENDC
776 cebix 1.1 rte
777    
778     ; move sr,(sp)
779     movefromsrsp move.l a0,-(sp) ;Save a0
780     move.l usp,a0 ;Get user stack pointer
781     move.w 8(sp),d0 ;Get CCR
782     or.w _EmulatedSR,d0 ;Add emulated supervisor bits
783     move.w d0,(a0) ;Store SR
784     move.l (sp)+,a0 ;Restore a0
785     move.l (sp)+,d0 ;Restore d0
786     addq.l #2,2(sp) ;Skip instruction
787 jlachmann 1.13
788     IFEQ INFO_LEVEL-1001
789     move.l (4),-(sp)
790     PUTMSG 0,'%s/doprivviol END: Execbase=%08lx'
791     lea (1*4,sp),sp
792     ENDC
793 cebix 1.1 rte
794    
795     ; fsave -(sp)
796     fsavepush move.l (sp),d0 ;Restore d0
797     move.l a0,(sp) ;Save a0
798     move.l usp,a0 ;Get user stack pointer
799 cebix 1.10 move.l #$41000000,-(a0) ;Push idle frame
800 cebix 1.1 move.l a0,usp ;Update USP
801     move.l (sp)+,a0 ;Restore a0
802     addq.l #2,2(sp) ;Skip instruction
803 jlachmann 1.13
804     IFEQ INFO_LEVEL-1001
805     move.l (4),-(sp)
806     PUTMSG 0,'%s/doprivviol END: Execbase=%08lx'
807     lea (1*4,sp),sp
808     ENDC
809 cebix 1.1 rte
810    
811 cebix 1.10 ; fsave xxx(a5)
812     fsavea5 move.l (sp),d0 ;Restore d0
813     move.l a0,(sp) ;Save a0
814     move.l a5,a0 ;Get base register
815     add.w ([6,sp],2),a0 ;Add offset to base register
816     move.l #$41000000,(a0) ;Push idle frame
817     move.l (sp)+,a0 ;Restore a0
818     addq.l #4,2(sp) ;Skip instruction
819 jlachmann 1.13
820     IFEQ INFO_LEVEL-1001
821     move.l (4),-(sp)
822     PUTMSG 0,'%s/doprivviol END: Execbase=%08lx'
823     lea (1*4,sp),sp
824     ENDC
825 cebix 1.10 rte
826    
827 cebix 1.1 ; frestore (sp)+
828     frestorepop move.l (sp),d0 ;Restore d0
829     move.l a0,(sp) ;Save a0
830     move.l usp,a0 ;Get user stack pointer
831 cebix 1.10 addq.l #4,a0 ;Nothing to do...
832 cebix 1.1 move.l a0,usp ;Update USP
833     move.l (sp)+,a0 ;Restore a0
834     addq.l #2,2(sp) ;Skip instruction
835 jlachmann 1.13
836     IFEQ INFO_LEVEL-1001
837     move.l (4),-(sp)
838     PUTMSG 0,'%s/doprivviol END: Execbase=%08lx'
839     lea (1*4,sp),sp
840     ENDC
841 cebix 1.1 rte
842    
843 cebix 1.10 ; frestore xxx(a5)
844 jlachmann 1.5 frestorea5 move.l (sp),d0 ;Restore d0
845     move.l a0,(sp) ;Save a0
846     move.l (sp)+,a0 ;Restore a0
847     addq.l #4,2(sp) ;Skip instruction
848 jlachmann 1.13
849     IFEQ INFO_LEVEL-1001
850     move.l (4),-(sp)
851     PUTMSG 0,'%s/doprivviol END: Execbase=%08lx'
852     lea (1*4,sp),sp
853     ENDC
854 jlachmann 1.5 rte
855    
856     ; rte
857     pvrte movem.l a0/a1,-(sp) ;Save a0 and a1
858 cebix 1.1 move.l usp,a0 ;Get user stack pointer
859 jlachmann 1.5
860 cebix 1.1 move.w (a0)+,d0 ;Get SR from user stack
861 jlachmann 1.5 move.w d0,8+4(sp) ;Store into CCR on exception stack frame
862     and.w #$c0ff,8+4(sp)
863     and.w #$e700,d0 ;Extract supervisor bits
864 cebix 1.1 move.w d0,_EmulatedSR ;And save them
865 jlachmann 1.5 move.l (a0)+,10+4(sp) ;Store return address in exception stack frame
866    
867     move.w (a0)+,d0 ;get format word
868     lsr.w #7,d0 ;get stack frame Id
869     lsr.w #4,d0
870     and.w #$001e,d0
871     move.w (StackFormatTable,pc,d0.w),d0 ; get total stack frame length
872     subq.w #4,d0 ; count only extra words
873     lea 16+4(sp),a1 ; destination address (in supervisor stack)
874     bra 1$
875    
876 cebix 1.7 2$ move.w (a0)+,(a1)+ ; copy additional stack words back to supervisor stack
877     1$ dbf d0,2$
878 jlachmann 1.5
879 cebix 1.1 move.l a0,usp ;Update USP
880 jlachmann 1.5 movem.l (sp)+,a0/a1 ;Restore a0 and a1
881 cebix 1.1 move.l (sp)+,d0 ;Restore d0
882 jlachmann 1.13
883     IFEQ INFO_LEVEL-1001
884     move.l (4),-(sp)
885     PUTMSG 0,'%s/doprivviol END: Execbase=%08lx'
886     lea (1*4,sp),sp
887     ENDC
888 cebix 1.1 rte
889    
890 jlachmann 1.5 ; sizes of exceptions stack frames
891     StackFormatTable:
892     dc.w 4 ; Four-word stack frame, format $0
893     dc.w 4 ; Throwaway four-word stack frame, format $1
894     dc.w 6 ; Six-word stack frame, format $2
895     dc.w 6 ; MC68040 floating-point post-instruction stack frame, format $3
896     dc.w 8 ; MC68EC040 and MC68LC040 floating-point unimplemented stack frame, format $4
897     dc.w 4 ; Format $5
898     dc.w 4 ; Format $6
899     dc.w 30 ; MC68040 access error stack frame, Format $7
900     dc.w 29 ; MC68010 bus and address error stack frame, format $8
901     dc.w 10 ; MC68020 and MC68030 coprocessor mid-instruction stack frame, format $9
902     dc.w 16 ; MC68020 and MC68030 short bus cycle stack frame, format $a
903     dc.w 46 ; MC68020 and MC68030 long bus cycle stack frame, format $b
904     dc.w 12 ; CPU32 bus error for prefetches and operands stack frame, format $c
905     dc.w 4 ; Format $d
906     dc.w 4 ; Format $e
907     dc.w 4 ; Format $f
908    
909 cebix 1.1 ; move sr,dx
910     movefromsrd0 addq.l #4,sp ;Skip saved d0
911     moveq #0,d0
912     move.w (sp),d0 ;Get CCR
913     or.w _EmulatedSR,d0 ;Add emulated supervisor bits
914     addq.l #2,2(sp) ;Skip instruction
915 jlachmann 1.13
916     IFEQ INFO_LEVEL-1001
917     move.l (4),-(sp)
918     PUTMSG 0,'%s/doprivviol END: Execbase=%08lx'
919     lea (1*4,sp),sp
920     ENDC
921 cebix 1.1 rte
922    
923     movefromsrd1 move.l (sp)+,d0
924     moveq #0,d1
925     move.w (sp),d1
926     or.w _EmulatedSR,d1
927     addq.l #2,2(sp)
928 jlachmann 1.13
929     IFEQ INFO_LEVEL-1001
930     move.l (4),-(sp)
931     PUTMSG 0,'%s/doprivviol END: Execbase=%08lx'
932     lea (1*4,sp),sp
933     ENDC
934 cebix 1.1 rte
935    
936     movefromsrd2 move.l (sp)+,d0
937     moveq #0,d2
938     move.w (sp),d2
939     or.w _EmulatedSR,d2
940     addq.l #2,2(sp)
941 jlachmann 1.13
942     IFEQ INFO_LEVEL-1001
943     move.l (4),-(sp)
944     PUTMSG 0,'%s/doprivviol END: Execbase=%08lx'
945     lea (1*4,sp),sp
946     ENDC
947 cebix 1.1 rte
948    
949     movefromsrd3 move.l (sp)+,d0
950     moveq #0,d3
951     move.w (sp),d3
952     or.w _EmulatedSR,d3
953     addq.l #2,2(sp)
954 jlachmann 1.13
955     IFEQ INFO_LEVEL-1001
956     move.l (4),-(sp)
957     PUTMSG 0,'%s/doprivviol END: Execbase=%08lx'
958     lea (1*4,sp),sp
959     ENDC
960 cebix 1.1 rte
961    
962     movefromsrd4 move.l (sp)+,d0
963     moveq #0,d4
964     move.w (sp),d4
965     or.w _EmulatedSR,d4
966     addq.l #2,2(sp)
967 jlachmann 1.13
968     IFEQ INFO_LEVEL-1001
969     move.l (4),-(sp)
970     PUTMSG 0,'%s/doprivviol END: Execbase=%08lx'
971     lea (1*4,sp),sp
972     ENDC
973 cebix 1.1 rte
974    
975     movefromsrd5 move.l (sp)+,d0
976     moveq #0,d5
977     move.w (sp),d5
978     or.w _EmulatedSR,d5
979     addq.l #2,2(sp)
980 jlachmann 1.13
981     IFEQ INFO_LEVEL-1001
982     move.l (4),-(sp)
983     PUTMSG 0,'%s/doprivviol END: Execbase=%08lx'
984     lea (1*4,sp),sp
985     ENDC
986 cebix 1.1 rte
987    
988     movefromsrd6 move.l (sp)+,d0
989     moveq #0,d6
990     move.w (sp),d6
991     or.w _EmulatedSR,d6
992     addq.l #2,2(sp)
993 jlachmann 1.13
994     IFEQ INFO_LEVEL-1001
995     move.l (4),-(sp)
996     PUTMSG 0,'%s/doprivviol END: Execbase=%08lx'
997     lea (1*4,sp),sp
998     ENDC
999 cebix 1.1 rte
1000    
1001     movefromsrd7 move.l (sp)+,d0
1002     moveq #0,d7
1003     move.w (sp),d7
1004     or.w _EmulatedSR,d7
1005     addq.l #2,2(sp)
1006 jlachmann 1.13
1007     IFEQ INFO_LEVEL-1001
1008     move.l (4),-(sp)
1009     PUTMSG 0,'%s/doprivviol END: Execbase=%08lx'
1010     lea (1*4,sp),sp
1011     ENDC
1012 cebix 1.1 rte
1013    
1014     ; move dx,sr
1015     movetosrd0 move.l (sp),d0
1016     storesr2 move.w d0,4(sp)
1017     and.w #$00ff,4(sp)
1018 jlachmann 1.5 and.w #$e700,d0
1019 cebix 1.1 move.w d0,_EmulatedSR
1020    
1021     and.w #$0700,d0 ;Rethrow exception if interrupts are pending and reenabled
1022     bne.s 1$
1023     tst.l _InterruptFlags
1024     beq.s 1$
1025     movem.l d0-d1/a0-a1/a6,-(sp)
1026     move.l _SysBase,a6
1027     move.l _MainTask,a1
1028     move.l _IRQSigMask,d0
1029     JSRLIB Signal
1030     movem.l (sp)+,d0-d1/a0-a1/a6
1031     1$ move.l (sp)+,d0
1032     addq.l #2,2(sp)
1033 jlachmann 1.13
1034     IFEQ INFO_LEVEL-1001
1035     move.l (4),-(sp)
1036     PUTMSG 0,'%s/doprivviol END: Execbase=%08lx'
1037     lea (1*4,sp),sp
1038     ENDC
1039 cebix 1.1 rte
1040    
1041     movetosrd1 move.l d1,d0
1042     bra.s storesr2
1043    
1044     movetosrd2 move.l d2,d0
1045     bra.s storesr2
1046    
1047     movetosrd3 move.l d3,d0
1048     bra.s storesr2
1049    
1050     movetosrd4 move.l d4,d0
1051     bra.s storesr2
1052    
1053     movetosrd5 move.l d5,d0
1054     bra.s storesr2
1055    
1056     movetosrd6 move.l d6,d0
1057     bra.s storesr2
1058    
1059     movetosrd7 move.l d7,d0
1060     bra.s storesr2
1061    
1062     ; movec cr,x
1063     movecfromcr move.w ([6,sp],2),d0 ;Get next instruction word
1064    
1065     cmp.w #$8801,d0 ;movec vbr,a0?
1066     beq.s movecvbra0
1067     cmp.w #$9801,d0 ;movec vbr,a1?
1068     beq.s movecvbra1
1069 jlachmann 1.13 cmp.w #$A801,d0 ;movec vbr,a2?
1070     beq.s movecvbra2
1071 jlachmann 1.5 cmp.w #$1801,d0 ;movec vbr,d1?
1072     beq movecvbrd1
1073 cebix 1.1 cmp.w #$0002,d0 ;movec cacr,d0?
1074     beq.s moveccacrd0
1075     cmp.w #$1002,d0 ;movec cacr,d1?
1076     beq.s moveccacrd1
1077     cmp.w #$0003,d0 ;movec tc,d0?
1078     beq.s movectcd0
1079     cmp.w #$1003,d0 ;movec tc,d1?
1080     beq.s movectcd1
1081 cebix 1.6 cmp.w #$1000,d0 ;movec sfc,d1?
1082 jlachmann 1.5 beq movecsfcd1
1083 cebix 1.6 cmp.w #$1001,d0 ;movec dfc,d1?
1084 jlachmann 1.5 beq movecdfcd1
1085 cebix 1.6 cmp.w #$0806,d0 ;movec urp,d0?
1086 jlachmann 1.5 beq movecurpd0
1087 cebix 1.6 cmp.w #$0807,d0 ;movec srp,d0?
1088 jlachmann 1.5 beq.s movecsrpd0
1089 cebix 1.6 cmp.w #$0004,d0 ;movec itt0,d0
1090 jlachmann 1.5 beq.s movecitt0d0
1091 cebix 1.6 cmp.w #$0005,d0 ;movec itt1,d0
1092 jlachmann 1.5 beq.s movecitt1d0
1093 cebix 1.6 cmp.w #$0006,d0 ;movec dtt0,d0
1094 jlachmann 1.5 beq.s movecdtt0d0
1095 cebix 1.6 cmp.w #$0007,d0 ;movec dtt1,d0
1096 jlachmann 1.5 beq.s movecdtt1d0
1097 cebix 1.1
1098     bra pv_unhandled
1099    
1100     ; movec cacr,d0
1101     moveccacrd0 move.l (sp)+,d0
1102     move.l #$3111,d0 ;All caches and bursts on
1103     addq.l #4,2(sp)
1104 jlachmann 1.13
1105     IFEQ INFO_LEVEL-1001
1106     move.l (4),-(sp)
1107     PUTMSG 0,'%s/doprivviol END: Execbase=%08lx'
1108     lea (1*4,sp),sp
1109     ENDC
1110 cebix 1.1 rte
1111    
1112     ; movec cacr,d1
1113     moveccacrd1 move.l (sp)+,d0
1114     move.l #$3111,d1 ;All caches and bursts on
1115     addq.l #4,2(sp)
1116 jlachmann 1.13
1117     IFEQ INFO_LEVEL-1001
1118     move.l (4),-(sp)
1119     PUTMSG 0,'%s/doprivviol END: Execbase=%08lx'
1120     lea (1*4,sp),sp
1121     ENDC
1122 cebix 1.1 rte
1123    
1124     ; movec vbr,a0
1125     movecvbra0 move.l (sp)+,d0
1126     sub.l a0,a0 ;VBR always appears to be at 0
1127     addq.l #4,2(sp)
1128 jlachmann 1.13
1129     IFEQ INFO_LEVEL-1001
1130     move.l (4),-(sp)
1131     PUTMSG 0,'%s/doprivviol END: Execbase=%08lx'
1132     lea (1*4,sp),sp
1133     ENDC
1134 cebix 1.1 rte
1135    
1136     ; movec vbr,a1
1137     movecvbra1 move.l (sp)+,d0
1138     sub.l a1,a1 ;VBR always appears to be at 0
1139     addq.l #4,2(sp)
1140 jlachmann 1.13
1141     IFEQ INFO_LEVEL-1001
1142     move.l (4),-(sp)
1143     PUTMSG 0,'%s/doprivviol END: Execbase=%08lx'
1144     lea (1*4,sp),sp
1145     ENDC
1146     rte
1147    
1148     ; movec vbr,a2
1149     movecvbra2 move.l (sp)+,d0
1150     sub.l a2,a2 ;VBR always appears to be at 0
1151     addq.l #4,2(sp)
1152    
1153     IFEQ INFO_LEVEL-1001
1154     move.l (4),-(sp)
1155     PUTMSG 0,'%s/doprivviol END: Execbase=%08lx'
1156     lea (1*4,sp),sp
1157     ENDC
1158 cebix 1.1 rte
1159    
1160 jlachmann 1.5 ; movec vbr,d1
1161     movecvbrd1 move.l (sp)+,d0
1162     moveq.l #0,d1 ;VBR always appears to be at 0
1163     addq.l #4,2(sp)
1164 jlachmann 1.13
1165     IFEQ INFO_LEVEL-1001
1166     move.l (4),-(sp)
1167     PUTMSG 0,'%s/doprivviol END: Execbase=%08lx'
1168     lea (1*4,sp),sp
1169     ENDC
1170 jlachmann 1.5 rte
1171    
1172 cebix 1.1 ; movec tc,d0
1173     movectcd0 addq.l #4,sp
1174     moveq #0,d0 ;MMU is always off
1175     addq.l #4,2(sp)
1176 jlachmann 1.13
1177     IFEQ INFO_LEVEL-1001
1178     move.l (4),-(sp)
1179     PUTMSG 0,'%s/doprivviol END: Execbase=%08lx'
1180     lea (1*4,sp),sp
1181     ENDC
1182 cebix 1.1 rte
1183    
1184 jlachmann 1.5 ; movec tc,d1 +jl+
1185     movectcd1 move.l (sp)+,d0 ;Restore d0
1186     moveq #0,d1 ;MMU is always off
1187     addq.l #4,2(sp)
1188 jlachmann 1.13
1189     IFEQ INFO_LEVEL-1001
1190     move.l (4),-(sp)
1191     PUTMSG 0,'%s/doprivviol END: Execbase=%08lx'
1192     lea (1*4,sp),sp
1193     ENDC
1194 jlachmann 1.5 rte
1195    
1196 cebix 1.6 ; movec sfc,d1 +jl+
1197 cebix 1.7 movecsfcd1 move.l (sp)+,d0 ;Restore d0
1198 cebix 1.6 moveq #0,d1
1199 jlachmann 1.5 addq.l #4,2(sp)
1200 jlachmann 1.13
1201     IFEQ INFO_LEVEL-1001
1202     move.l (4),-(sp)
1203     PUTMSG 0,'%s/doprivviol END: Execbase=%08lx'
1204     lea (1*4,sp),sp
1205     ENDC
1206 jlachmann 1.5 rte
1207    
1208 cebix 1.6 ; movec dfc,d1 +jl+
1209 cebix 1.7 movecdfcd1 move.l (sp)+,d0 ;Restore d0
1210 cebix 1.6 moveq #0,d1
1211 cebix 1.1 addq.l #4,2(sp)
1212 jlachmann 1.13
1213     IFEQ INFO_LEVEL-1001
1214     move.l (4),-(sp)
1215     PUTMSG 0,'%s/doprivviol END: Execbase=%08lx'
1216     lea (1*4,sp),sp
1217     ENDC
1218 cebix 1.1 rte
1219    
1220 cebix 1.7 movecurpd0 ; movec urp,d0 +jl+
1221     movecsrpd0 ; movec srp,d0
1222     movecitt0d0 ; movec itt0,d0
1223     movecitt1d0 ; movec itt1,d0
1224     movecdtt0d0 ; movec dtt0,d0
1225     movecdtt1d0 ; movec dtt1,d0
1226 jlachmann 1.5 addq.l #4,sp
1227     moveq.l #0,d0 ;MMU is always off
1228     addq.l #4,2(sp) ;skip instruction
1229 jlachmann 1.13
1230     IFEQ INFO_LEVEL-1001
1231     move.l (4),-(sp)
1232     PUTMSG 0,'%s/doprivviol END: Execbase=%08lx'
1233     lea (1*4,sp),sp
1234     ENDC
1235 jlachmann 1.5 rte
1236    
1237 cebix 1.1 ; movec x,cr
1238     movectocr move.w ([6,sp],2),d0 ;Get next instruction word
1239    
1240     cmp.w #$0801,d0 ;movec d0,vbr?
1241     beq.s movectovbr
1242 jlachmann 1.5 cmp.w #$1801,d0 ;movec d1,vbr?
1243     beq.s movectovbr
1244 jlachmann 1.13 cmp.w #$A801,d0 ;movec a2,vbr?
1245     beq.s movectovbr
1246 cebix 1.1 cmp.w #$0002,d0 ;movec d0,cacr?
1247     beq.s movectocacr
1248     cmp.w #$1002,d0 ;movec d1,cacr?
1249     beq.s movectocacr
1250 cebix 1.6 cmp.w #$1000,d0 ;movec d1,sfc?
1251 jlachmann 1.5 beq.s movectoxfc
1252 cebix 1.6 cmp.w #$1001,d0 ;movec d1,dfc?
1253 jlachmann 1.5 beq.s movectoxfc
1254 cebix 1.1
1255     bra pv_unhandled
1256    
1257     ; movec x,vbr
1258     movectovbr move.l (sp)+,d0 ;Ignore moves to VBR
1259     addq.l #4,2(sp)
1260 jlachmann 1.13
1261     IFEQ INFO_LEVEL-1001
1262     move.l (4),-(sp)
1263     PUTMSG 0,'%s/doprivviol END: Execbase=%08lx'
1264     lea (1*4,sp),sp
1265     ENDC
1266 cebix 1.1 rte
1267    
1268     ; movec dx,cacr
1269     movectocacr movem.l d1/a0-a1/a6,-(sp) ;Move to CACR, clear caches
1270     move.l _SysBase,a6
1271     JSRLIB CacheClearU
1272     movem.l (sp)+,d1/a0-a1/a6
1273     move.l (sp)+,d0
1274     addq.l #4,2(sp)
1275 jlachmann 1.13
1276     IFEQ INFO_LEVEL-1001
1277     move.l (4),-(sp)
1278     PUTMSG 0,'%s/doprivviol END: Execbase=%08lx'
1279     lea (1*4,sp),sp
1280     ENDC
1281 cebix 1.1 rte
1282    
1283 cebix 1.6 ; movec x,sfc
1284     ; movec x,dfc
1285 jlachmann 1.5 movectoxfc move.l (sp)+,d0 ;Ignore moves to SFC, DFC
1286     addq.l #4,2(sp)
1287 jlachmann 1.13
1288     IFEQ INFO_LEVEL-1001
1289     move.l (4),-(sp)
1290     PUTMSG 0,'%s/doprivviol END: Execbase=%08lx'
1291     lea (1*4,sp),sp
1292     ENDC
1293 jlachmann 1.5 rte
1294    
1295 cebix 1.1 ; cpusha
1296     cpushadc
1297 jlachmann 1.13 cpushadcic
1298     IFEQ INFO_LEVEL-1003
1299     move.l (4),-(sp)
1300     move.l d0,-(sp)
1301     PUTMSG 0,'%s/cpushadc: opcode=%04lx Execbase=%08lx'
1302     lea (2*4,sp),sp
1303     ENDC
1304     movem.l d1/a0-a1/a6,-(sp) ;Clear caches
1305 cebix 1.1 move.l _SysBase,a6
1306     JSRLIB CacheClearU
1307     movem.l (sp)+,d1/a0-a1/a6
1308     move.l (sp)+,d0
1309     addq.l #2,2(sp)
1310     rte
1311 jlachmann 1.5
1312     ; move usp,a1 +jl+
1313 cebix 1.7 moveuspa1 move.l (sp)+,d0
1314 jlachmann 1.5 move usp,a1
1315     addq.l #2,2(sp)
1316 jlachmann 1.13
1317     IFEQ INFO_LEVEL-1009
1318     move.l a1,-(sp)
1319     move.l a7,-(sp)
1320     PUTMSG 0,'%s/moveuspa1: a7=%08lx a1=%08lx'
1321     lea (2*4,sp),sp
1322     ENDC
1323    
1324 jlachmann 1.5 rte
1325    
1326     ; move usp,a0 +jl+
1327 cebix 1.7 moveuspa0 move.l (sp)+,d0
1328 jlachmann 1.5 move usp,a0
1329     addq.l #2,2(sp)
1330 jlachmann 1.13
1331     IFEQ INFO_LEVEL-1009
1332     move.l a0,-(sp)
1333     move.l a7,-(sp)
1334     PUTMSG 0,'%s/moveuspa0: a7=%08lx a0=%08lx'
1335     lea (2*4,sp),sp
1336     ENDC
1337    
1338 jlachmann 1.5 rte
1339    
1340     ; move a1,usp +jl+
1341 cebix 1.7 moved1usp move.l (sp)+,d0
1342 jlachmann 1.5 move a1,usp
1343     addq.l #2,2(sp)
1344 jlachmann 1.13
1345     IFEQ INFO_LEVEL-1001
1346     move.l (4),-(sp)
1347     PUTMSG 0,'%s/doprivviol END: Execbase=%08lx'
1348     lea (1*4,sp),sp
1349     ENDC
1350 jlachmann 1.5 rte
1351    
1352     ;
1353     ; Trigger NMI (Pop up debugger)
1354     ;
1355    
1356 cebix 1.7 _AsmTriggerNMI move.l d0,-(sp) ;Save d0
1357 jlachmann 1.5 move.w #$007c,-(sp) ;Yes, fake NMI stack frame
1358     pea 1$
1359     move.w _EmulatedSR,d0
1360     and.w #$f8ff,d0 ;Set interrupt level in SR
1361     move.w d0,-(sp)
1362     move.w d0,_EmulatedSR
1363    
1364     move.l $7c.w,-(sp) ;Jump to MacOS NMI handler
1365     rts
1366    
1367     1$ move.l (sp)+,d0 ;Restore d0
1368     rts
1369    
1370 jlachmann 1.13
1371     CopyTrapStack:
1372     movem.l d0/a0/a1,-(sp)
1373    
1374     move.w (5*4+6,sp),d0 ;get format word
1375     lsr.w #7,d0 ;get stack frame Id
1376     lsr.w #4,d0
1377     and.w #$001e,d0
1378     move.w (StackFormatTable,pc,d0.w),d0 ; get total stack frame length
1379    
1380     lea (5*4,sp),a0 ;get start of exception stack frame
1381     move.l usp,a1 ;Get user stack pointer
1382     bra 1$
1383    
1384     2$ move.w (a0)+,(a1)+ ; copy additional stack words back to supervisor stack
1385     1$ dbf d0,2$
1386    
1387     move.l (3*4,sp),-(a0) ;copy return address to new top of stack
1388     move.l a0,sp
1389     rts
1390 cebix 1.1
1391     END