--- SheepShaver/src/rom_patches.cpp 2003/09/28 21:27:33 1.8 +++ SheepShaver/src/rom_patches.cpp 2004/06/29 20:25:54 1.31 @@ -1,7 +1,7 @@ /* * rom_patches.cpp - ROM patches * - * SheepShaver (C) 1997-2002 Christian Bauer and Marc Hellwig + * SheepShaver (C) 1997-2004 Christian Bauer and Marc Hellwig * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -40,6 +40,7 @@ #include "audio_defs.h" #include "serial.h" #include "macos_util.h" +#include "thunks.h" #define DEBUG 0 #include "debug.h" @@ -58,10 +59,10 @@ // Other ROM addresses -const uint32 CHECK_LOAD_PATCH_SPACE = 0x2f7f00; -const uint32 PUT_SCRAP_PATCH_SPACE = 0x2f7f80; -const uint32 GET_SCRAP_PATCH_SPACE = 0x2f7fc0; -const uint32 ADDR_MAP_PATCH_SPACE = 0x2f8000; +const uint32 CHECK_LOAD_PATCH_SPACE = 0x2fcf00; +const uint32 PUT_SCRAP_PATCH_SPACE = 0x2fcf80; +const uint32 GET_SCRAP_PATCH_SPACE = 0x2fcfc0; +const uint32 ADDR_MAP_PATCH_SPACE = 0x2fd100; // Global variables int ROMType; // ROM type @@ -131,7 +132,7 @@ void decode_parcels(const uint8 *src, ui (parcel_type >> 8) & 0xff, parcel_type & 0xff, &parcel_data[6])); if (parcel_type == FOURCC('r','o','m',' ')) { uint32 lzss_offset = ntohl(parcel_data[2]); - uint32 lzss_size = ((uint32)src + parcel_offset) - ((uint32)parcel_data + lzss_offset); + uint32 lzss_size = ((uintptr)src + next_offset) - ((uintptr)parcel_data + lzss_offset); decode_lzss((uint8 *)parcel_data + lzss_offset, dest, lzss_size); } parcel_offset = next_offset; @@ -269,6 +270,63 @@ static uint32 find_rom_trap(uint16 trap) /* + * Return target of branch instruction specified at ADDR, or 0 if + * there is no such instruction + */ + +static uint32 powerpc_branch_target(uintptr addr) +{ + uint32 opcode = ntohl(*(uint32 *)addr); + uint32 primop = opcode >> 26; + uint32 target = 0; + + if (primop == 18) { // Branch + target = opcode & 0x3fffffc; + if (target & 0x2000000) + target |= 0xfc000000; + if ((opcode & 2) == 0) + target += addr; + } + else if (primop == 16) { // Branch Conditional + target = (int32)(int16)(opcode & 0xfffc); + if ((opcode & 2) == 0) + target += addr; + } + return target; +} + + +/* + * Search ROM for instruction branching to target address, return 0 if none found + */ + +static uint32 find_rom_powerpc_branch(uint32 start, uint32 end, uint32 target) +{ + for (uint32 addr = start; addr < end; addr += 4) { + if (powerpc_branch_target(ROM_BASE + addr) == ROM_BASE + target) + return addr; + } + return 0; +} + + +/* + * Check that requested ROM patch space is really available + */ + +static bool check_rom_patch_space(uint32 base, uint32 size) +{ + size = (size + 3) & -4; + for (int i = 0; i < size; i += 4) { + uint32 x = ntohl(*(uint32 *)(ROM_BASE + base + i)); + if (x != 0x6b636b63 && x != 0) + return false; + } + return true; +} + + +/* * List of audio sifters installed in ROM and System file */ @@ -447,212 +505,141 @@ static const uint8 cdrom_driver[] = { // 0x4e, 0x75 // rts }; -#if EMULATED_PPC -#define SERIAL_TRAMPOLINES 1 -static uint32 serial_nothing_tvect[2] = {POWERPC_NATIVE_OP_FUNC(NATIVE_SERIAL_NOTHING), 0}; -static uint32 serial_open_tvect[2] = {POWERPC_NATIVE_OP_FUNC(NATIVE_SERIAL_OPEN), 0}; -static uint32 serial_prime_in_tvect[2] = {POWERPC_NATIVE_OP_FUNC(NATIVE_SERIAL_PRIME_IN), 0}; -static uint32 serial_prime_out_tvect[2] = {POWERPC_NATIVE_OP_FUNC(NATIVE_SERIAL_PRIME_OUT), 0}; -static uint32 serial_control_tvect[2] = {POWERPC_NATIVE_OP_FUNC(NATIVE_SERIAL_CONTROL), 0}; -static uint32 serial_status_tvect[2] = {POWERPC_NATIVE_OP_FUNC(NATIVE_SERIAL_STATUS), 0}; -static uint32 serial_close_tvect[2] = {POWERPC_NATIVE_OP_FUNC(NATIVE_SERIAL_CLOSE), 0}; -#elif defined(__linux__) -#define SERIAL_TRAMPOLINES 1 -static uint32 serial_nothing_tvect[2] = {(uint32)SerialNothing, 0}; -static uint32 serial_open_tvect[2] = {(uint32)SerialOpen, 0}; -static uint32 serial_prime_in_tvect[2] = {(uint32)SerialPrimeIn, 0}; -static uint32 serial_prime_out_tvect[2] = {(uint32)SerialPrimeOut, 0}; -static uint32 serial_control_tvect[2] = {(uint32)SerialControl, 0}; -static uint32 serial_status_tvect[2] = {(uint32)SerialStatus, 0}; -static uint32 serial_close_tvect[2] = {(uint32)SerialClose, 0}; -#endif +static uint32 long_ptr; -static const uint32 ain_driver[] = { // .AIn driver header - 0x4d000000, 0x00000000, - 0x00200040, 0x00600080, - 0x00a0042e, 0x41496e00, - 0x00000000, 0x00000000, - 0xaafe0700, 0x00000000, - 0x00000000, 0x00179822, -#ifdef SERIAL_TRAMPOLINES - 0x00010004, (uint32)serial_nothing_tvect, -#else - 0x00010004, (uint32)SerialNothing, -#endif - 0x00000000, 0x00000000, - 0xaafe0700, 0x00000000, - 0x00000000, 0x00179822, -#ifdef SERIAL_TRAMPOLINES - 0x00010004, (uint32)serial_prime_in_tvect, -#else - 0x00010004, (uint32)SerialPrimeIn, -#endif - 0x00000000, 0x00000000, - 0xaafe0700, 0x00000000, - 0x00000000, 0x00179822, -#ifdef SERIAL_TRAMPOLINES - 0x00010004, (uint32)serial_control_tvect, -#else - 0x00010004, (uint32)SerialControl, -#endif - 0x00000000, 0x00000000, - 0xaafe0700, 0x00000000, - 0x00000000, 0x00179822, -#ifdef SERIAL_TRAMPOLINES - 0x00010004, (uint32)serial_status_tvect, -#else - 0x00010004, (uint32)SerialStatus, -#endif - 0x00000000, 0x00000000, - 0xaafe0700, 0x00000000, - 0x00000000, 0x00179822, -#ifdef SERIAL_TRAMPOLINES - 0x00010004, (uint32)serial_nothing_tvect, -#else - 0x00010004, (uint32)SerialNothing, -#endif - 0x00000000, 0x00000000, +static void SetLongBase(uint32 addr) +{ + long_ptr = addr; +} + +static void Long(uint32 value) +{ + WriteMacInt32(long_ptr, value); + long_ptr += 4; +} + +static void gen_ain_driver(uintptr addr) +{ + SetLongBase(addr); + + // .AIn driver header + Long(0x4d000000); Long(0x00000000); + Long(0x00200040); Long(0x00600080); + Long(0x00a0042e); Long(0x41496e00); + Long(0x00000000); Long(0x00000000); + Long(0xaafe0700); Long(0x00000000); + Long(0x00000000); Long(0x00179822); + Long(0x00010004); Long(NativeTVECT(NATIVE_SERIAL_NOTHING)); + Long(0x00000000); Long(0x00000000); + Long(0xaafe0700); Long(0x00000000); + Long(0x00000000); Long(0x00179822); + Long(0x00010004); Long(NativeTVECT(NATIVE_SERIAL_PRIME_IN)); + Long(0x00000000); Long(0x00000000); + Long(0xaafe0700); Long(0x00000000); + Long(0x00000000); Long(0x00179822); + Long(0x00010004); Long(NativeTVECT(NATIVE_SERIAL_CONTROL)); + Long(0x00000000); Long(0x00000000); + Long(0xaafe0700); Long(0x00000000); + Long(0x00000000); Long(0x00179822); + Long(0x00010004); Long(NativeTVECT(NATIVE_SERIAL_STATUS)); + Long(0x00000000); Long(0x00000000); + Long(0xaafe0700); Long(0x00000000); + Long(0x00000000); Long(0x00179822); + Long(0x00010004); Long(NativeTVECT(NATIVE_SERIAL_NOTHING)); + Long(0x00000000); Long(0x00000000); }; -static const uint32 aout_driver[] = { // .AOut driver header - 0x4d000000, 0x00000000, - 0x00200040, 0x00600080, - 0x00a0052e, 0x414f7574, - 0x00000000, 0x00000000, - 0xaafe0700, 0x00000000, - 0x00000000, 0x00179822, -#ifdef SERIAL_TRAMPOLINES - 0x00010004, (uint32)serial_open_tvect, -#else - 0x00010004, (uint32)SerialOpen, -#endif - 0x00000000, 0x00000000, - 0xaafe0700, 0x00000000, - 0x00000000, 0x00179822, -#ifdef SERIAL_TRAMPOLINES - 0x00010004, (uint32)serial_prime_out_tvect, -#else - 0x00010004, (uint32)SerialPrimeOut, -#endif - 0x00000000, 0x00000000, - 0xaafe0700, 0x00000000, - 0x00000000, 0x00179822, -#ifdef SERIAL_TRAMPOLINES - 0x00010004, (uint32)serial_control_tvect, -#else - 0x00010004, (uint32)SerialControl, -#endif - 0x00000000, 0x00000000, - 0xaafe0700, 0x00000000, - 0x00000000, 0x00179822, -#ifdef SERIAL_TRAMPOLINES - 0x00010004, (uint32)serial_status_tvect, -#else - 0x00010004, (uint32)SerialStatus, -#endif - 0x00000000, 0x00000000, - 0xaafe0700, 0x00000000, - 0x00000000, 0x00179822, -#ifdef SERIAL_TRAMPOLINES - 0x00010004, (uint32)serial_close_tvect, -#else - 0x00010004, (uint32)SerialClose, -#endif - 0x00000000, 0x00000000, +static void gen_aout_driver(uintptr addr) +{ + SetLongBase(addr); + + // .AOut driver header + Long(0x4d000000); Long(0x00000000); + Long(0x00200040); Long(0x00600080); + Long(0x00a0052e); Long(0x414f7574); + Long(0x00000000); Long(0x00000000); + Long(0xaafe0700); Long(0x00000000); + Long(0x00000000); Long(0x00179822); + Long(0x00010004); Long(NativeTVECT(NATIVE_SERIAL_OPEN)); + Long(0x00000000); Long(0x00000000); + Long(0xaafe0700); Long(0x00000000); + Long(0x00000000); Long(0x00179822); + Long(0x00010004); Long(NativeTVECT(NATIVE_SERIAL_PRIME_OUT)); + Long(0x00000000); Long(0x00000000); + Long(0xaafe0700); Long(0x00000000); + Long(0x00000000); Long(0x00179822); + Long(0x00010004); Long(NativeTVECT(NATIVE_SERIAL_CONTROL)); + Long(0x00000000); Long(0x00000000); + Long(0xaafe0700); Long(0x00000000); + Long(0x00000000); Long(0x00179822); + Long(0x00010004); Long(NativeTVECT(NATIVE_SERIAL_STATUS)); + Long(0x00000000); Long(0x00000000); + Long(0xaafe0700); Long(0x00000000); + Long(0x00000000); Long(0x00179822); + Long(0x00010004); Long(NativeTVECT(NATIVE_SERIAL_CLOSE)); + Long(0x00000000); Long(0x00000000); }; -static const uint32 bin_driver[] = { // .BIn driver header - 0x4d000000, 0x00000000, - 0x00200040, 0x00600080, - 0x00a0042e, 0x42496e00, - 0x00000000, 0x00000000, - 0xaafe0700, 0x00000000, - 0x00000000, 0x00179822, -#ifdef SERIAL_TRAMPOLINES - 0x00010004, (uint32)serial_nothing_tvect, -#else - 0x00010004, (uint32)SerialNothing, -#endif - 0x00000000, 0x00000000, - 0xaafe0700, 0x00000000, - 0x00000000, 0x00179822, -#ifdef SERIAL_TRAMPOLINES - 0x00010004, (uint32)serial_prime_in_tvect, -#else - 0x00010004, (uint32)SerialPrimeIn, -#endif - 0x00000000, 0x00000000, - 0xaafe0700, 0x00000000, - 0x00000000, 0x00179822, -#ifdef SERIAL_TRAMPOLINES - 0x00010004, (uint32)serial_control_tvect, -#else - 0x00010004, (uint32)SerialControl, -#endif - 0x00000000, 0x00000000, - 0xaafe0700, 0x00000000, - 0x00000000, 0x00179822, -#ifdef SERIAL_TRAMPOLINES - 0x00010004, (uint32)serial_status_tvect, -#else - 0x00010004, (uint32)SerialStatus, -#endif - 0x00000000, 0x00000000, - 0xaafe0700, 0x00000000, - 0x00000000, 0x00179822, -#ifdef SERIAL_TRAMPOLINES - 0x00010004, (uint32)serial_nothing_tvect, -#else - 0x00010004, (uint32)SerialNothing, -#endif - 0x00000000, 0x00000000, +static void gen_bin_driver(uintptr addr) +{ + SetLongBase(addr); + + // .BIn driver header + Long(0x4d000000); Long(0x00000000); + Long(0x00200040); Long(0x00600080); + Long(0x00a0042e); Long(0x42496e00); + Long(0x00000000); Long(0x00000000); + Long(0xaafe0700); Long(0x00000000); + Long(0x00000000); Long(0x00179822); + Long(0x00010004); Long(NativeTVECT(NATIVE_SERIAL_NOTHING)); + Long(0x00000000); Long(0x00000000); + Long(0xaafe0700); Long(0x00000000); + Long(0x00000000); Long(0x00179822); + Long(0x00010004); Long(NativeTVECT(NATIVE_SERIAL_PRIME_IN)); + Long(0x00000000); Long(0x00000000); + Long(0xaafe0700); Long(0x00000000); + Long(0x00000000); Long(0x00179822); + Long(0x00010004); Long(NativeTVECT(NATIVE_SERIAL_CONTROL)); + Long(0x00000000); Long(0x00000000); + Long(0xaafe0700); Long(0x00000000); + Long(0x00000000); Long(0x00179822); + Long(0x00010004); Long(NativeTVECT(NATIVE_SERIAL_STATUS)); + Long(0x00000000); Long(0x00000000); + Long(0xaafe0700); Long(0x00000000); + Long(0x00000000); Long(0x00179822); + Long(0x00010004); Long(NativeTVECT(NATIVE_SERIAL_NOTHING)); + Long(0x00000000); Long(0x00000000); }; -static const uint32 bout_driver[] = { // .BOut driver header - 0x4d000000, 0x00000000, - 0x00200040, 0x00600080, - 0x00a0052e, 0x424f7574, - 0x00000000, 0x00000000, - 0xaafe0700, 0x00000000, - 0x00000000, 0x00179822, -#ifdef SERIAL_TRAMPOLINES - 0x00010004, (uint32)serial_open_tvect, -#else - 0x00010004, (uint32)SerialOpen, -#endif - 0x00000000, 0x00000000, - 0xaafe0700, 0x00000000, - 0x00000000, 0x00179822, -#ifdef SERIAL_TRAMPOLINES - 0x00010004, (uint32)serial_prime_out_tvect, -#else - 0x00010004, (uint32)SerialPrimeOut, -#endif - 0x00000000, 0x00000000, - 0xaafe0700, 0x00000000, - 0x00000000, 0x00179822, -#ifdef SERIAL_TRAMPOLINES - 0x00010004, (uint32)serial_control_tvect, -#else - 0x00010004, (uint32)SerialControl, -#endif - 0x00000000, 0x00000000, - 0xaafe0700, 0x00000000, - 0x00000000, 0x00179822, -#ifdef SERIAL_TRAMPOLINES - 0x00010004, (uint32)serial_status_tvect, -#else - 0x00010004, (uint32)SerialStatus, -#endif - 0x00000000, 0x00000000, - 0xaafe0700, 0x00000000, - 0x00000000, 0x00179822, -#ifdef SERIAL_TRAMPOLINES - 0x00010004, (uint32)serial_close_tvect, -#else - 0x00010004, (uint32)SerialClose, -#endif - 0x00000000, 0x00000000, +static void gen_bout_driver(uintptr addr) +{ + SetLongBase(addr); + + // .BOut driver header + Long(0x4d000000); Long(0x00000000); + Long(0x00200040); Long(0x00600080); + Long(0x00a0052e); Long(0x424f7574); + Long(0x00000000); Long(0x00000000); + Long(0xaafe0700); Long(0x00000000); + Long(0x00000000); Long(0x00179822); + Long(0x00010004); Long(NativeTVECT(NATIVE_SERIAL_OPEN)); + Long(0x00000000); Long(0x00000000); + Long(0xaafe0700); Long(0x00000000); + Long(0x00000000); Long(0x00179822); + Long(0x00010004); Long(NativeTVECT(NATIVE_SERIAL_PRIME_OUT)); + Long(0x00000000); Long(0x00000000); + Long(0xaafe0700); Long(0x00000000); + Long(0x00000000); Long(0x00179822); + Long(0x00010004); Long(NativeTVECT(NATIVE_SERIAL_CONTROL)); + Long(0x00000000); Long(0x00000000); + Long(0xaafe0700); Long(0x00000000); + Long(0x00000000); Long(0x00179822); + Long(0x00010004); Long(NativeTVECT(NATIVE_SERIAL_STATUS)); + Long(0x00000000); Long(0x00000000); + Long(0xaafe0700); Long(0x00000000); + Long(0x00000000); Long(0x00179822); + Long(0x00010004); Long(NativeTVECT(NATIVE_SERIAL_CLOSE)); + Long(0x00000000); Long(0x00000000); }; static const uint8 adbop_patch[] = { // Call ADBOp() completion procedure @@ -679,6 +666,23 @@ static const uint8 adbop_patch[] = { // /* + * Copy PowerPC code to ROM image and reverse bytes if necessary + */ + +static inline void memcpy_powerpc_code(void *dst, const void *src, size_t len) +{ +#ifdef WORDS_BIGENDIAN + (void)memcpy(dst, src, len); +#else + uint32 *d = (uint32 *)dst; + uint32 *s = (uint32 *)src; + for (int i = 0; i < len/4; i++) + d[i] = htonl(s[i]); +#endif +} + + +/* * Install ROM patches (RAMBase and KernelDataAddr must be set) */ @@ -701,11 +705,23 @@ bool PatchROM(void) ROMType = ROMTYPE_ZANZIBAR; else if (!memcmp((void *)(ROM_BASE + 0x30d064), "Boot Gazelle", 12)) ROMType = ROMTYPE_GAZELLE; + else if (!memcmp((void *)(ROM_BASE + 0x30d064), "Boot Gossamer", 13)) + ROMType = ROMTYPE_GOSSAMER; else if (!memcmp((void *)(ROM_BASE + 0x30d064), "NewWorld", 8)) ROMType = ROMTYPE_NEWWORLD; else return false; + // Check that other ROM addresses point to really free regions + if (!check_rom_patch_space(CHECK_LOAD_PATCH_SPACE, 0x40)) + return false; + if (!check_rom_patch_space(PUT_SCRAP_PATCH_SPACE, 0x40)) + return false; + if (!check_rom_patch_space(GET_SCRAP_PATCH_SPACE, 0x40)) + return false; + if (!check_rom_patch_space(ADDR_MAP_PATCH_SPACE - 10 * 4, 0x100)) + return false; + // Apply patches if (!patch_nanokernel_boot()) return false; if (!patch_68k_emul()) return false; @@ -738,6 +754,7 @@ bool PatchROM(void) static bool patch_nanokernel_boot(void) { uint32 *lp; + uint32 base, loc; // ROM boot structure patches lp = (uint32 *)(ROM_BASE + 0x30d000); @@ -750,33 +767,37 @@ static bool patch_nanokernel_boot(void) lp[0xfd8 >> 2] = htonl(ROM_BASE + 0x2a); // 68k reset vector // Skip SR/BAT/SDR init - if (ROMType == ROMTYPE_GAZELLE || ROMType == ROMTYPE_NEWWORLD) { - lp = (uint32 *)(ROM_BASE + 0x310000); + loc = 0x310000; + if (ROMType == ROMTYPE_GAZELLE || ROMType == ROMTYPE_GOSSAMER || ROMType == ROMTYPE_NEWWORLD) { + lp = (uint32 *)(ROM_BASE + loc); *lp++ = htonl(POWERPC_NOP); *lp = htonl(0x38000000); } - static const uint32 sr_init_loc[] = {0x3101b0, 0x3101b0, 0x3101b0, 0x3101ec, 0x310200}; - lp = (uint32 *)(ROM_BASE + 0x310008); - *lp = htonl(0x48000000 | (sr_init_loc[ROMType] - 8) & 0xffff); // b ROM_BASE+0x3101b0 - lp = (uint32 *)(ROM_BASE + sr_init_loc[ROMType]); + static const uint8 sr_init_dat[] = {0x35, 0x4a, 0xff, 0xfc, 0x7d, 0x86, 0x50, 0x2e}; + if ((base = find_rom_data(0x3101b0, 0x3105b0, sr_init_dat, sizeof(sr_init_dat))) == 0) return false; + D(bug("sr_init %08lx\n", base)); + lp = (uint32 *)(ROM_BASE + loc + 8); + *lp = htonl(0x48000000 | ((base - loc - 8) & 0x3fffffc)); // b ROM_BASE+0x3101b0 + lp = (uint32 *)(ROM_BASE + base); *lp++ = htonl(0x80200000 + XLM_KERNEL_DATA); // lwz r1,(pointer to Kernel Data) *lp++ = htonl(0x3da0dead); // lis r13,0xdead (start of kernel memory) *lp++ = htonl(0x3dc00010); // lis r14,0x0010 (size of page table) *lp = htonl(0x3de00010); // lis r15,0x0010 (size of kernel memory) // Don't read PVR - static const uint32 pvr_loc[] = {0x3103b0, 0x3103b4, 0x3103b4, 0x310400, 0x310438}; - lp = (uint32 *)(ROM_BASE + pvr_loc[ROMType]); + static const uint8 pvr_read_dat[] = {0x7d, 0x9f, 0x42, 0xa6}; + if ((base = find_rom_data(0x3103b0, 0x3108b0, pvr_read_dat, sizeof(pvr_read_dat))) == 0) return false; + D(bug("pvr_read %08lx\n", base)); + lp = (uint32 *)(ROM_BASE + base); *lp = htonl(0x81800000 + XLM_PVR); // lwz r12,(theoretical PVR) // Set CPU specific data (even if ROM doesn't have support for that CPU) - lp = (uint32 *)(ROM_BASE + pvr_loc[ROMType]); if (ntohl(lp[6]) != 0x2c0c0001) return false; uint32 ofs = ntohl(lp[7]) & 0xffff; D(bug("ofs %08lx\n", ofs)); lp[8] = htonl((ntohl(lp[8]) & 0xffff) | 0x48000000); // beq -> b - uint32 loc = (ntohl(lp[8]) & 0xffff) + (uint32)(lp+8) - ROM_BASE; + loc = (ntohl(lp[8]) & 0xffff) + (uint32)(lp+8) - ROM_BASE; D(bug("loc %08lx\n", loc)); lp = (uint32 *)(ROM_BASE + ofs + 0x310000); switch (PVR >> 16) { @@ -826,7 +847,8 @@ static bool patch_nanokernel_boot(void) lp[7] = htonl(0x00040004); // Inst cache assoc/Data cache assoc lp[8] = htonl(0x00400002); // TLB total size/TLB assoc break; - case 8: // 750 + case 8: // 750, 750FX + case 0x7000: lp[0] = htonl(0x1000); // Page size lp[1] = htonl(0x8000); // Data cache size lp[2] = htonl(0x8000); // Inst cache size @@ -850,7 +872,11 @@ static bool patch_nanokernel_boot(void) lp[8] = htonl(0x00800002); // TLB total size/TLB assoc break; // case 11: // X704? - case 12: // ??? + case 12: // 7400, 7410, 7450, 7455, 7457 + case 0x800c: + case 0x8000: + case 0x8001: + case 0x8002: lp[0] = htonl(0x1000); // Page size lp[1] = htonl(0x8000); // Data cache size lp[2] = htonl(0x8000); // Inst cache size @@ -891,15 +917,19 @@ static bool patch_nanokernel_boot(void) } // Don't set SPRG3, don't test MQ - lp = (uint32 *)(ROM_BASE + loc + 0x20); - *lp++ = htonl(POWERPC_NOP); - lp++; - *lp++ = htonl(POWERPC_NOP); - lp++; - *lp = htonl(POWERPC_NOP); + static const uint8 sprg3_mq_dat[] = {0x7d, 0x13, 0x43, 0xa6, 0x3d, 0x00, 0x00, 0x04, 0x7d, 0x00, 0x03, 0xa6, 0x39, 0x00, 0x00, 0x00, 0x7d, 0x00, 0x02, 0xa6}; + if ((base = find_rom_data(loc + 0x20, loc + 0x60, sprg3_mq_dat, sizeof(sprg3_mq_dat))) == 0) return false; + D(bug("sprg3/mq %08lx\n", base)); + lp = (uint32 *)(ROM_BASE + base); + lp[0] = htonl(POWERPC_NOP); + lp[2] = htonl(POWERPC_NOP); + lp[4] = htonl(POWERPC_NOP); // Don't read MSR - lp = (uint32 *)(ROM_BASE + loc + 0x40); + static const uint8 msr_dat[] = {0x7d, 0xc0, 0x00, 0xa6}; + if ((base = find_rom_data(loc + 0x40, loc + 0x80, msr_dat, sizeof(msr_dat))) == 0) return false; + D(bug("msr %08lx\n", base)); + lp = (uint32 *)(ROM_BASE + base); *lp = htonl(0x39c00000); // li r14,0 // Don't write to DEC @@ -909,97 +939,113 @@ static bool patch_nanokernel_boot(void) D(bug("loc %08lx\n", loc)); // Don't set SPRG3 - lp = (uint32 *)(ROM_BASE + loc + 0x2c); + static const uint8 sprg3_dat[] = {0x39, 0x21, 0x03, 0x60, 0x7d, 0x33, 0x43, 0xa6, 0x39, 0x01, 0x04, 0x20}; + if ((base = find_rom_data(0x310000, 0x314000, sprg3_dat, sizeof(sprg3_dat))) == 0) return false; + D(bug("sprg3 %08lx\n", base + 4)); + lp = (uint32 *)(ROM_BASE + base + 4); *lp = htonl(POWERPC_NOP); // Don't read PVR - static const uint32 pvr_ofs[] = {0x138, 0x138, 0x138, 0x140, 0x148}; - lp = (uint32 *)(ROM_BASE + loc + pvr_ofs[ROMType]); + static const uint8 pvr_read2_dat[] = {0x7e, 0xff, 0x42, 0xa6, 0x56, 0xf7, 0x84, 0x3e}; + if ((base = find_rom_data(0x310000, 0x320000, pvr_read2_dat, sizeof(pvr_read2_dat))) == 0) return false; + D(bug("pvr_read2 %08lx\n", base)); + lp = (uint32 *)(ROM_BASE + base); *lp = htonl(0x82e00000 + XLM_PVR); // lwz r23,(theoretical PVR) - lp = (uint32 *)(ROM_BASE + loc + 0x170); - if (ntohl(*lp) == 0x7eff42a6) // NewWorld ROM + if ((base = find_rom_data(base + 4, 0x320000, pvr_read2_dat, sizeof(pvr_read2_dat))) != 0) { + D(bug("pvr_read2 %08lx\n", base)); + lp = (uint32 *)(ROM_BASE + base); *lp = htonl(0x82e00000 + XLM_PVR); // lwz r23,(theoretical PVR) - lp = (uint32 *)(ROM_BASE + 0x313134); - if (ntohl(*lp) == 0x7e5f42a6) - *lp = htonl(0x82400000 + XLM_PVR); // lwz r18,(theoretical PVR) - lp = (uint32 *)(ROM_BASE + 0x3131f4); - if (ntohl(*lp) == 0x7e5f42a6) // NewWorld ROM + } + static const uint8 pvr_read3_dat[] = {0x7e, 0x5f, 0x42, 0xa6, 0x56, 0x52, 0x84, 0x3e}; + if ((base = find_rom_data(0x310000, 0x320000, pvr_read3_dat, sizeof(pvr_read3_dat))) != 0) { + D(bug("pvr_read3 %08lx\n", base)); + lp = (uint32 *)(ROM_BASE + base); *lp = htonl(0x82400000 + XLM_PVR); // lwz r18,(theoretical PVR) - lp = (uint32 *)(ROM_BASE + 0x314600); - if (ntohl(*lp) == 0x7d3f42a6) + } + static const uint8 pvr_read4_dat[] = {0x7d, 0x3f, 0x42, 0xa6, 0x55, 0x29, 0x84, 0x3e}; + if ((base = find_rom_data(0x310000, 0x320000, pvr_read4_dat, sizeof(pvr_read4_dat))) != 0) { + D(bug("pvr_read4 %08lx\n", base)); + lp = (uint32 *)(ROM_BASE + base); *lp = htonl(0x81200000 + XLM_PVR); // lzw r9,(theoritical PVR) + } // Don't read SDR1 - static const uint32 sdr1_ofs[] = {0x174, 0x174, 0x174, 0x17c, 0x19c}; - lp = (uint32 *)(ROM_BASE + loc + sdr1_ofs[ROMType]); + static const uint8 sdr1_read_dat[] = {0x7d, 0x19, 0x02, 0xa6, 0x55, 0x16, 0x81, 0xde}; + if ((base = find_rom_data(0x310000, 0x320000, sdr1_read_dat, sizeof(sdr1_read_dat))) == 0) return false; + D(bug("sdr1_read %08lx\n", base)); + lp = (uint32 *)(ROM_BASE + base); *lp++ = htonl(0x3d00dead); // lis r8,0xdead (pointer to page table) *lp++ = htonl(0x3ec0001f); // lis r22,0x001f (size of page table) *lp = htonl(POWERPC_NOP); - // Don't clear page table - static const uint32 pgtb_ofs[] = {0x198, 0x198, 0x198, 0x1a0, 0x1c4}; - lp = (uint32 *)(ROM_BASE + loc + pgtb_ofs[ROMType]); + // Don't clear page table, don't invalidate TLB + static const uint8 pgtb_clear_dat[] = {0x36, 0xd6, 0xff, 0xfc, 0x7e, 0xe8, 0xb1, 0x2e, 0x41, 0x81, 0xff, 0xf8}; + if ((base = find_rom_data(0x310000, 0x320000, pgtb_clear_dat, sizeof(pgtb_clear_dat))) == 0) return false; + D(bug("pgtb_clear %08lx\n", base + 4)); + lp = (uint32 *)(ROM_BASE + base + 4); *lp = htonl(POWERPC_NOP); - - // Don't invalidate TLB - static const uint32 tlb_ofs[] = {0x1a0, 0x1a0, 0x1a0, 0x1a8, 0x1cc}; - lp = (uint32 *)(ROM_BASE + loc + tlb_ofs[ROMType]); + D(bug("tblie %08lx\n", base + 12)); + lp = (uint32 *)(ROM_BASE + base + 12); *lp = htonl(POWERPC_NOP); // Don't create RAM descriptor table - static const uint32 desc_ofs[] = {0x350, 0x350, 0x350, 0x358, 0x37c}; - lp = (uint32 *)(ROM_BASE + loc + desc_ofs[ROMType]); + static const uint8 desc_create_dat[] = {0x97, 0xfd, 0x00, 0x04, 0x3b, 0xff, 0x10, 0x00, 0x4b, 0xff, 0xff, 0xdc}; + if ((base = find_rom_data(0x310000, 0x320000, desc_create_dat, sizeof(desc_create_dat))) == 0) return false; + D(bug("desc_create %08lx\n", base)) + lp = (uint32 *)(ROM_BASE + base); *lp = htonl(POWERPC_NOP); // Don't load SRs and BATs - static const uint32 sr_ofs[] = {0x3d8, 0x3d8, 0x3d8, 0x3e0, 0x404}; - lp = (uint32 *)(ROM_BASE + loc + sr_ofs[ROMType]); + static const uint8 sr_load[] = {0x7c, 0x00, 0x04, 0xac, 0x83, 0x9d, 0x00, 0x00, 0x93, 0x81, 0x05, 0xe8}; + if ((loc = find_rom_data(0x310000, 0x320000, sr_load, sizeof(sr_load))) == 0) return false; + static const uint8 sr_load_caller[] = {0x3e, 0xd6, 0xff, 0xff, 0x41, 0x81, 0xff, 0xdc, 0xb2, 0xc8, 0x00, 0x02}; + if ((base = find_rom_data(0x310000, 0x320000, sr_load_caller, sizeof(sr_load_caller))) == 0) return false; + if ((base = find_rom_powerpc_branch(base + 12, 0x320000, loc)) == 0) return false; + D(bug("sr_load %08lx, called from %08lx\n", loc, base)); + lp = (uint32 *)(ROM_BASE + base); *lp = htonl(POWERPC_NOP); // Don't mess with SRs - static const uint32 sr2_ofs[] = {0x312118, 0x312118, 0x312118, 0x312118, 0x3121b4}; - lp = (uint32 *)(ROM_BASE + sr2_ofs[ROMType]); + static const uint8 sr_load2_dat[] = {0x83, 0xa1, 0x05, 0xe8, 0x57, 0x7c, 0x3e, 0x78, 0x7f, 0xbd, 0xe0, 0x2e}; + if ((base = find_rom_data(0x310000, 0x320000, sr_load2_dat, sizeof(sr_load2_dat))) == 0) return false; + D(bug("sr_load2 %08lx\n", base)); + lp = (uint32 *)(ROM_BASE + base); *lp = htonl(POWERPC_BLR); // Don't check performance monitor - static const uint32 pm_ofs[] = {0x313148, 0x313148, 0x313148, 0x313148, 0x313218}; - lp = (uint32 *)(ROM_BASE + pm_ofs[ROMType]); - while (ntohl(*lp) != 0x7e58eba6) lp++; - *lp++ = htonl(POWERPC_NOP); - while (ntohl(*lp) != 0x7e78eaa6) lp++; - *lp++ = htonl(POWERPC_NOP); - while (ntohl(*lp) != 0x7e59eba6) lp++; - *lp++ = htonl(POWERPC_NOP); - while (ntohl(*lp) != 0x7e79eaa6) lp++; - *lp++ = htonl(POWERPC_NOP); - while (ntohl(*lp) != 0x7e5aeba6) lp++; - *lp++ = htonl(POWERPC_NOP); - while (ntohl(*lp) != 0x7e7aeaa6) lp++; - *lp++ = htonl(POWERPC_NOP); - while (ntohl(*lp) != 0x7e5beba6) lp++; - *lp++ = htonl(POWERPC_NOP); - while (ntohl(*lp) != 0x7e7beaa6) lp++; - *lp++ = htonl(POWERPC_NOP); - while (ntohl(*lp) != 0x7e5feba6) lp++; - *lp++ = htonl(POWERPC_NOP); - while (ntohl(*lp) != 0x7e7feaa6) lp++; - *lp++ = htonl(POWERPC_NOP); - while (ntohl(*lp) != 0x7e5ceba6) lp++; - *lp++ = htonl(POWERPC_NOP); - while (ntohl(*lp) != 0x7e7ceaa6) lp++; - *lp++ = htonl(POWERPC_NOP); - while (ntohl(*lp) != 0x7e5deba6) lp++; - *lp++ = htonl(POWERPC_NOP); - while (ntohl(*lp) != 0x7e7deaa6) lp++; - *lp++ = htonl(POWERPC_NOP); - while (ntohl(*lp) != 0x7e5eeba6) lp++; - *lp++ = htonl(POWERPC_NOP); - while (ntohl(*lp) != 0x7e7eeaa6) lp++; - *lp++ = htonl(POWERPC_NOP); + static const uint8 pm_check_dat[] = {0x7e, 0x58, 0xeb, 0xa6, 0x7e, 0x53, 0x90, 0xf8, 0x7e, 0x78, 0xea, 0xa6}; + if ((base = find_rom_data(0x310000, 0x320000, pm_check_dat, sizeof(pm_check_dat))) == 0) return false; + D(bug("pm_check %08lx\n", base)); + lp = (uint32 *)(ROM_BASE + base); + + static const int spr_check_list[] = { + 952 /* mmcr0 */, 953 /* pmc1 */, 954 /* pmc2 */, 955 /* sia */, + 956 /* mmcr1 */, 957 /* pmc3 */, 958 /* pmc4 */, 959 /* sda */ + }; + + for (int i = 0; i < sizeof(spr_check_list)/sizeof(spr_check_list[0]); i++) { + int spr = spr_check_list[i]; + uint32 mtspr = 0x7e4003a6 | ((spr & 0x1f) << 16) | ((spr & 0x3e0) << 6); + uint32 mfspr = 0x7e6002a6 | ((spr & 0x1f) << 16) | ((spr & 0x3e0) << 6); + for (int ofs = 0; ofs < 64; ofs++) { + if (ntohl(lp[ofs]) == mtspr) { + if (ntohl(lp[ofs + 2]) != mfspr) + return false; + D(bug(" SPR%d %08lx\n", spr, base + 4*ofs)); + lp[ofs] = htonl(POWERPC_NOP); + lp[ofs + 2] = htonl(POWERPC_NOP); + } + } + } // Jump to 68k emulator - static const uint32 jump68k_ofs[] = {0x40c, 0x40c, 0x40c, 0x414, 0x438}; - lp = (uint32 *)(ROM_BASE + loc + jump68k_ofs[ROMType]); + static const uint8 jump68k_dat[] = {0x7d, 0x92, 0x43, 0xa6, 0x7d, 0x5a, 0x03, 0xa6, 0x7d, 0x7b, 0x03, 0xa6}; + if ((loc = find_rom_data(0x310000, 0x320000, jump68k_dat, sizeof(jump68k_dat))) == 0) return false; + static const uint8 jump68k_caller_dat[] = {0x85, 0x13, 0x00, 0x08, 0x56, 0xbf, 0x50, 0x3e, 0x63, 0xff, 0x0c, 0x00}; + if ((base = find_rom_data(0x310000, 0x320000, jump68k_caller_dat, sizeof(jump68k_caller_dat))) == 0) return false; + if ((base = find_rom_powerpc_branch(base + 12, 0x320000, loc)) == 0) return false; + D(bug("jump68k %08lx, called from %08lx\n", loc, base)); + lp = (uint32 *)(ROM_BASE + base); *lp++ = htonl(0x80610634); // lwz r3,0x0634(r1) (pointer to Emulator Data) *lp++ = htonl(0x8081119c); // lwz r4,0x119c(r1) (pointer to opcode table) *lp++ = htonl(0x80011184); // lwz r0,0x1184(r1) (pointer to emulator init routine) @@ -1016,11 +1062,12 @@ static bool patch_nanokernel_boot(void) static bool patch_68k_emul(void) { uint32 *lp; - uint32 base; + uint32 base, loc; // Overwrite twi instructions - static const uint32 twi_loc[] = {0x36e680, 0x36e6c0, 0x36e6c0, 0x36e6c0, 0x36e740}; - base = twi_loc[ROMType]; + static const uint8 twi_dat[] = {0x0f, 0xff, 0x00, 0x00, 0x0f, 0xff, 0x00, 0x01, 0x0f, 0xff, 0x00, 0x02}; + if ((base = find_rom_data(0x36e600, 0x36ea00, twi_dat, sizeof(twi_dat))) == 0) return false; + D(bug("twi %08lx\n", base)); lp = (uint32 *)(ROM_BASE + base); *lp++ = htonl(0x48000000 + 0x36f900 - base); // b 0x36f900 (Emulator start) *lp++ = htonl(0x48000000 + 0x36fa00 - base - 4); // b 0x36fa00 (Mixed mode) @@ -1079,13 +1126,9 @@ static bool patch_68k_emul(void) // Extra routine for 68k emulator start lp = (uint32 *)(ROM_BASE + 0x36f900); *lp++ = htonl(0x7c2903a6); // mtctr r1 -#if EMULATED_PPC - *lp++ = POWERPC_NATIVE_OP(NATIVE_DISABLE_INTERRUPT); -#else *lp++ = htonl(0x80200000 + XLM_IRQ_NEST); // lwz r1,XLM_IRQ_NEST *lp++ = htonl(0x38210001); // addi r1,r1,1 *lp++ = htonl(0x90200000 + XLM_IRQ_NEST); // stw r1,XLM_IRQ_NEST -#endif *lp++ = htonl(0x80200000 + XLM_KERNEL_DATA);// lwz r1,XLM_KERNEL_DATA *lp++ = htonl(0x90c10018); // stw r6,0x18(r1) *lp++ = htonl(0x7cc902a6); // mfctr r6 @@ -1113,13 +1156,9 @@ static bool patch_68k_emul(void) // Extra routine for Mixed Mode lp = (uint32 *)(ROM_BASE + 0x36fa00); *lp++ = htonl(0x7c2903a6); // mtctr r1 -#if EMULATED_PPC - *lp++ = POWERPC_NATIVE_OP(NATIVE_DISABLE_INTERRUPT); -#else *lp++ = htonl(0x80200000 + XLM_IRQ_NEST); // lwz r1,XLM_IRQ_NEST *lp++ = htonl(0x38210001); // addi r1,r1,1 *lp++ = htonl(0x90200000 + XLM_IRQ_NEST); // stw r1,XLM_IRQ_NEST -#endif *lp++ = htonl(0x80200000 + XLM_KERNEL_DATA);// lwz r1,XLM_KERNEL_DATA *lp++ = htonl(0x90c10018); // stw r6,0x18(r1) *lp++ = htonl(0x7cc902a6); // mfctr r6 @@ -1147,13 +1186,9 @@ static bool patch_68k_emul(void) // Extra routine for Reset/FC1E opcode lp = (uint32 *)(ROM_BASE + 0x36fb00); *lp++ = htonl(0x7c2903a6); // mtctr r1 -#if EMULATED_PPC - *lp++ = POWERPC_NATIVE_OP(NATIVE_DISABLE_INTERRUPT); -#else *lp++ = htonl(0x80200000 + XLM_IRQ_NEST); // lwz r1,XLM_IRQ_NEST *lp++ = htonl(0x38210001); // addi r1,r1,1 *lp++ = htonl(0x90200000 + XLM_IRQ_NEST); // stw r1,XLM_IRQ_NEST -#endif *lp++ = htonl(0x80200000 + XLM_KERNEL_DATA);// lwz r1,XLM_KERNEL_DATA *lp++ = htonl(0x90c10018); // stw r6,0x18(r1) *lp++ = htonl(0x7cc902a6); // mfctr r6 @@ -1181,13 +1216,9 @@ static bool patch_68k_emul(void) // Extra routine for FE0A opcode (QuickDraw 3D needs this) lp = (uint32 *)(ROM_BASE + 0x36fc00); *lp++ = htonl(0x7c2903a6); // mtctr r1 -#if EMULATED_PPC - *lp++ = POWERPC_NATIVE_OP(NATIVE_DISABLE_INTERRUPT); -#else *lp++ = htonl(0x80200000 + XLM_IRQ_NEST); // lwz r1,XLM_IRQ_NEST *lp++ = htonl(0x38210001); // addi r1,r1,1 *lp++ = htonl(0x90200000 + XLM_IRQ_NEST); // stw r1,XLM_IRQ_NEST -#endif *lp++ = htonl(0x80200000 + XLM_KERNEL_DATA);// lwz r1,XLM_KERNEL_DATA *lp++ = htonl(0x90c10018); // stw r6,0x18(r1) *lp++ = htonl(0x7cc902a6); // mfctr r6 @@ -1223,12 +1254,21 @@ static bool patch_68k_emul(void) return false; dr_found: lp++; - *lp = htonl(0x48000000 + 0xf000 - (((uint32)lp - ROM_BASE) & 0xffff)); // b DR_CACHE_BASE+0x1f000 - lp = (uint32 *)(ROM_BASE + 0x37f000); - *lp++ = htonl(0x3c000000 + ((ROM_BASE + 0x46d0a4) >> 16)); // lis r0,xxx - *lp++ = htonl(0x60000000 + ((ROM_BASE + 0x46d0a4) & 0xffff)); // ori r0,r0,xxx - *lp++ = htonl(0x7c0903a6); // mtctr r0 - *lp = htonl(POWERPC_BCTR); // bctr + loc = (uint32)lp - ROM_BASE; + if ((base = powerpc_branch_target(ROM_BASE + loc)) == 0) base = ROM_BASE + loc; + static const uint8 dr_ret_dat[] = {0x80, 0xbf, 0x08, 0x14, 0x53, 0x19, 0x4d, 0xac, 0x7c, 0xa8, 0x03, 0xa6}; + if ((base = find_rom_data(base - ROM_BASE, 0x380000, dr_ret_dat, sizeof(dr_ret_dat))) == 0) return false; + D(bug("dr_ret %08lx\n", base)); + if (base != loc) { + // OldWorld ROMs contain an absolute branch + D(bug(" patching absolute branch at %08x\n", (uint32)lp - ROM_BASE)); + *lp = htonl(0x48000000 + 0xf000 - (((uint32)lp - ROM_BASE) & 0xffff)); // b DR_CACHE_BASE+0x1f000 + lp = (uint32 *)(ROM_BASE + 0x37f000); + *lp++ = htonl(0x3c000000 + ((ROM_BASE + base) >> 16)); // lis r0,xxx + *lp++ = htonl(0x60000000 + ((ROM_BASE + base) & 0xffff)); // ori r0,r0,xxx + *lp++ = htonl(0x7c0803a6); // mtlr r0 + *lp = htonl(POWERPC_BLR); // blr + } return true; } @@ -1240,67 +1280,89 @@ dr_found: static bool patch_nanokernel(void) { uint32 *lp; + uint32 base, loc; // Patch Mixed Mode trap - lp = (uint32 *)(ROM_BASE + 0x313c90); // Don't translate virtual->physical - while (ntohl(*lp) != 0x3ba10320) lp++; - lp++; - *lp++ = htonl(0x7f7fdb78); // mr r31,r27 - lp++; - *lp = htonl(POWERPC_NOP); - - lp = (uint32 *)(ROM_BASE + 0x313c3c); // Don't activate PPC exception table - while (ntohl(*lp) != 0x39010420) lp++; + static const uint8 virt2phys_dat[] = {0x7d, 0x1b, 0x43, 0x78, 0x3b, 0xa1, 0x03, 0x20}; + if ((base = find_rom_data(0x313000, 0x314000, virt2phys_dat, sizeof(virt2phys_dat))) == 0) return false; + D(bug("virt2phys %08lx\n", base + 8)); + lp = (uint32 *)(ROM_BASE + base + 8); // Don't translate virtual->physical + lp[0] = htonl(0x7f7fdb78); // mr r31,r27 + lp[2] = htonl(POWERPC_NOP); + + static const uint8 ppc_excp_tbl_dat[] = {0x39, 0x01, 0x04, 0x20, 0x7d, 0x13, 0x43, 0xa6}; + if ((base = find_rom_data(0x313000, 0x314000, ppc_excp_tbl_dat, sizeof(ppc_excp_tbl_dat))) == 0) return false; + D(bug("ppc_excp_tbl %08lx\n", base)); + lp = (uint32 *)(ROM_BASE + base); // Don't activate PPC exception table *lp++ = htonl(0x39000000 + MODE_NATIVE); // li r8,MODE_NATIVE - *lp = htonl(0x91000000 + XLM_RUN_MODE); // stw r8,XLM_RUN_MODE + *lp = htonl(0x91000000 + XLM_RUN_MODE); // stw r8,XLM_RUN_MODE - lp = (uint32 *)(ROM_BASE + 0x312e88); // Don't modify MSR to turn on FPU - while (ntohl(*lp) != 0x556b04e2) lp++; - lp -= 4; + static const uint8 save_fpu_dat[] = {0x7d, 0x00, 0x00, 0xa6, 0x61, 0x08, 0x20, 0x00, 0x7d, 0x00, 0x01, 0x24}; + if ((base = find_rom_data(0x310000, 0x314000, save_fpu_dat, sizeof(save_fpu_dat))) == 0) return false; + D(bug("save_fpu %08lx\n", base)); + lp = (uint32 *)(ROM_BASE + base); // Don't modify MSR to turn on FPU + if (ntohl(lp[4]) != 0x556b04e2) return false; + loc = ROM_BASE + base; +#if 1 + // FIXME: is that really intended? *lp++ = htonl(POWERPC_NOP); lp++; *lp++ = htonl(POWERPC_NOP); lp++; *lp = htonl(POWERPC_NOP); +#else + lp[0] = htonl(POWERPC_NOP); + lp[1] = htonl(POWERPC_NOP); + lp[2] = htonl(POWERPC_NOP); + lp[3] = htonl(POWERPC_NOP); +#endif - lp = (uint32 *)(ROM_BASE + 0x312b3c); // Always save FPU state - while (ntohl(*lp) != 0x81010668) lp++; - lp--; + static const uint8 save_fpu_caller_dat[] = {0x93, 0xa6, 0x01, 0xec, 0x93, 0xc6, 0x01, 0xf4, 0x93, 0xe6, 0x01, 0xfc, 0x40}; + if ((base = find_rom_data(0x310000, 0x314000, save_fpu_caller_dat, sizeof(save_fpu_caller_dat))) == 0) return false; + D(bug("save_fpu_caller %08lx\n", base + 12)); + if (powerpc_branch_target(ROM_BASE + base + 12) != loc) return false; + lp = (uint32 *)(ROM_BASE + base + 12); // Always save FPU state *lp = htonl(0x48000000 | (ntohl(*lp) & 0xffff)); // bl 0x00312e88 - lp = (uint32 *)(ROM_BASE + 0x312b44); // Don't read DEC - while (ntohl(*lp) != 0x7ff602a6) lp++; - *lp = htonl(0x3be00000); // li r31,0 - - lp = (uint32 *)(ROM_BASE + 0x312b50); // Don't write DEC - while (ntohl(*lp) != 0x7d1603a6) lp++; + static const uint8 mdec_dat[] = {0x7f, 0xf6, 0x02, 0xa6, 0x2c, 0x08, 0x00, 0x00, 0x93, 0xe1, 0x06, 0x68, 0x7d, 0x16, 0x03, 0xa6}; + if ((base = find_rom_data(0x310000, 0x314000, mdec_dat, sizeof(mdec_dat))) == 0) return false; + D(bug("mdec %08lx\n", base)); + lp = (uint32 *)(ROM_BASE + base); // Don't modify DEC + lp[0] = htonl(0x3be00000); // li r31,0 #if 1 - *lp++ = htonl(POWERPC_NOP); - *lp = htonl(POWERPC_NOP); + lp[3] = htonl(POWERPC_NOP); + lp[4] = htonl(POWERPC_NOP); #else - *lp++ = htonl(0x39000040); // li r8,0x40 - *lp = htonl(0x990600e4); // stb r8,0xe4(r6) + lp[3] = htonl(0x39000040); // li r8,0x40 + lp[4] = htonl(0x990600e4); // stb r8,0xe4(r6) #endif - lp = (uint32 *)(ROM_BASE + 0x312b9c); // Always restore FPU state - while (ntohl(*lp) != 0x7c00092d) lp++; - lp--; + static const uint8 restore_fpu_caller_dat[] = {0x81, 0x06, 0x00, 0xf4, 0x81, 0x46, 0x00, 0xfc, 0x7d, 0x09, 0x03, 0xa6, 0x40}; + if ((base = find_rom_data(0x310000, 0x314000, restore_fpu_caller_dat, sizeof(restore_fpu_caller_dat))) == 0) return false; + D(bug("restore_fpu_caller %08lx\n", base + 12)); + lp = (uint32 *)(ROM_BASE + base + 12); // Always restore FPU state *lp = htonl(0x48000000 | (ntohl(*lp) & 0xffff)); // bl 0x00312ddc - lp = (uint32 *)(ROM_BASE + 0x312a68); // Don't activate 68k exception table - while (ntohl(*lp) != 0x39010360) lp++; + static const uint8 m68k_excp_tbl_dat[] = {0x81, 0x21, 0x06, 0x58, 0x39, 0x01, 0x03, 0x60, 0x7d, 0x13, 0x43, 0xa6}; + if ((base = find_rom_data(0x310000, 0x314000, m68k_excp_tbl_dat, sizeof(m68k_excp_tbl_dat))) == 0) return false; + D(bug("m68k_excp %08lx\n", base + 4)); + lp = (uint32 *)(ROM_BASE + base + 4); // Don't activate 68k exception table *lp++ = htonl(0x39000000 + MODE_68K); // li r8,MODE_68K *lp = htonl(0x91000000 + XLM_RUN_MODE); // stw r8,XLM_RUN_MODE // Patch 68k emulator trap routine - lp = (uint32 *)(ROM_BASE + 0x312994); // Always restore FPU state - while (ntohl(*lp) != 0x39260040) lp++; - lp--; + static const uint8 restore_fpu_caller2_dat[] = {0x81, 0x86, 0x00, 0x8c, 0x80, 0x66, 0x00, 0x94, 0x80, 0x86, 0x00, 0x9c, 0x40}; + if ((base = find_rom_data(0x310000, 0x314000, restore_fpu_caller2_dat, sizeof(restore_fpu_caller2_dat))) == 0) return false; + D(bug("restore_fpu_caller2 %08lx\n", base + 12)); + loc = powerpc_branch_target(ROM_BASE + base + 12) - ROM_BASE; + lp = (uint32 *)(ROM_BASE + base + 12); // Always restore FPU state *lp = htonl(0x48000000 | (ntohl(*lp) & 0xffff)); // bl 0x00312dd4 - lp = (uint32 *)(ROM_BASE + 0x312dd8); // Don't modify MSR to turn on FPU - while (ntohl(*lp) != 0x810600e4) lp++; - lp--; + static const uint8 restore_fpu_dat[] = {0x55, 0x68, 0x04, 0xa5, 0x4c, 0x82, 0x00, 0x20, 0x81, 0x06, 0x00, 0xe4}; + if ((base = find_rom_data(0x310000, 0x314000, restore_fpu_dat, sizeof(restore_fpu_dat))) == 0) return false; + D(bug("restore_fpu %08lx\n", base)); + if (base != loc) return false; + lp = (uint32 *)(ROM_BASE + base + 4); // Don't modify MSR to turn on FPU *lp++ = htonl(POWERPC_NOP); lp += 2; *lp++ = htonl(POWERPC_NOP); @@ -1310,27 +1372,23 @@ static bool patch_nanokernel(void) *lp = htonl(POWERPC_NOP); // Patch trap return routine - lp = (uint32 *)(ROM_BASE + 0x312c20); - while (ntohl(*lp) != 0x7d5a03a6) lp++; + static const uint8 trap_return_dat[] = {0x80, 0xc1, 0x00, 0x18, 0x80, 0x21, 0x00, 0x04, 0x4c, 0x00, 0x00, 0x64}; + if ((base = find_rom_data(0x312000, 0x320000, trap_return_dat, sizeof(trap_return_dat))) == 0) return false; + D(bug("trap_return %08lx\n", base + 8)); + lp = (uint32 *)(ROM_BASE + base + 8); // Replace rfi + *lp = htonl(POWERPC_BCTR); + + while (ntohl(*lp) != 0x7d5a03a6) lp--; *lp++ = htonl(0x7d4903a6); // mtctr r10 *lp++ = htonl(0x7daff120); // mtcr r13 - *lp = htonl(0x48000000 + 0x8000 - (((uint32)lp - ROM_BASE) & 0xffff)); // b ROM_BASE+0x318000 - uint32 xlp = ((uint32)(lp+1) - ROM_BASE) & 0xffff; - - lp = (uint32 *)(ROM_BASE + 0x312c50); // Replace rfi - while (ntohl(*lp) != 0x4c000064) lp++; - *lp = htonl(POWERPC_BCTR); + *lp = htonl(0x48000000 + ((0x318000 - ((uint32)lp - ROM_BASE)) & 0x03fffffc)); // b ROM_BASE+0x318000 + uint32 npc = (uint32)(lp + 1) - ROM_BASE; lp = (uint32 *)(ROM_BASE + 0x318000); -#if EMULATED_PPC - *lp++ = POWERPC_NATIVE_OP(NATIVE_ENABLE_INTERRUPT); - *lp = htonl(0x48000000 + ((xlp - 0x8004) & 0x03fffffc)); // b ROM_BASE+0x312c2c -#else *lp++ = htonl(0x81400000 + XLM_IRQ_NEST); // lwz r10,XLM_IRQ_NEST *lp++ = htonl(0x394affff); // subi r10,r10,1 *lp++ = htonl(0x91400000 + XLM_IRQ_NEST); // stw r10,XLM_IRQ_NEST - *lp = htonl(0x48000000 + ((xlp - 0x800c) & 0x03fffffc)); // b ROM_BASE+0x312c2c -#endif + *lp = htonl(0x48000000 + ((npc - 0x31800c) & 0x03fffffc)); // b ROM_BASE+0x312c2c /* // Disable FE0A/FE06 opcodes @@ -1351,7 +1409,7 @@ static bool patch_68k(void) uint32 *lp; uint16 *wp; uint8 *bp; - uint32 base; + uint32 base, loc; // Remove 68k RESET instruction static const uint8 reset_dat[] = {0x4e, 0x70}; @@ -1401,10 +1459,22 @@ static bool patch_68k(void) lp[0x28 >> 2] = htonl(0x00000861); lp[0x58 >> 2] = htonl(0x30200000); lp[0x60 >> 2] = htonl(0x0000003d); + } else if (ROMType == ROMTYPE_GOSSAMER) { + base = 0x12d20; + lp = (uint32 *)(ROM_BASE + base - 0x14); + lp[0x00 >> 2] = htonl(ADDR_MAP_PATCH_SPACE - (base - 0x14)); + lp[0x10 >> 2] = htonl(0xcc003d11); // Make it like the PowerMac 9500 UniversalInfo + lp[0x14 >> 2] = htonl(0x3fff0401); + lp[0x18 >> 2] = htonl(0x0300001c); + lp[0x1c >> 2] = htonl(0x000108c4); + lp[0x24 >> 2] = htonl(0xc301bf26); + lp[0x28 >> 2] = htonl(0x00000861); + lp[0x58 >> 2] = htonl(0x30410000); + lp[0x60 >> 2] = htonl(0x0000003d); } // Construct AddrMap for NewWorld ROM - if (ROMType == ROMTYPE_NEWWORLD || ROMType == ROMTYPE_ZANZIBAR) { + if (ROMType == ROMTYPE_NEWWORLD || ROMType == ROMTYPE_ZANZIBAR || ROMType == ROMTYPE_GOSSAMER) { lp = (uint32 *)(ROM_BASE + ADDR_MAP_PATCH_SPACE); memset(lp - 10, 0, 0x128); lp[-10] = htonl(0x0300001c); @@ -1530,8 +1600,15 @@ static bool patch_68k(void) *wp++ = htons(M68K_EMUL_OP_XPRAM2); *wp = htons(0x4ed3); // jmp (a3) - static const uint32 nvram3_loc[] = {0x582f0, 0xa0a0, 0x7e50, 0xa1d0, 0}; - wp = (uint16 *)(ROM_BASE + nvram3_loc[ROMType]); + static const uint8 nvram3_dat[] = {0x4e, 0xd3, 0x06, 0x41, 0x13, 0x00}; + if ((base = find_rom_data(0x7000, 0xb000, nvram3_dat, sizeof(nvram3_dat))) == 0) return false; + D(bug("nvram3 %08lx\n", base)); + wp = (uint16 *)(ROM_BASE + base + 2); + *wp++ = htons(M68K_EMUL_OP_XPRAM3); + *wp = htons(0x4ed3); // jmp (a3) + + static const uint32 nvram4_loc[] = {0x582f0, 0xa0a0, 0x7e50, 0xa1d0, 0x538d0, 0}; + wp = (uint16 *)(ROM_BASE + nvram4_loc[ROMType]); *wp++ = htons(0x202f); // move.l 4(sp),d0 *wp++ = htons(0x0004); *wp++ = htons(M68K_EMUL_OP_NVRAM1); @@ -1544,8 +1621,8 @@ static bool patch_68k(void) *wp = htons(0x0004); } - static const uint32 nvram4_loc[] = {0x58460, 0xa0f0, 0x7f40, 0xa220, 0}; - wp = (uint16 *)(ROM_BASE + nvram4_loc[ROMType]); + static const uint32 nvram5_loc[] = {0x58460, 0xa0f0, 0x7f40, 0xa220, 0x53a20, 0}; + wp = (uint16 *)(ROM_BASE + nvram5_loc[ROMType]); if (ROMType == ROMTYPE_ZANZIBAR || ROMType == ROMTYPE_GAZELLE) { *wp++ = htons(0x202f); // move.l 4(sp),d0 *wp++ = htons(0x0004); @@ -1573,11 +1650,15 @@ static bool patch_68k(void) *wp = htons(M68K_NOP); // Don't initialize SCC (via 0x1ac) - static const uint8 scc_init_dat[] = {0x48, 0xe7, 0x38, 0xfe}; - if ((base = find_rom_data(0x190, 0x1f0, scc_init_dat, sizeof(scc_init_dat))) == 0) return false; + static const uint8 scc_init_caller_dat[] = {0x21, 0xce, 0x01, 0x08, 0x22, 0x78, 0x0d, 0xd8}; + if ((base = find_rom_data(0x180, 0x1f0, scc_init_caller_dat, sizeof(scc_init_caller_dat))) == 0) return false; + D(bug("scc_init_caller %08lx\n", base + 12)); + wp = (uint16 *)(ROM_BASE + base + 12); + loc = ntohs(wp[1]) + ((uintptr)wp - ROM_BASE) + 2; + static const uint8 scc_init_dat[] = {0x20, 0x78, 0x01, 0xdc, 0x22, 0x78, 0x01, 0xd8}; + if ((base = find_rom_data(loc, loc + 0x80, scc_init_dat, sizeof(scc_init_dat))) == 0) return false; D(bug("scc_init %08lx\n", base)); - wp = (uint16 *)(ROM_BASE + base - 2); - wp = (uint16 *)(ROM_BASE + ntohs(*wp) + base - 2); + wp = (uint16 *)(ROM_BASE + base); *wp++ = htons(M68K_EMUL_OP_RESET); *wp = htons(M68K_RTS); @@ -1722,6 +1803,8 @@ static bool patch_68k(void) if ((base = find_rom_data(0x13000, 0x20000, gc_mask2_dat, sizeof(gc_mask2_dat))) == 0) return false; D(bug("gc_mask2 %08lx\n", base)); wp = (uint16 *)(ROM_BASE + base); + if (ROMType == ROMTYPE_GOSSAMER) + *wp++ = htons(M68K_NOP); for (int i=0; i<5; i++) { *wp++ = htons(M68K_NOP); *wp++ = htons(M68K_NOP); @@ -1729,7 +1812,7 @@ static bool patch_68k(void) *wp++ = htons(M68K_NOP); wp += 2; } - if (ROMType == ROMTYPE_ZANZIBAR) { + if (ROMType == ROMTYPE_ZANZIBAR || ROMType == ROMTYPE_GOSSAMER) { for (int i=0; i<6; i++) { *wp++ = htons(M68K_NOP); *wp++ = htons(M68K_NOP); @@ -1802,9 +1885,9 @@ static bool patch_68k(void) *wp = htons(M68K_RTS); // Don't install Time Manager task for 60Hz interrupt (Enable60HzInts, via 0x2b8) - if (ROMType == ROMTYPE_NEWWORLD) { + if (ROMType == ROMTYPE_NEWWORLD || ROMType == ROMTYPE_GOSSAMER) { static const uint8 tm_task_dat[] = {0x30, 0x3c, 0x4e, 0x2b, 0xa9, 0xc9}; - if ((base = find_rom_data(0x2e0, 0x320, tm_task_dat, sizeof(tm_task_dat))) == 0) return false; + if ((base = find_rom_data(0x2a0, 0x320, tm_task_dat, sizeof(tm_task_dat))) == 0) return false; D(bug("tm_task %08lx\n", base)); wp = (uint16 *)(ROM_BASE + base + 28); *wp++ = htons(M68K_NOP); @@ -1824,7 +1907,7 @@ static bool patch_68k(void) } // Don't read PVR from 0x5fffef80 in DriverServicesLib (via 0x316) - if (ROMType != ROMTYPE_NEWWORLD) { + if (ROMType != ROMTYPE_NEWWORLD && ROMType != ROMTYPE_GOSSAMER) { uint32 dsl_offset = find_rom_resource(FOURCC('n','l','i','b'), -16401); if (ROMType == ROMTYPE_ZANZIBAR) { static const uint8 dsl_pvr_dat[] = {0x40, 0x82, 0x00, 0x40, 0x38, 0x60, 0xef, 0x80, 0x3c, 0x63, 0x60, 0x00, 0x80, 0x83, 0x00, 0x00, 0x54, 0x84, 0x84, 0x3e}; @@ -1859,6 +1942,16 @@ static bool patch_68k(void) *lp = htonl(0x38600000); // li r3,0 } + // FIXME: Fake reading from [HpChk]+4 (the callchain reports some function from DriverServicesLib) + if (1) { + uint32 hpchk_offset = find_rom_resource(FOURCC('n','l','i','b'), 10); + static const uint8 hpchk_dat[] = {0x80, 0x80, 0x03, 0x16, 0x94, 0x21, 0xff, 0xb0, 0x83, 0xc4, 0x00, 0x04}; + if ((base = find_rom_data(hpchk_offset, hpchk_offset + 0x3000, hpchk_dat, sizeof(hpchk_dat))) == 0) return false; + D(bug("hpchk %08lx\n", base)); + lp = (uint32 *)(ROM_BASE + base); + *lp = htonl(0x80800000 + XLM_ZERO_PAGE); // lwz r4,(zero page) + } + // Patch Name Registry static const uint8 name_reg_dat[] = {0x70, 0xff, 0xab, 0xeb}; if ((base = find_rom_data(0x300, 0x380, name_reg_dat, sizeof(name_reg_dat))) == 0) return false; @@ -1910,7 +2003,23 @@ static bool patch_68k(void) D(bug("scsi_var2 %08lx\n", base)); wp = (uint16 *)(ROM_BASE + base); *wp++ = htons(0x7000); // moveq #0,d0 - *wp = htons(M68K_RTS); // bra + *wp = htons(M68K_RTS); + } + } + else if (ROMType == ROMTYPE_GOSSAMER) { + static const uint8 scsi_var_dat[] = {0x70, 0x01, 0xa0, 0x89, 0x4a, 0x6e, 0xfe, 0xac, 0x4f, 0xef, 0x00, 0x10, 0x66, 0x00}; + if ((base = find_rom_data(0x1d700, 0x1d800, scsi_var_dat, sizeof(scsi_var_dat))) != 0) { + D(bug("scsi_var %08lx\n", base)); + wp = (uint16 *)(ROM_BASE + base + 12); + *wp = htons(0x6000); // bra + } + + static const uint8 scsi_var2_dat[] = {0x4e, 0x56, 0xfc, 0x5a, 0x48, 0xe7, 0x1f, 0x38}; + if ((base = find_rom_data(0x1d900, 0x1da00, scsi_var2_dat, sizeof(scsi_var2_dat))) != 0) { + D(bug("scsi_var2 %08lx\n", base)); + wp = (uint16 *)(ROM_BASE + base); + *wp++ = htons(0x7000); // moveq #0,d0 + *wp = htons(M68K_RTS); } } #endif @@ -1966,10 +2075,10 @@ static bool patch_68k(void) memcpy((void *)(ROM_BASE + sony_offset + 0x200), cdrom_driver, sizeof(cdrom_driver)); // Install serial drivers - memcpy((void *)(ROM_BASE + sony_offset + 0x300), ain_driver, sizeof(ain_driver)); - memcpy((void *)(ROM_BASE + sony_offset + 0x400), aout_driver, sizeof(aout_driver)); - memcpy((void *)(ROM_BASE + sony_offset + 0x500), bin_driver, sizeof(bin_driver)); - memcpy((void *)(ROM_BASE + sony_offset + 0x600), bout_driver, sizeof(bout_driver)); + gen_ain_driver( ROM_BASE + sony_offset + 0x300); + gen_aout_driver(ROM_BASE + sony_offset + 0x400); + gen_bin_driver( ROM_BASE + sony_offset + 0x500); + gen_bout_driver(ROM_BASE + sony_offset + 0x600); // Copy icons to ROM SonyDiskIconAddr = ROM_BASE + sony_offset + 0x800; @@ -1990,7 +2099,7 @@ static bool patch_68k(void) *wp = htons(M68K_RTS); // Don't install serial drivers from ROM - if (ROMType == ROMTYPE_ZANZIBAR || ROMType == ROMTYPE_NEWWORLD) { + if (ROMType == ROMTYPE_ZANZIBAR || ROMType == ROMTYPE_NEWWORLD || ROMType == ROMTYPE_GOSSAMER) { wp = (uint16 *)(ROM_BASE + find_rom_resource(FOURCC('S','E','R','D'), 0)); *wp = htons(M68K_RTS); } else { @@ -2111,19 +2220,20 @@ static bool patch_68k(void) lp = (uint32 *)(ROM_BASE + ntohl(*lp)); lp[0xa9fd & 0x3ff] = htonl(GET_SCRAP_PATCH_SPACE); -#if __BEOS__ // Patch SynchIdleTime() if (PrefsFindBool("idlewait")) { wp = (uint16 *)(ROM_BASE + find_rom_trap(0xabf7) + 4); // SynchIdleTime() D(bug("SynchIdleTime at %08lx\n", wp)); - if (ntohs(*wp) == 0x2078) { + if (ntohs(*wp) == 0x2078) { // movea.l ExpandMem,a0 *wp++ = htons(M68K_EMUL_OP_IDLE_TIME); *wp = htons(M68K_NOP); - } else { + } + else if (ntohs(*wp) == 0x70fe) // moveq #-2,d0 + *wp++ = htons(M68K_EMUL_OP_IDLE_TIME_2); + else { D(bug("SynchIdleTime patch not installed\n")); } } -#endif // Construct list of all sifters used by sound components in ROM D(bug("Searching for sound components with type sdev in ROM\n")); @@ -2171,12 +2281,13 @@ void InstallDrivers(void) { D(bug("Installing drivers...\n")); M68kRegisters r; - uint8 pb[SIZEOF_IOParam]; + SheepArray pb_var; + const uintptr pb = pb_var.addr(); // Install floppy driver - if (ROMType == ROMTYPE_NEWWORLD) { + if (ROMType == ROMTYPE_NEWWORLD || ROMType == ROMTYPE_GOSSAMER) { - // Force installation of floppy driver with NewWorld ROMs + // Force installation of floppy driver with NewWorld and Gossamer ROMs r.a[0] = ROM_BASE + sony_offset; r.d[0] = (uint32)SonyRefNum; Execute68kTrap(0xa43d, &r); // DrvrInstallRsrvMem() @@ -2187,16 +2298,16 @@ void InstallDrivers(void) WriteMacInt16(dce + dCtlFlags, SonyDriverFlags); } -#if DISABLE_SCSI && 0 +#if DISABLE_SCSI && HAVE_SIGSEGV_SKIP_INSTRUCTION // Fake SCSIGlobals - static const uint8 fake_scsi_globals[32] = {0,}; - WriteMacInt32(0xc0c, (uint32)fake_scsi_globals); + WriteMacInt32(0xc0c, SheepMem::ZeroPage()); #endif // Open .Sony driver - WriteMacInt8((uint32)pb + ioPermssn, 0); - WriteMacInt32((uint32)pb + ioNamePtr, (uint32)"\005.Sony"); - r.a[0] = (uint32)pb; + SheepString sony_str("\005.Sony"); + WriteMacInt8(pb + ioPermssn, 0); + WriteMacInt32(pb + ioNamePtr, sony_str.addr()); + r.a[0] = pb; Execute68kTrap(0xa000, &r); // Open() // Install disk driver @@ -2210,8 +2321,9 @@ void InstallDrivers(void) WriteMacInt16(dce + dCtlFlags, DiskDriverFlags); // Open disk driver - WriteMacInt32((uint32)pb + ioNamePtr, (uint32)"\005.Disk"); - r.a[0] = (uint32)pb; + SheepString disk_str("\005.Disk"); + WriteMacInt32(pb + ioNamePtr, disk_str.addr()); + r.a[0] = pb; Execute68kTrap(0xa000, &r); // Open() // Install CD-ROM driver unless nocdrom option given @@ -2228,8 +2340,9 @@ void InstallDrivers(void) WriteMacInt16(dce + dCtlFlags, CDROMDriverFlags); // Open CD-ROM driver - WriteMacInt32((uint32)pb + ioNamePtr, (uint32)"\010.AppleCD"); - r.a[0] = (uint32)pb; + SheepString apple_cd("\010.AppleCD"); + WriteMacInt32(pb + ioNamePtr, apple_cd.addr()); + r.a[0] = pb; Execute68kTrap(0xa000, &r); // Open() }