71 |
|
// Interrupts in native mode? |
72 |
|
#define INTERRUPTS_IN_NATIVE_MODE 1 |
73 |
|
|
74 |
– |
// 68k Emulator Data |
75 |
– |
struct EmulatorData { |
76 |
– |
uint32 v[0x400]; |
77 |
– |
}; |
78 |
– |
|
79 |
– |
// Kernel Data |
80 |
– |
struct KernelData { |
81 |
– |
uint32 v[0x400]; |
82 |
– |
EmulatorData ed; |
83 |
– |
}; |
84 |
– |
|
74 |
|
// Pointer to Kernel Data |
75 |
< |
static KernelData * const kernel_data = (KernelData *)0x68ffe000; |
75 |
> |
static KernelData * const kernel_data = (KernelData *)KERNEL_DATA_BASE; |
76 |
|
|
77 |
|
|
78 |
|
/** |
113 |
|
void get_resource(uint32 old_get_resource); |
114 |
|
|
115 |
|
// Handle MacOS interrupt |
116 |
< |
void interrupt(uint32 entry, sheepshaver_cpu *cpu); |
116 |
> |
void interrupt(uint32 entry); |
117 |
|
|
118 |
|
// spcflags for interrupts handling |
119 |
|
static uint32 spcflags; |
221 |
|
static inline void execute(powerpc_cpu *) { } |
222 |
|
}; |
223 |
|
|
235 |
– |
static void HandleInterrupt(void); |
236 |
– |
|
224 |
|
struct execute_spcflags_check { |
225 |
|
static inline void execute(powerpc_cpu *cpu) { |
226 |
+ |
#if !ASYNC_IRQ |
227 |
|
if (SPCFLAGS_TEST(SPCFLAG_ALL_BUT_EXEC_RETURN)) { |
228 |
|
if (SPCFLAGS_TEST( SPCFLAG_ENTER_MON )) { |
229 |
|
SPCFLAGS_CLEAR( SPCFLAG_ENTER_MON ); |
238 |
|
SPCFLAGS_SET( SPCFLAG_DOINT ); |
239 |
|
} |
240 |
|
} |
241 |
+ |
#endif |
242 |
|
} |
243 |
|
}; |
244 |
|
|
259 |
|
} |
260 |
|
|
261 |
|
// Handle MacOS interrupt |
262 |
< |
void sheepshaver_cpu::interrupt(uint32 entry, sheepshaver_cpu *cpu) |
262 |
> |
void sheepshaver_cpu::interrupt(uint32 entry) |
263 |
|
{ |
264 |
< |
#if MULTICORE_CPU |
276 |
< |
// Initialize stack pointer from previous CPU running |
277 |
< |
gpr(1) = cpu->gpr(1); |
278 |
< |
#else |
264 |
> |
#if !MULTICORE_CPU |
265 |
|
// Save program counters and branch registers |
266 |
|
uint32 saved_pc = pc(); |
267 |
|
uint32 saved_lr = lr(); |
268 |
|
uint32 saved_ctr= ctr(); |
269 |
+ |
uint32 saved_sp = gpr(1); |
270 |
|
#endif |
271 |
|
|
272 |
< |
// Create stack frame |
273 |
< |
gpr(1) -= 64; |
272 |
> |
// Initialize stack pointer to SheepShaver alternate stack base |
273 |
> |
gpr(1) = SheepStack1Base - 64; |
274 |
|
|
275 |
|
// Build trampoline to return from interrupt |
276 |
|
uint32 trampoline[] = { POWERPC_EMUL_OP | 1 }; |
307 |
|
// Enter nanokernel |
308 |
|
execute(entry); |
309 |
|
|
323 |
– |
// Cleanup stack |
324 |
– |
gpr(1) += 64; |
325 |
– |
|
310 |
|
#if !MULTICORE_CPU |
311 |
|
// Restore program counters and branch registers |
312 |
|
pc() = saved_pc; |
313 |
|
lr() = saved_lr; |
314 |
|
ctr()= saved_ctr; |
315 |
+ |
gpr(1) = saved_sp; |
316 |
|
#endif |
317 |
|
} |
318 |
|
|
570 |
|
|
571 |
|
// Install the handler for SIGSEGV |
572 |
|
sigsegv_install_handler(sigsegv_handler); |
573 |
< |
|
573 |
> |
|
574 |
|
#if ENABLE_MON |
575 |
|
// Install "regs" command in cxmon |
576 |
|
mon_add_command("regs", dump_registers, "regs Dump PowerPC registers\n"); |
598 |
|
extern int atomic_and(int *var, int v); |
599 |
|
extern int atomic_or(int *var, int v); |
600 |
|
|
601 |
+ |
#if !ASYNC_IRQ |
602 |
|
void TriggerInterrupt(void) |
603 |
|
{ |
604 |
|
#if 0 |
607 |
|
SPCFLAGS_SET( SPCFLAG_INT ); |
608 |
|
#endif |
609 |
|
} |
610 |
+ |
#endif |
611 |
|
|
612 |
< |
static void HandleInterrupt(void) |
612 |
> |
void HandleInterrupt(void) |
613 |
|
{ |
614 |
|
// Do nothing if interrupts are disabled |
615 |
|
if (int32(ReadMacInt32(XLM_IRQ_NEST)) > 0) |
646 |
|
DisableInterrupt(); |
647 |
|
cpu_push(interrupt_cpu); |
648 |
|
if (ROMType == ROMTYPE_NEWWORLD) |
649 |
< |
current_cpu->interrupt(ROM_BASE + 0x312b1c, main_cpu); |
649 |
> |
current_cpu->interrupt(ROM_BASE + 0x312b1c); |
650 |
|
else |
651 |
< |
current_cpu->interrupt(ROM_BASE + 0x312a3c, main_cpu); |
651 |
> |
current_cpu->interrupt(ROM_BASE + 0x312a3c); |
652 |
|
cpu_pop(); |
653 |
|
} |
654 |
|
break; |