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root/cebix/SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp
Revision: 1.3
Committed: 2003-09-29T07:05:15Z (20 years, 11 months ago) by gbeauche
Branch: MAIN
Changes since 1.2: +28 -40 lines
Log Message:
use B2 sigsegv API instead of rewriting yet another sigsegv handler for x86

File Contents

# User Rev Content
1 gbeauche 1.1 /*
2     * sheepshaver_glue.cpp - Glue Kheperix CPU to SheepShaver CPU engine interface
3     *
4     * SheepShaver (C) 1997-2002 Christian Bauer and Marc Hellwig
5     *
6     * This program is free software; you can redistribute it and/or modify
7     * it under the terms of the GNU General Public License as published by
8     * the Free Software Foundation; either version 2 of the License, or
9     * (at your option) any later version.
10     *
11     * This program is distributed in the hope that it will be useful,
12     * but WITHOUT ANY WARRANTY; without even the implied warranty of
13     * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14     * GNU General Public License for more details.
15     *
16     * You should have received a copy of the GNU General Public License
17     * along with this program; if not, write to the Free Software
18     * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19     */
20    
21     #include "sysdeps.h"
22     #include "cpu_emulation.h"
23     #include "main.h"
24 gbeauche 1.3 #include "prefs.h"
25 gbeauche 1.1 #include "xlowmem.h"
26     #include "emul_op.h"
27     #include "rom_patches.h"
28     #include "macos_util.h"
29     #include "block-alloc.hpp"
30     #include "sigsegv.h"
31 gbeauche 1.2 #include "spcflags.h"
32 gbeauche 1.1 #include "cpu/ppc/ppc-cpu.hpp"
33     #include "cpu/ppc/ppc-operations.hpp"
34    
35     // Used for NativeOp trampolines
36     #include "video.h"
37     #include "name_registry.h"
38     #include "serial.h"
39    
40     #include <stdio.h>
41    
42     #if ENABLE_MON
43     #include "mon.h"
44     #include "mon_disass.h"
45     #endif
46    
47     #define DEBUG 1
48     #include "debug.h"
49    
50     static void enter_mon(void)
51     {
52     // Start up mon in real-mode
53     #if ENABLE_MON
54     char *arg[4] = {"mon", "-m", "-r", NULL};
55     mon(3, arg);
56     #endif
57     }
58    
59 gbeauche 1.2 // Enable multicore (main/interrupts) cpu emulation?
60     #define MULTICORE_CPU 0
61    
62 gbeauche 1.1 // Enable Execute68k() safety checks?
63     #define SAFE_EXEC_68K 1
64    
65     // Save FP state in Execute68k()?
66     #define SAVE_FP_EXEC_68K 1
67    
68     // Interrupts in EMUL_OP mode?
69     #define INTERRUPTS_IN_EMUL_OP_MODE 1
70    
71     // Interrupts in native mode?
72     #define INTERRUPTS_IN_NATIVE_MODE 1
73    
74     // 68k Emulator Data
75     struct EmulatorData {
76     uint32 v[0x400];
77     };
78    
79     // Kernel Data
80     struct KernelData {
81     uint32 v[0x400];
82     EmulatorData ed;
83     };
84    
85     // Pointer to Kernel Data
86     static KernelData * const kernel_data = (KernelData *)0x68ffe000;
87    
88    
89     /**
90     * PowerPC emulator glue with special 'sheep' opcodes
91     **/
92    
93     struct sheepshaver_exec_return { };
94    
95     class sheepshaver_cpu
96     : public powerpc_cpu
97     {
98     void init_decoder();
99     void execute_sheep(uint32 opcode);
100    
101     public:
102    
103     sheepshaver_cpu()
104     : powerpc_cpu()
105     { init_decoder(); }
106    
107     // Condition Register accessors
108     uint32 get_cr() const { return cr().get(); }
109     void set_cr(uint32 v) { cr().set(v); }
110    
111     // Execution loop
112     void execute(uint32 pc);
113    
114     // Execute 68k routine
115     void execute_68k(uint32 entry, M68kRegisters *r);
116    
117 gbeauche 1.2 // Execute ppc routine
118     void execute_ppc(uint32 entry);
119    
120 gbeauche 1.1 // Execute MacOS/PPC code
121     uint32 execute_macos_code(uint32 tvect, int nargs, uint32 const *args);
122    
123     // Resource manager thunk
124     void get_resource(uint32 old_get_resource);
125    
126     // Handle MacOS interrupt
127 gbeauche 1.2 void interrupt(uint32 entry, sheepshaver_cpu *cpu);
128    
129     // spcflags for interrupts handling
130     static uint32 spcflags;
131 gbeauche 1.1
132     // Lazy memory allocator (one item at a time)
133     void *operator new(size_t size)
134     { return allocator_helper< sheepshaver_cpu, lazy_allocator >::allocate(); }
135     void operator delete(void *p)
136     { allocator_helper< sheepshaver_cpu, lazy_allocator >::deallocate(p); }
137     // FIXME: really make surre array allocation fail at link time?
138     void *operator new[](size_t);
139     void operator delete[](void *p);
140     };
141    
142 gbeauche 1.2 uint32 sheepshaver_cpu::spcflags = 0;
143 gbeauche 1.1 lazy_allocator< sheepshaver_cpu > allocator_helper< sheepshaver_cpu, lazy_allocator >::allocator;
144    
145     void sheepshaver_cpu::init_decoder()
146     {
147     #ifndef PPC_NO_STATIC_II_INDEX_TABLE
148     static bool initialized = false;
149     if (initialized)
150     return;
151     initialized = true;
152     #endif
153    
154     static const instr_info_t sheep_ii_table[] = {
155     { "sheep",
156     (execute_fn)&sheepshaver_cpu::execute_sheep,
157     NULL,
158     D_form, 6, 0, CFLOW_TRAP
159     }
160     };
161    
162     const int ii_count = sizeof(sheep_ii_table)/sizeof(sheep_ii_table[0]);
163     D(bug("SheepShaver extra decode table has %d entries\n", ii_count));
164    
165     for (int i = 0; i < ii_count; i++) {
166     const instr_info_t * ii = &sheep_ii_table[i];
167     init_decoder_entry(ii);
168     }
169     }
170    
171     // Forward declaration for native opcode handler
172     static void NativeOp(int selector);
173    
174 gbeauche 1.2 /* NativeOp instruction format:
175     +------------+--------------------------+--+----------+------------+
176     | 6 | |FN| OP | 2 |
177     +------------+--------------------------+--+----------+------------+
178     0 5 |6 19 20 21 25 26 31
179     */
180    
181     typedef bit_field< 20, 20 > FN_field;
182     typedef bit_field< 21, 25 > NATIVE_OP_field;
183     typedef bit_field< 26, 31 > EMUL_OP_field;
184    
185 gbeauche 1.1 // Execute SheepShaver instruction
186     void sheepshaver_cpu::execute_sheep(uint32 opcode)
187     {
188     // D(bug("Extended opcode %08x at %08x (68k pc %08x)\n", opcode, pc(), gpr(24)));
189     assert((((opcode >> 26) & 0x3f) == 6) && OP_MAX <= 64 + 3);
190    
191     switch (opcode & 0x3f) {
192     case 0: // EMUL_RETURN
193     QuitEmulator();
194     break;
195    
196     case 1: // EXEC_RETURN
197     throw sheepshaver_exec_return();
198     break;
199    
200     case 2: // EXEC_NATIVE
201 gbeauche 1.2 NativeOp(NATIVE_OP_field::extract(opcode));
202     if (FN_field::test(opcode))
203     pc() = lr();
204     else
205     pc() += 4;
206 gbeauche 1.1 break;
207    
208     default: { // EMUL_OP
209     M68kRegisters r68;
210     WriteMacInt32(XLM_68K_R25, gpr(25));
211     WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP);
212     for (int i = 0; i < 8; i++)
213     r68.d[i] = gpr(8 + i);
214     for (int i = 0; i < 7; i++)
215     r68.a[i] = gpr(16 + i);
216     r68.a[7] = gpr(1);
217 gbeauche 1.2 EmulOp(&r68, gpr(24), EMUL_OP_field::extract(opcode) - 3);
218 gbeauche 1.1 for (int i = 0; i < 8; i++)
219     gpr(8 + i) = r68.d[i];
220     for (int i = 0; i < 7; i++)
221     gpr(16 + i) = r68.a[i];
222     gpr(1) = r68.a[7];
223     WriteMacInt32(XLM_RUN_MODE, MODE_68K);
224     pc() += 4;
225     break;
226     }
227     }
228     }
229    
230 gbeauche 1.2 // Checks for pending interrupts
231     struct execute_nothing {
232     static inline void execute(powerpc_cpu *) { }
233     };
234    
235     static void HandleInterrupt(void);
236    
237     struct execute_spcflags_check {
238     static inline void execute(powerpc_cpu *cpu) {
239     if (SPCFLAGS_TEST(SPCFLAG_ALL_BUT_EXEC_RETURN)) {
240     if (SPCFLAGS_TEST( SPCFLAG_ENTER_MON )) {
241     SPCFLAGS_CLEAR( SPCFLAG_ENTER_MON );
242     enter_mon();
243     }
244     if (SPCFLAGS_TEST( SPCFLAG_DOINT )) {
245     SPCFLAGS_CLEAR( SPCFLAG_DOINT );
246     HandleInterrupt();
247     }
248     if (SPCFLAGS_TEST( SPCFLAG_INT )) {
249     SPCFLAGS_CLEAR( SPCFLAG_INT );
250     SPCFLAGS_SET( SPCFLAG_DOINT );
251     }
252     }
253     }
254     };
255    
256 gbeauche 1.1 // Execution loop
257     void sheepshaver_cpu::execute(uint32 entry)
258     {
259     try {
260     pc() = entry;
261 gbeauche 1.2 powerpc_cpu::do_execute<execute_nothing, execute_spcflags_check>();
262 gbeauche 1.1 }
263     catch (sheepshaver_exec_return const &) {
264     // Nothing, simply return
265     }
266     catch (...) {
267     printf("ERROR: execute() received an unknown exception!\n");
268     QuitEmulator();
269     }
270     }
271    
272     // Handle MacOS interrupt
273 gbeauche 1.2 void sheepshaver_cpu::interrupt(uint32 entry, sheepshaver_cpu *cpu)
274 gbeauche 1.1 {
275 gbeauche 1.2 #if MULTICORE_CPU
276     // Initialize stack pointer from previous CPU running
277     gpr(1) = cpu->gpr(1);
278     #else
279     // Save program counters and branch registers
280     uint32 saved_pc = pc();
281     uint32 saved_lr = lr();
282     uint32 saved_ctr= ctr();
283     #endif
284    
285 gbeauche 1.1 // Create stack frame
286 gbeauche 1.2 gpr(1) -= 64;
287 gbeauche 1.1
288     // Build trampoline to return from interrupt
289     uint32 trampoline[] = { POWERPC_EMUL_OP | 1 };
290    
291     // Prepare registers for nanokernel interrupt routine
292     kernel_data->v[0x004 >> 2] = gpr(1);
293     kernel_data->v[0x018 >> 2] = gpr(6);
294    
295     gpr(6) = kernel_data->v[0x65c >> 2];
296 gbeauche 1.2 assert(gpr(6) != 0);
297 gbeauche 1.1 WriteMacInt32(gpr(6) + 0x13c, gpr(7));
298     WriteMacInt32(gpr(6) + 0x144, gpr(8));
299     WriteMacInt32(gpr(6) + 0x14c, gpr(9));
300     WriteMacInt32(gpr(6) + 0x154, gpr(10));
301     WriteMacInt32(gpr(6) + 0x15c, gpr(11));
302     WriteMacInt32(gpr(6) + 0x164, gpr(12));
303     WriteMacInt32(gpr(6) + 0x16c, gpr(13));
304    
305     gpr(1) = KernelDataAddr;
306     gpr(7) = kernel_data->v[0x660 >> 2];
307     gpr(8) = 0;
308     gpr(10) = (uint32)trampoline;
309     gpr(12) = (uint32)trampoline;
310     gpr(13) = cr().get();
311    
312     // rlwimi. r7,r7,8,0,0
313     uint32 result = op_ppc_rlwimi::apply(gpr(7), 8, 0x80000000, gpr(7));
314     record_cr0(result);
315     gpr(7) = result;
316    
317     gpr(11) = 0xf072; // MSR (SRR1)
318     cr().set((gpr(11) & 0x0fff0000) | (cr().get() & ~0x0fff0000));
319    
320     // Enter nanokernel
321     execute(entry);
322    
323     // Cleanup stack
324     gpr(1) += 64;
325 gbeauche 1.2
326     #if !MULTICORE_CPU
327     // Restore program counters and branch registers
328     pc() = saved_pc;
329     lr() = saved_lr;
330     ctr()= saved_ctr;
331     #endif
332 gbeauche 1.1 }
333    
334     // Execute 68k routine
335     void sheepshaver_cpu::execute_68k(uint32 entry, M68kRegisters *r)
336     {
337     #if SAFE_EXEC_68K
338     if (ReadMacInt32(XLM_RUN_MODE) != MODE_EMUL_OP)
339     printf("FATAL: Execute68k() not called from EMUL_OP mode\n");
340     #endif
341    
342     // Save program counters and branch registers
343     uint32 saved_pc = pc();
344     uint32 saved_lr = lr();
345     uint32 saved_ctr= ctr();
346    
347     // Create MacOS stack frame
348     uint32 sp = gpr(1);
349     gpr(1) -= 56 + 19*4 + 18*8;
350     WriteMacInt32(gpr(1), sp);
351    
352     // Save PowerPC registers
353     memcpy(Mac2HostAddr(gpr(1)+56), &gpr(13), sizeof(uint32)*(32-13));
354     #if SAVE_FP_EXEC_68K
355     memcpy(Mac2HostAddr(gpr(1)+56+19*4), &fpr(14), sizeof(double)*(32-14));
356     #endif
357    
358     // Setup registers for 68k emulator
359 gbeauche 1.2 cr().set(CR_SO_field<2>::mask()); // Supervisor mode
360 gbeauche 1.1 for (int i = 0; i < 8; i++) // d[0]..d[7]
361     gpr(8 + i) = r->d[i];
362     for (int i = 0; i < 7; i++) // a[0]..a[6]
363     gpr(16 + i) = r->a[i];
364     gpr(23) = 0;
365     gpr(24) = entry;
366     gpr(25) = ReadMacInt32(XLM_68K_R25); // MSB of SR
367     gpr(26) = 0;
368     gpr(28) = 0; // VBR
369     gpr(29) = kernel_data->ed.v[0x74 >> 2]; // Pointer to opcode table
370     gpr(30) = kernel_data->ed.v[0x78 >> 2]; // Address of emulator
371     gpr(31) = KernelDataAddr + 0x1000;
372    
373     // Push return address (points to EXEC_RETURN opcode) on stack
374     gpr(1) -= 4;
375     WriteMacInt32(gpr(1), XLM_EXEC_RETURN_OPCODE);
376    
377     // Rentering 68k emulator
378     WriteMacInt32(XLM_RUN_MODE, MODE_68K);
379    
380     // Set r0 to 0 for 68k emulator
381     gpr(0) = 0;
382    
383     // Execute 68k opcode
384     uint32 opcode = ReadMacInt16(gpr(24));
385     gpr(27) = (int32)(int16)ReadMacInt16(gpr(24) += 2);
386     gpr(29) += opcode * 8;
387     execute(gpr(29));
388    
389     // Save r25 (contains current 68k interrupt level)
390     WriteMacInt32(XLM_68K_R25, gpr(25));
391    
392     // Reentering EMUL_OP mode
393     WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP);
394    
395     // Save 68k registers
396     for (int i = 0; i < 8; i++) // d[0]..d[7]
397     r->d[i] = gpr(8 + i);
398     for (int i = 0; i < 7; i++) // a[0]..a[6]
399     r->a[i] = gpr(16 + i);
400    
401     // Restore PowerPC registers
402     memcpy(&gpr(13), Mac2HostAddr(gpr(1)+56), sizeof(uint32)*(32-13));
403     #if SAVE_FP_EXEC_68K
404     memcpy(&fpr(14), Mac2HostAddr(gpr(1)+56+19*4), sizeof(double)*(32-14));
405     #endif
406    
407     // Cleanup stack
408     gpr(1) += 56 + 19*4 + 18*8;
409    
410     // Restore program counters and branch registers
411     pc() = saved_pc;
412     lr() = saved_lr;
413     ctr()= saved_ctr;
414     }
415    
416     // Call MacOS PPC code
417     uint32 sheepshaver_cpu::execute_macos_code(uint32 tvect, int nargs, uint32 const *args)
418     {
419     // Save program counters and branch registers
420     uint32 saved_pc = pc();
421     uint32 saved_lr = lr();
422     uint32 saved_ctr= ctr();
423    
424     // Build trampoline with EXEC_RETURN
425     uint32 trampoline[] = { POWERPC_EMUL_OP | 1 };
426     lr() = (uint32)trampoline;
427    
428     gpr(1) -= 64; // Create stack frame
429     uint32 proc = ReadMacInt32(tvect); // Get routine address
430     uint32 toc = ReadMacInt32(tvect + 4); // Get TOC pointer
431    
432     // Save PowerPC registers
433     uint32 regs[8];
434     regs[0] = gpr(2);
435     for (int i = 0; i < nargs; i++)
436     regs[i + 1] = gpr(i + 3);
437    
438     // Prepare and call MacOS routine
439     gpr(2) = toc;
440     for (int i = 0; i < nargs; i++)
441     gpr(i + 3) = args[i];
442     execute(proc);
443     uint32 retval = gpr(3);
444    
445     // Restore PowerPC registers
446     for (int i = 0; i <= nargs; i++)
447     gpr(i + 2) = regs[i];
448    
449     // Cleanup stack
450     gpr(1) += 64;
451    
452     // Restore program counters and branch registers
453     pc() = saved_pc;
454     lr() = saved_lr;
455     ctr()= saved_ctr;
456    
457     return retval;
458     }
459    
460 gbeauche 1.2 // Execute ppc routine
461     inline void sheepshaver_cpu::execute_ppc(uint32 entry)
462     {
463     // Save branch registers
464     uint32 saved_lr = lr();
465     uint32 saved_ctr= ctr();
466    
467     const uint32 trampoline[] = { POWERPC_EMUL_OP | 1 };
468    
469     lr() = (uint32)trampoline;
470     ctr()= entry;
471     execute(entry);
472    
473     // Restore branch registers
474     lr() = saved_lr;
475     ctr()= saved_ctr;
476     }
477    
478 gbeauche 1.1 // Resource Manager thunk
479 gbeauche 1.2 extern "C" void check_load_invoc(uint32 type, int16 id, uint16 **h);
480    
481 gbeauche 1.1 inline void sheepshaver_cpu::get_resource(uint32 old_get_resource)
482     {
483 gbeauche 1.2 uint32 type = gpr(3);
484     int16 id = gpr(4);
485    
486     // Create stack frame
487     gpr(1) -= 56;
488    
489     // Call old routine
490     execute_ppc(old_get_resource);
491     uint16 **handle = (uint16 **)gpr(3);
492    
493     // Call CheckLoad()
494     check_load_invoc(type, id, handle);
495     gpr(3) = (uint32)handle;
496    
497     // Cleanup stack
498     gpr(1) += 56;
499 gbeauche 1.1 }
500    
501    
502     /**
503     * SheepShaver CPU engine interface
504     **/
505    
506     static sheepshaver_cpu *main_cpu = NULL; // CPU emulator to handle usual control flow
507     static sheepshaver_cpu *interrupt_cpu = NULL; // CPU emulator to handle interrupts
508     static sheepshaver_cpu *current_cpu = NULL; // Current CPU emulator context
509    
510 gbeauche 1.2 static inline void cpu_push(sheepshaver_cpu *new_cpu)
511     {
512     #if MULTICORE_CPU
513     current_cpu = new_cpu;
514     #endif
515     }
516    
517     static inline void cpu_pop()
518     {
519     #if MULTICORE_CPU
520     current_cpu = main_cpu;
521     #endif
522     }
523    
524 gbeauche 1.1 // Dump PPC registers
525     static void dump_registers(void)
526     {
527     current_cpu->dump_registers();
528     }
529    
530     // Dump log
531     static void dump_log(void)
532     {
533     current_cpu->dump_log();
534     }
535    
536     /*
537     * Initialize CPU emulation
538     */
539    
540 gbeauche 1.3 static sigsegv_return_t sigsegv_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction)
541 gbeauche 1.1 {
542     #if ENABLE_VOSF
543 gbeauche 1.3 // Handle screen fault
544     extern bool Screen_fault_handler(sigsegv_address_t, sigsegv_address_t);
545     if (Screen_fault_handler(fault_address, fault_instruction))
546     return SIGSEGV_RETURN_SUCCESS;
547 gbeauche 1.1 #endif
548 gbeauche 1.3
549     const uintptr addr = (uintptr)fault_address;
550     #if HAVE_SIGSEGV_SKIP_INSTRUCTION
551     // Ignore writes to ROM
552     if ((addr - ROM_BASE) < ROM_SIZE)
553     return SIGSEGV_RETURN_SKIP_INSTRUCTION;
554    
555     // Ignore all other faults, if requested
556     if (PrefsFindBool("ignoresegv"))
557     return SIGSEGV_RETURN_FAILURE;
558     #else
559     #error "FIXME: You don't have the capability to skip instruction within signal handlers"
560 gbeauche 1.1 #endif
561 gbeauche 1.3
562     printf("SIGSEGV\n");
563     printf(" pc %p\n", fault_instruction);
564     printf(" ea %p\n", fault_address);
565     printf(" cpu %s\n", current_cpu == main_cpu ? "main" : "interrupts");
566 gbeauche 1.1 dump_registers();
567     current_cpu->dump_log();
568     enter_mon();
569     QuitEmulator();
570 gbeauche 1.3
571     return SIGSEGV_RETURN_FAILURE;
572 gbeauche 1.1 }
573    
574     void init_emul_ppc(void)
575     {
576     // Initialize main CPU emulator
577     main_cpu = new sheepshaver_cpu();
578     main_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000));
579     WriteMacInt32(XLM_RUN_MODE, MODE_68K);
580    
581 gbeauche 1.2 #if MULTICORE_CPU
582 gbeauche 1.1 // Initialize alternate CPU emulator to handle interrupts
583     interrupt_cpu = new sheepshaver_cpu();
584 gbeauche 1.2 #endif
585 gbeauche 1.1
586 gbeauche 1.3 // Install the handler for SIGSEGV
587     sigsegv_install_handler(sigsegv_handler);
588    
589 gbeauche 1.1 #if ENABLE_MON
590     // Install "regs" command in cxmon
591     mon_add_command("regs", dump_registers, "regs Dump PowerPC registers\n");
592     mon_add_command("log", dump_log, "log Dump PowerPC emulation log\n");
593     #endif
594     }
595    
596     /*
597     * Emulation loop
598     */
599    
600     void emul_ppc(uint32 entry)
601     {
602     current_cpu = main_cpu;
603     current_cpu->start_log();
604     current_cpu->execute(entry);
605     }
606    
607     /*
608     * Handle PowerPC interrupt
609     */
610    
611     // Atomic operations
612     extern int atomic_add(int *var, int v);
613     extern int atomic_and(int *var, int v);
614     extern int atomic_or(int *var, int v);
615    
616 gbeauche 1.2 void TriggerInterrupt(void)
617     {
618     #if 0
619     WriteMacInt32(0x16a, ReadMacInt32(0x16a) + 1);
620     #else
621     SPCFLAGS_SET( SPCFLAG_INT );
622     #endif
623     }
624    
625     static void HandleInterrupt(void)
626 gbeauche 1.1 {
627     // Do nothing if interrupts are disabled
628 gbeauche 1.2 if (int32(ReadMacInt32(XLM_IRQ_NEST)) > 0)
629 gbeauche 1.1 return;
630    
631 gbeauche 1.2 // Do nothing if there is no interrupt pending
632     if (InterruptFlags == 0)
633 gbeauche 1.1 return;
634    
635     // Disable MacOS stack sniffer
636     WriteMacInt32(0x110, 0);
637    
638     // Interrupt action depends on current run mode
639     switch (ReadMacInt32(XLM_RUN_MODE)) {
640     case MODE_68K:
641     // 68k emulator active, trigger 68k interrupt level 1
642     assert(current_cpu == main_cpu);
643     WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1);
644     main_cpu->set_cr(main_cpu->get_cr() | tswap32(kernel_data->v[0x674 >> 2]));
645     break;
646    
647     #if INTERRUPTS_IN_NATIVE_MODE
648     case MODE_NATIVE:
649     // 68k emulator inactive, in nanokernel?
650     assert(current_cpu == main_cpu);
651     if (main_cpu->gpr(1) != KernelDataAddr) {
652     // Prepare for 68k interrupt level 1
653     WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1);
654     WriteMacInt32(tswap32(kernel_data->v[0x658 >> 2]) + 0xdc,
655     ReadMacInt32(tswap32(kernel_data->v[0x658 >> 2]) + 0xdc)
656     | tswap32(kernel_data->v[0x674 >> 2]));
657    
658     // Execute nanokernel interrupt routine (this will activate the 68k emulator)
659 gbeauche 1.2 DisableInterrupt();
660     cpu_push(interrupt_cpu);
661 gbeauche 1.1 if (ROMType == ROMTYPE_NEWWORLD)
662 gbeauche 1.2 current_cpu->interrupt(ROM_BASE + 0x312b1c, main_cpu);
663 gbeauche 1.1 else
664 gbeauche 1.2 current_cpu->interrupt(ROM_BASE + 0x312a3c, main_cpu);
665     cpu_pop();
666 gbeauche 1.1 }
667     break;
668     #endif
669    
670     #if INTERRUPTS_IN_EMUL_OP_MODE
671     case MODE_EMUL_OP:
672     // 68k emulator active, within EMUL_OP routine, execute 68k interrupt routine directly when interrupt level is 0
673     if ((ReadMacInt32(XLM_68K_R25) & 7) == 0) {
674     #if 1
675     // Execute full 68k interrupt routine
676     M68kRegisters r;
677     uint32 old_r25 = ReadMacInt32(XLM_68K_R25); // Save interrupt level
678     WriteMacInt32(XLM_68K_R25, 0x21); // Execute with interrupt level 1
679 gbeauche 1.2 static const uint8 proc[] = {
680     0x3f, 0x3c, 0x00, 0x00, // move.w #$0000,-(sp) (fake format word)
681     0x48, 0x7a, 0x00, 0x0a, // pea @1(pc) (return address)
682     0x40, 0xe7, // move sr,-(sp) (saved SR)
683     0x20, 0x78, 0x00, 0x064, // move.l $64,a0
684     0x4e, 0xd0, // jmp (a0)
685     M68K_RTS >> 8, M68K_RTS & 0xff // @1
686 gbeauche 1.1 };
687     Execute68k((uint32)proc, &r);
688     WriteMacInt32(XLM_68K_R25, old_r25); // Restore interrupt level
689     #else
690     // Only update cursor
691     if (HasMacStarted()) {
692     if (InterruptFlags & INTFLAG_VIA) {
693     ClearInterruptFlag(INTFLAG_VIA);
694     ADBInterrupt();
695     ExecutePPC(VideoVBL);
696     }
697     }
698     #endif
699     }
700     break;
701     #endif
702     }
703     }
704    
705     /*
706     * Execute NATIVE_OP opcode (called by PowerPC emulator)
707     */
708    
709 gbeauche 1.2 #define POWERPC_NATIVE_OP_INIT(LR, OP) \
710     tswap32(POWERPC_EMUL_OP | ((LR) << 11) | (((uint32)OP) << 6) | 2)
711 gbeauche 1.1
712     // FIXME: Make sure 32-bit relocations are used
713     const uint32 NativeOpTable[NATIVE_OP_MAX] = {
714 gbeauche 1.2 POWERPC_NATIVE_OP_INIT(1, NATIVE_PATCH_NAME_REGISTRY),
715     POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_INSTALL_ACCEL),
716     POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_VBL),
717     POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_DO_DRIVER_IO),
718     POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_IRQ),
719     POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_INIT),
720     POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_TERM),
721     POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_OPEN),
722     POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_CLOSE),
723     POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_WPUT),
724     POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_RSRV),
725     POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_NOTHING),
726     POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_OPEN),
727     POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_PRIME_IN),
728     POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_PRIME_OUT),
729     POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_CONTROL),
730     POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_STATUS),
731     POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_CLOSE),
732     POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_RESOURCE),
733     POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_1_RESOURCE),
734     POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_IND_RESOURCE),
735     POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_1_IND_RESOURCE),
736     POWERPC_NATIVE_OP_INIT(1, NATIVE_R_GET_RESOURCE),
737     POWERPC_NATIVE_OP_INIT(0, NATIVE_DISABLE_INTERRUPT),
738     POWERPC_NATIVE_OP_INIT(0, NATIVE_ENABLE_INTERRUPT),
739 gbeauche 1.1 };
740    
741     static void get_resource(void);
742     static void get_1_resource(void);
743     static void get_ind_resource(void);
744     static void get_1_ind_resource(void);
745     static void r_get_resource(void);
746    
747     #define GPR(REG) current_cpu->gpr(REG)
748    
749     static void NativeOp(int selector)
750     {
751     switch (selector) {
752     case NATIVE_PATCH_NAME_REGISTRY:
753     DoPatchNameRegistry();
754     break;
755     case NATIVE_VIDEO_INSTALL_ACCEL:
756     VideoInstallAccel();
757     break;
758     case NATIVE_VIDEO_VBL:
759     VideoVBL();
760     break;
761     case NATIVE_VIDEO_DO_DRIVER_IO:
762     GPR(3) = (int32)(int16)VideoDoDriverIO((void *)GPR(3), (void *)GPR(4),
763     (void *)GPR(5), GPR(6), GPR(7));
764     break;
765     case NATIVE_GET_RESOURCE:
766     get_resource();
767     break;
768     case NATIVE_GET_1_RESOURCE:
769     get_1_resource();
770     break;
771     case NATIVE_GET_IND_RESOURCE:
772     get_ind_resource();
773     break;
774     case NATIVE_GET_1_IND_RESOURCE:
775     get_1_ind_resource();
776     break;
777     case NATIVE_R_GET_RESOURCE:
778     r_get_resource();
779     break;
780     case NATIVE_SERIAL_NOTHING:
781     case NATIVE_SERIAL_OPEN:
782     case NATIVE_SERIAL_PRIME_IN:
783     case NATIVE_SERIAL_PRIME_OUT:
784     case NATIVE_SERIAL_CONTROL:
785     case NATIVE_SERIAL_STATUS:
786     case NATIVE_SERIAL_CLOSE: {
787     typedef int16 (*SerialCallback)(uint32, uint32);
788     static const SerialCallback serial_callbacks[] = {
789     SerialNothing,
790     SerialOpen,
791     SerialPrimeIn,
792     SerialPrimeOut,
793     SerialControl,
794     SerialStatus,
795     SerialClose
796     };
797     GPR(3) = serial_callbacks[selector - NATIVE_SERIAL_NOTHING](GPR(3), GPR(4));
798     break;
799     }
800 gbeauche 1.2 case NATIVE_DISABLE_INTERRUPT:
801     DisableInterrupt();
802     break;
803     case NATIVE_ENABLE_INTERRUPT:
804     EnableInterrupt();
805     break;
806 gbeauche 1.1 default:
807     printf("FATAL: NATIVE_OP called with bogus selector %d\n", selector);
808     QuitEmulator();
809     break;
810     }
811     }
812    
813     /*
814     * Execute native subroutine (LR must contain return address)
815     */
816    
817     void ExecuteNative(int selector)
818     {
819     uint32 tvect[2];
820     tvect[0] = tswap32(POWERPC_NATIVE_OP_FUNC(selector));
821     tvect[1] = 0; // Fake TVECT
822     RoutineDescriptor desc = BUILD_PPC_ROUTINE_DESCRIPTOR(0, tvect);
823     M68kRegisters r;
824     Execute68k((uint32)&desc, &r);
825     }
826    
827     /*
828     * Execute 68k subroutine (must be ended with EXEC_RETURN)
829     * This must only be called by the emul_thread when in EMUL_OP mode
830     * r->a[7] is unused, the routine runs on the caller's stack
831     */
832    
833     void Execute68k(uint32 pc, M68kRegisters *r)
834     {
835     current_cpu->execute_68k(pc, r);
836     }
837    
838     /*
839     * Execute 68k A-Trap from EMUL_OP routine
840     * r->a[7] is unused, the routine runs on the caller's stack
841     */
842    
843     void Execute68kTrap(uint16 trap, M68kRegisters *r)
844     {
845     uint16 proc[2] = {trap, M68K_RTS};
846     Execute68k((uint32)proc, r);
847     }
848    
849     /*
850     * Call MacOS PPC code
851     */
852    
853     uint32 call_macos(uint32 tvect)
854     {
855     return current_cpu->execute_macos_code(tvect, 0, NULL);
856     }
857    
858     uint32 call_macos1(uint32 tvect, uint32 arg1)
859     {
860     const uint32 args[] = { arg1 };
861     return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
862     }
863    
864     uint32 call_macos2(uint32 tvect, uint32 arg1, uint32 arg2)
865     {
866     const uint32 args[] = { arg1, arg2 };
867     return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
868     }
869    
870     uint32 call_macos3(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3)
871     {
872     const uint32 args[] = { arg1, arg2, arg3 };
873     return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
874     }
875    
876     uint32 call_macos4(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4)
877     {
878     const uint32 args[] = { arg1, arg2, arg3, arg4 };
879     return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
880     }
881    
882     uint32 call_macos5(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5)
883     {
884     const uint32 args[] = { arg1, arg2, arg3, arg4, arg5 };
885     return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
886     }
887    
888     uint32 call_macos6(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5, uint32 arg6)
889     {
890     const uint32 args[] = { arg1, arg2, arg3, arg4, arg5, arg6 };
891     return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
892     }
893    
894     uint32 call_macos7(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5, uint32 arg6, uint32 arg7)
895     {
896     const uint32 args[] = { arg1, arg2, arg3, arg4, arg5, arg6, arg7 };
897     return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
898     }
899    
900     /*
901     * Atomic operations
902     */
903    
904     int atomic_add(int *var, int v)
905     {
906     int ret = *var;
907     *var += v;
908     return ret;
909     }
910    
911     int atomic_and(int *var, int v)
912     {
913     int ret = *var;
914     *var &= v;
915     return ret;
916     }
917    
918     int atomic_or(int *var, int v)
919     {
920     int ret = *var;
921     *var |= v;
922     return ret;
923     }
924    
925     /*
926     * Resource Manager thunks
927     */
928    
929     void get_resource(void)
930     {
931     current_cpu->get_resource(ReadMacInt32(XLM_GET_RESOURCE));
932     }
933    
934     void get_1_resource(void)
935     {
936     current_cpu->get_resource(ReadMacInt32(XLM_GET_1_RESOURCE));
937     }
938    
939     void get_ind_resource(void)
940     {
941     current_cpu->get_resource(ReadMacInt32(XLM_GET_IND_RESOURCE));
942     }
943    
944     void get_1_ind_resource(void)
945     {
946     current_cpu->get_resource(ReadMacInt32(XLM_GET_1_IND_RESOURCE));
947     }
948    
949     void r_get_resource(void)
950     {
951     current_cpu->get_resource(ReadMacInt32(XLM_R_GET_RESOURCE));
952     }