--- SheepShaver/src/Unix/sysdeps.h 2003/09/07 14:19:25 1.5 +++ SheepShaver/src/Unix/sysdeps.h 2004/01/26 13:52:31 1.23 @@ -1,7 +1,7 @@ /* * sysdeps.h - System dependent definitions for Linux * - * SheepShaver (C) 1997-2002 Christian Bauer and Marc Hellwig + * SheepShaver (C) 1997-2004 Christian Bauer and Marc Hellwig * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -68,6 +68,8 @@ #define POWERPC_ROM 1 #if EMULATED_PPC +// Handle interrupts asynchronously? +#define ASYNC_IRQ 0 // Mac ROM is write protected when banked memory is used #if REAL_ADDRESSING || DIRECT_ADDRESSING # define ROM_IS_WRITE_PROTECTED 0 @@ -75,6 +77,13 @@ #else # define ROM_IS_WRITE_PROTECTED 1 #endif +// Configure PowerPC emulator +#define PPC_CHECK_INTERRUPTS (ASYNC_IRQ ? 0 : 1) +#define PPC_DECODE_CACHE 1 +#define PPC_FLIGHT_RECORDER 1 +#define PPC_PROFILE_COMPILE_TIME 0 +#define PPC_PROFILE_GENERIC_CALLS 0 +#define KPX_MAX_CPUS 1 #else // Mac ROM is write protected #define ROM_IS_WRITE_PROTECTED 1 @@ -125,11 +134,31 @@ typedef int64 intptr; #error "Unsupported size of pointer" #endif -// Helper functions to byteswap data +/** + * Helper functions to byteswap data + **/ + +#if defined(__GNUC__) +#if defined(__x86_64__) || defined(__i386__) +// Linux/AMD64 currently has no asm optimized bswap_32() in +#define opt_bswap_32 do_opt_bswap_32 +static inline uint32 do_opt_bswap_32(uint32 x) +{ + uint32 v; + __asm__ __volatile__ ("bswap %0" : "=r" (v) : "0" (x)); + return v; +} +#endif +#endif + #ifdef HAVE_BYTESWAP_H #include #endif +#ifdef opt_bswap_16 +#undef bswap_16 +#define bswap_16 opt_bswap_16 +#endif #ifndef bswap_16 #define bswap_16 generic_bswap_16 #endif @@ -139,6 +168,10 @@ static inline uint16 generic_bswap_16(ui return ((x & 0xff) << 8) | ((x >> 8) & 0xff); } +#ifdef opt_bswap_32 +#undef bswap_32 +#define bswap_32 opt_bswap_32 +#endif #ifndef bswap_32 #define bswap_32 generic_bswap_32 #endif @@ -151,6 +184,18 @@ static inline uint32 generic_bswap_32(ui ((x & 0x000000ff) << 24) ); } +#if defined(__i386__) +#define opt_bswap_64 do_opt_bswap_64 +static inline uint64 do_opt_bswap_64(uint64 x) +{ + return (bswap_32(x >> 32) | (((uint64)bswap_32((uint32)x)) << 32)); +} +#endif + +#ifdef opt_bswap_64 +#undef bswap_64 +#define bswap_64 opt_bswap_64 +#endif #ifndef bswap_64 #define bswap_64 generic_bswap_64 #endif @@ -177,6 +222,129 @@ static inline uint32 tswap32(uint32 x) { static inline uint64 tswap64(uint64 x) { return bswap_64(x); } #endif +// spin locks +#ifdef __GNUC__ + +#if defined(__powerpc__) || defined(__ppc__) +#define HAVE_TEST_AND_SET 1 +static inline int testandset(volatile int *p) +{ + int ret; + __asm__ __volatile__("0: lwarx %0,0,%1\n" + " xor. %0,%3,%0\n" + " bne 1f\n" + " stwcx. %2,0,%1\n" + " bne- 0b\n" + "1: " + : "=&r" (ret) + : "r" (p), "r" (1), "r" (0) + : "cr0", "memory"); + return ret; +} +#endif + +#ifdef __i386__ +#define HAVE_TEST_AND_SET 1 +static inline int testandset(volatile int *p) +{ + int ret; + long int readval; + /* Note: the "xchg" instruction does not need a "lock" prefix */ + __asm__ __volatile__("xchgl %0, %1" + : "=r" (ret), "=m" (*p), "=a" (readval) + : "0" (1), "m" (*p) + : "memory"); + return ret; +} +#endif + +#ifdef __s390__ +#define HAVE_TEST_AND_SET 1 +static inline int testandset(volatile int *p) +{ + int ret; + + __asm__ __volatile__("0: cs %0,%1,0(%2)\n" + " jl 0b" + : "=&d" (ret) + : "r" (1), "a" (p), "0" (*p) + : "cc", "memory" ); + return ret; +} +#endif + +#ifdef __alpha__ +#define HAVE_TEST_AND_SET 1 +static inline int testandset(volatile int *p) +{ + int ret; + unsigned long one; + + __asm__ __volatile__("0: mov 1,%2\n" + " ldl_l %0,%1\n" + " stl_c %2,%1\n" + " beq %2,1f\n" + ".subsection 2\n" + "1: br 0b\n" + ".previous" + : "=r" (ret), "=m" (*p), "=r" (one) + : "m" (*p)); + return ret; +} +#endif + +#ifdef __sparc__ +#define HAVE_TEST_AND_SET 1 +static inline int testandset(volatile int *p) +{ + int ret; + + __asm__ __volatile__("ldstub [%1], %0" + : "=r" (ret) + : "r" (p) + : "memory"); + + return (ret ? 1 : 0); +} +#endif + +#ifdef __arm__ +#define HAVE_TEST_AND_SET 1 +static inline int testandset(volatile int *p) +{ + register unsigned int ret; + __asm__ __volatile__("swp %0, %1, [%2]" + : "=r"(ret) + : "0"(1), "r"(p)); + + return ret; +} +#endif + +#endif /* __GNUC__ */ + +#if HAVE_TEST_AND_SET +#define HAVE_SPINLOCKS 1 +typedef volatile int spinlock_t; + +static const spinlock_t SPIN_LOCK_UNLOCKED = 0; + +static inline void spin_lock(spinlock_t *lock) +{ + while (testandset(lock)); +} + +static inline void spin_unlock(spinlock_t *lock) +{ + *lock = 0; +} + +static inline int spin_trylock(spinlock_t *lock) +{ + return !testandset(lock); +} +#endif + // Time data type for Time Manager emulation #ifdef HAVE_CLOCK_GETTIME typedef struct timespec tm_time_t; @@ -184,6 +352,10 @@ typedef struct timespec tm_time_t; typedef struct timeval tm_time_t; #endif +// Timing functions +extern uint64 GetTicks_usec(void); +extern void Delay_usec(uint32 usec); + // Setup pthread attributes extern void Set_pthread_attr(pthread_attr_t *attr, int priority); @@ -195,6 +367,25 @@ typedef struct rgb_color { uint8 alpha; } rgb_color; +// X11 display fast locks +#ifdef HAVE_SPINLOCKS +#define X11_LOCK_TYPE spinlock_t +#define X11_LOCK_INIT SPIN_LOCK_UNLOCKED +#define XDisplayLock() spin_lock(&x_display_lock) +#define XDisplayUnlock() spin_unlock(&x_display_lock) +#elif defined(HAVE_PTHREADS) +#define X11_LOCK_TYPE pthread_mutex_t +#define X11_LOCK_INIT PTHREAD_MUTEX_INITIALIZER +#define XDisplayLock() pthread_mutex_lock(&x_display_lock); +#define XDisplayUnlock() pthread_mutex_unlock(&x_display_lock); +#else +#define XDisplayLock() +#define XDisplayUnlock() +#endif +#ifdef X11_LOCK_TYPE +extern X11_LOCK_TYPE x_display_lock; +#endif + // Macro for calling MacOS routines #define CallMacOS(type, tvect) call_macos((uint32)tvect) #define CallMacOS1(type, tvect, arg1) call_macos1((uint32)tvect, (uint32)arg1)