139 |
|
**/ |
140 |
|
|
141 |
|
#if defined(__GNUC__) |
142 |
< |
#if defined(__x86_64__) |
142 |
> |
#if defined(__x86_64__) || defined(__i386__) |
143 |
|
// Linux/AMD64 currently has no asm optimized bswap_32() in <byteswap.h> |
144 |
|
#define opt_bswap_32 do_opt_bswap_32 |
145 |
|
static inline uint32 do_opt_bswap_32(uint32 x) |
184 |
|
((x & 0x000000ff) << 24) ); |
185 |
|
} |
186 |
|
|
187 |
+ |
#if defined(__i386__) |
188 |
+ |
#define opt_bswap_64 do_opt_bswap_64 |
189 |
+ |
static inline uint64 do_opt_bswap_64(uint64 x) |
190 |
+ |
{ |
191 |
+ |
return (bswap_32(x >> 32) | (((uint64)bswap_32((uint32)x)) << 32)); |
192 |
+ |
} |
193 |
+ |
#endif |
194 |
+ |
|
195 |
|
#ifdef opt_bswap_64 |
196 |
|
#undef bswap_64 |
197 |
|
#define bswap_64 opt_bswap_64 |
225 |
|
// spin locks |
226 |
|
#ifdef __GNUC__ |
227 |
|
|
228 |
< |
#ifdef __powerpc__ |
228 |
> |
#if defined(__powerpc__) || defined(__ppc__) |
229 |
|
#define HAVE_TEST_AND_SET 1 |
230 |
|
static inline int testandset(volatile int *p) |
231 |
|
{ |
232 |
|
int ret; |
233 |
< |
__asm__ __volatile__("0: lwarx %0,0,%1 ;" |
234 |
< |
" xor. %0,%3,%0;" |
235 |
< |
" bne 1f;" |
236 |
< |
" stwcx. %2,0,%1;" |
237 |
< |
" bne- 0b;" |
233 |
> |
__asm__ __volatile__("0: lwarx %0,0,%1\n" |
234 |
> |
" xor. %0,%3,%0\n" |
235 |
> |
" bne 1f\n" |
236 |
> |
" stwcx. %2,0,%1\n" |
237 |
> |
" bne- 0b\n" |
238 |
|
"1: " |
239 |
|
: "=&r" (ret) |
240 |
|
: "r" (p), "r" (1), "r" (0) |