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Comparing SheepShaver/src/Unix/sysdeps.h (file contents):
Revision 1.13 by gbeauche, 2003-10-26T14:16:37Z vs.
Revision 1.45 by gbeauche, 2005-06-30T13:29:43Z

# Line 1 | Line 1
1   /*
2   *  sysdeps.h - System dependent definitions for Linux
3   *
4 < *  SheepShaver (C) 1997-2002 Christian Bauer and Marc Hellwig
4 > *  SheepShaver (C) 1997-2005 Christian Bauer and Marc Hellwig
5   *
6   *  This program is free software; you can redistribute it and/or modify
7   *  it under the terms of the GNU General Public License as published by
# Line 41 | Line 41
41   #include <assert.h>
42   #include <stdio.h>
43   #include <stdlib.h>
44 + #include <stddef.h>
45   #include <string.h>
46   #include <signal.h>
47  
48 + #ifdef HAVE_PTHREADS
49 + # include <pthread.h>
50 + #endif
51 +
52   #ifdef HAVE_FCNTL_H
53   # include <fcntl.h>
54   #endif
# Line 59 | Line 64
64   # endif
65   #endif
66  
67 + // Fix offsetof() on FreeBSD and GCC >= 3.4
68 + #if defined(__FreeBSD__) && defined(__cplusplus)
69 + #undef offsetof
70 + /* The cast to "char &" below avoids problems with user-defined
71 +   "operator &", which can appear in a POD type.  */
72 + #define offsetof(TYPE, MEMBER)                          \
73 +  (__offsetof__ (reinterpret_cast <size_t>              \
74 +                 (&reinterpret_cast <char &>            \
75 +                  (static_cast<TYPE *> (0)->MEMBER))))
76 + #endif
77 +
78   // Define for external components
79   #define SHEEPSHAVER 1
80  
81 < // Mac and host address space are the same
81 > // Always use Real Addressing mode on native architectures
82 > // Otherwise, use Direct Addressing mode if NATMEM_OFFSET is set
83 > #if !defined(EMULATED_PPC)
84   #define REAL_ADDRESSING 1
85 + #include "ppc_asm.tmpl"
86 + #elif defined(__CYGWIN__)
87 + #define DIRECT_ADDRESSING 1
88 + #define DIRECT_ADDRESSING_HACK 1
89 + /*
90 +  The following address translation functions were empirically
91 +  determined on a Windows XP system running Cygwin 1.5.12-1 so
92 +  that RAM size can be maximized (up to 960 MB) and avoiding
93 +  the use of a TLB. This also takes into account reduced address
94 +  space available when the Cygwin runtime is used.
95 + */
96 + #define DIRECT_ADDRESSING_VIRT2PHYS(ADDR) \
97 +        ((ADDR) + (((ADDR)  < 0x41000000) ? 0x39000000 : 0xcf800000))
98 + #define DIRECT_ADDRESSING_PHYS2VIRT(ADDR) \
99 +        ((ADDR) - (((ADDR) >= 0x39000000) ? 0x39000000 : 0xcf800000))
100 + #elif defined(NATMEM_OFFSET)
101 + #define DIRECT_ADDRESSING 1
102 + #else
103 + #define REAL_ADDRESSING 1
104 + #endif
105  
106   #define POWERPC_ROM 1
107  
108   #if EMULATED_PPC
71 // Handle interrupts asynchronously?
72 #define ASYNC_IRQ 0
109   // Mac ROM is write protected when banked memory is used
110   #if REAL_ADDRESSING || DIRECT_ADDRESSING
111   # define ROM_IS_WRITE_PROTECTED 0
# Line 78 | Line 114
114   # define ROM_IS_WRITE_PROTECTED 1
115   #endif
116   // Configure PowerPC emulator
117 < #define PPC_CHECK_INTERRUPTS (ASYNC_IRQ ? 0 : 1)
118 < #define PPC_NO_LAZY_PC_UPDATE 1
119 < //#define PPC_NO_DECODE_CACHE 1
117 > #define PPC_REENTRANT_JIT 1
118 > #define PPC_CHECK_INTERRUPTS 1
119 > #define PPC_DECODE_CACHE 1
120   #define PPC_FLIGHT_RECORDER 1
121 + #define PPC_PROFILE_COMPILE_TIME 0
122 + #define PPC_PROFILE_GENERIC_CALLS 0
123 + #define KPX_MAX_CPUS 1
124 + #if ENABLE_DYNGEN
125 + // Don't bother with predecode cache when using JIT
126 + #define PPC_ENABLE_JIT 1
127 + #undef  PPC_DECODE_CACHE
128 + #endif
129 + #if defined(__i386__)
130 + #define DYNGEN_ASM_OPTS 1
131 + #endif
132   #else
133   // Mac ROM is write protected
134   #define ROM_IS_WRITE_PROTECTED 1
# Line 132 | Line 179 | typedef int64 intptr;
179   #error "Unsupported size of pointer"
180   #endif
181  
182 < // Helper functions to byteswap data
182 > /**
183 > *              Helper functions to byteswap data
184 > **/
185 >
186 > #if defined(__GNUC__)
187 > #if defined(__x86_64__) || defined(__i386__)
188 > // Linux/AMD64 currently has no asm optimized bswap_32() in <byteswap.h>
189 > #define opt_bswap_32 do_opt_bswap_32
190 > static inline uint32 do_opt_bswap_32(uint32 x)
191 > {
192 >  uint32 v;
193 >  __asm__ __volatile__ ("bswap %0" : "=r" (v) : "0" (x));
194 >  return v;
195 > }
196 > #endif
197 > #endif
198 >
199   #ifdef HAVE_BYTESWAP_H
200   #include <byteswap.h>
201   #endif
202  
203 + #ifdef  opt_bswap_16
204 + #undef  bswap_16
205 + #define bswap_16 opt_bswap_16
206 + #endif
207   #ifndef bswap_16
208   #define bswap_16 generic_bswap_16
209   #endif
# Line 146 | Line 213 | static inline uint16 generic_bswap_16(ui
213    return ((x & 0xff) << 8) | ((x >> 8) & 0xff);
214   }
215  
216 + #ifdef  opt_bswap_32
217 + #undef  bswap_32
218 + #define bswap_32 opt_bswap_32
219 + #endif
220   #ifndef bswap_32
221   #define bswap_32 generic_bswap_32
222   #endif
# Line 158 | Line 229 | static inline uint32 generic_bswap_32(ui
229                    ((x & 0x000000ff) << 24) );
230   }
231  
232 + #if defined(__i386__)
233 + #define opt_bswap_64 do_opt_bswap_64
234 + static inline uint64 do_opt_bswap_64(uint64 x)
235 + {
236 +  return (bswap_32(x >> 32) | (((uint64)bswap_32((uint32)x)) << 32));
237 + }
238 + #endif
239 +
240 + #ifdef  opt_bswap_64
241 + #undef  bswap_64
242 + #define bswap_64 opt_bswap_64
243 + #endif
244   #ifndef bswap_64
245   #define bswap_64 generic_bswap_64
246   #endif
# Line 187 | Line 270 | static inline uint64 tswap64(uint64 x) {
270   // spin locks
271   #ifdef __GNUC__
272  
273 < #ifdef __powerpc__
273 > #if defined(__powerpc__) || defined(__ppc__)
274   #define HAVE_TEST_AND_SET 1
275 < static inline int testandset(int *p)
275 > static inline int testandset(volatile int *p)
276   {
277          int ret;
278 <        __asm__ __volatile__("0:    lwarx %0,0,%1 ;"
279 <                                                 "      xor. %0,%3,%0;"
280 <                                                 "      bne 1f;"
281 <                                                 "      stwcx. %2,0,%1;"
282 <                                                 "      bne- 0b;"
278 >        __asm__ __volatile__("0:    lwarx       %0,0,%1\n"
279 >                                                 "      xor.    %0,%3,%0\n"
280 >                                                 "      bne             1f\n"
281 >                                                 "      stwcx.  %2,0,%1\n"
282 >                                                 "      bne-    0b\n"
283                                                   "1:    "
284                                                   : "=&r" (ret)
285                                                   : "r" (p), "r" (1), "r" (0)
# Line 205 | Line 288 | static inline int testandset(int *p)
288   }
289   #endif
290  
291 < #ifdef __i386__
291 > #if defined(__i386__) || defined(__x86_64__)
292   #define HAVE_TEST_AND_SET 1
293 < static inline int testandset(int *p)
293 > static inline int testandset(volatile int *p)
294   {
295 <        char ret;
296 <        long int readval;
297 <        
298 <        __asm__ __volatile__("lock; cmpxchgl %3, %1; sete %0"
299 <                                                 : "=q" (ret), "=m" (*p), "=a" (readval)
217 <                                                 : "r" (1), "m" (*p), "a" (0)
295 >        long int ret;
296 >        /* Note: the "xchg" instruction does not need a "lock" prefix */
297 >        __asm__ __volatile__("xchgl %k0, %1"
298 >                                                 : "=r" (ret), "=m" (*p)
299 >                                                 : "0" (1), "m" (*p)
300                                                   : "memory");
301          return ret;
302   }
# Line 222 | Line 304 | static inline int testandset(int *p)
304  
305   #ifdef __s390__
306   #define HAVE_TEST_AND_SET 1
307 < static inline int testandset(int *p)
307 > static inline int testandset(volatile int *p)
308   {
309          int ret;
310  
# Line 237 | Line 319 | static inline int testandset(int *p)
319  
320   #ifdef __alpha__
321   #define HAVE_TEST_AND_SET 1
322 < static inline int testandset(int *p)
322 > static inline int testandset(volatile int *p)
323   {
324          int ret;
325          unsigned long one;
# Line 257 | Line 339 | static inline int testandset(int *p)
339  
340   #ifdef __sparc__
341   #define HAVE_TEST_AND_SET 1
342 < static inline int testandset(int *p)
342 > static inline int testandset(volatile int *p)
343   {
344          int ret;
345  
# Line 272 | Line 354 | static inline int testandset(int *p)
354  
355   #ifdef __arm__
356   #define HAVE_TEST_AND_SET 1
357 < static inline int testandset(int *p)
357 > static inline int testandset(volatile int *p)
358   {
359          register unsigned int ret;
360          __asm__ __volatile__("swp %0, %1, [%2]"
# Line 285 | Line 367 | static inline int testandset(int *p)
367  
368   #endif /* __GNUC__ */
369  
370 < #if HAVE_TEST_AND_SET
289 < #define HAVE_SPINLOCKS 1
290 < typedef int spinlock_t;
370 > typedef volatile int spinlock_t;
371  
372   static const spinlock_t SPIN_LOCK_UNLOCKED = 0;
373  
374 + #if defined(HAVE_TEST_AND_SET) && defined(HAVE_PTHREADS)
375 + // There is nothing to lock if we are not in an multithreaded environment
376 + #define HAVE_SPINLOCKS 1
377   static inline void spin_lock(spinlock_t *lock)
378   {
379          while (testandset(lock));
# Line 305 | Line 388 | static inline int spin_trylock(spinlock_
388   {
389          return !testandset(lock);
390   }
391 + #else
392 + static inline void spin_lock(spinlock_t *lock)
393 + {
394 + }
395 +
396 + static inline void spin_unlock(spinlock_t *lock)
397 + {
398 + }
399 +
400 + static inline int spin_trylock(spinlock_t *lock)
401 + {
402 +        return 1;
403 + }
404   #endif
405  
406   // Time data type for Time Manager emulation
# Line 314 | Line 410 | typedef struct timespec tm_time_t;
410   typedef struct timeval tm_time_t;
411   #endif
412  
413 + /* Define codes for all the float formats that we know of.
414 + * Though we only handle IEEE format.  */
415 + #define UNKNOWN_FLOAT_FORMAT 0
416 + #define IEEE_FLOAT_FORMAT 1
417 + #define VAX_FLOAT_FORMAT 2
418 + #define IBM_FLOAT_FORMAT 3
419 + #define C4X_FLOAT_FORMAT 4
420 +
421 + // High-precision timing
422 + #if defined(HAVE_PTHREADS) && defined(HAVE_CLOCK_NANOSLEEP) && 0
423 + #define PRECISE_TIMING 1
424 + #define PRECISE_TIMING_POSIX 1
425 + #endif
426 +
427 + // Timing functions
428 + extern uint64 GetTicks_usec(void);
429 + extern void Delay_usec(uint32 usec);
430 +
431 + #ifdef HAVE_PTHREADS
432   // Setup pthread attributes
433   extern void Set_pthread_attr(pthread_attr_t *attr, int priority);
434 + #endif
435  
436   // Various definitions
437   typedef struct rgb_color {
# Line 325 | Line 441 | typedef struct rgb_color {
441          uint8           alpha;
442   } rgb_color;
443  
444 + // X11 display fast locks
445 + #if defined(HAVE_PTHREADS)
446 + #define X11_LOCK_TYPE pthread_mutex_t
447 + #define X11_LOCK_INIT PTHREAD_MUTEX_INITIALIZER
448 + #define XDisplayLock() pthread_mutex_lock(&x_display_lock);
449 + #define XDisplayUnlock() pthread_mutex_unlock(&x_display_lock);
450 + #elif defined(HAVE_SPINLOCKS)
451 + #define X11_LOCK_TYPE spinlock_t
452 + #define X11_LOCK_INIT SPIN_LOCK_UNLOCKED
453 + #define XDisplayLock() spin_lock(&x_display_lock)
454 + #define XDisplayUnlock() spin_unlock(&x_display_lock)
455 + #else
456 + #define XDisplayLock()
457 + #define XDisplayUnlock()
458 + #endif
459 + #ifdef X11_LOCK_TYPE
460 + extern X11_LOCK_TYPE x_display_lock;
461 + #endif
462 +
463   // Macro for calling MacOS routines
464 < #define CallMacOS(type, tvect) call_macos((uint32)tvect)
465 < #define CallMacOS1(type, tvect, arg1) call_macos1((uint32)tvect, (uint32)arg1)
466 < #define CallMacOS2(type, tvect, arg1, arg2) call_macos2((uint32)tvect, (uint32)arg1, (uint32)arg2)
467 < #define CallMacOS3(type, tvect, arg1, arg2, arg3) call_macos3((uint32)tvect, (uint32)arg1, (uint32)arg2, (uint32)arg3)
468 < #define CallMacOS4(type, tvect, arg1, arg2, arg3, arg4) call_macos4((uint32)tvect, (uint32)arg1, (uint32)arg2, (uint32)arg3, (uint32)arg4)
469 < #define CallMacOS5(type, tvect, arg1, arg2, arg3, arg4, arg5) call_macos5((uint32)tvect, (uint32)arg1, (uint32)arg2, (uint32)arg3, (uint32)arg4, (uint32)arg5)
470 < #define CallMacOS6(type, tvect, arg1, arg2, arg3, arg4, arg5, arg6) call_macos6((uint32)tvect, (uint32)arg1, (uint32)arg2, (uint32)arg3, (uint32)arg4, (uint32)arg5, (uint32)arg6)
471 < #define CallMacOS7(type, tvect, arg1, arg2, arg3, arg4, arg5, arg6, arg7) call_macos7((uint32)tvect, (uint32)arg1, (uint32)arg2, (uint32)arg3, (uint32)arg4, (uint32)arg5, (uint32)arg6, (uint32)arg7)
464 > #define CallMacOS(type, tvect) call_macos((uintptr)tvect)
465 > #define CallMacOS1(type, tvect, arg1) call_macos1((uintptr)tvect, (uintptr)arg1)
466 > #define CallMacOS2(type, tvect, arg1, arg2) call_macos2((uintptr)tvect, (uintptr)arg1, (uintptr)arg2)
467 > #define CallMacOS3(type, tvect, arg1, arg2, arg3) call_macos3((uintptr)tvect, (uintptr)arg1, (uintptr)arg2, (uintptr)arg3)
468 > #define CallMacOS4(type, tvect, arg1, arg2, arg3, arg4) call_macos4((uintptr)tvect, (uintptr)arg1, (uintptr)arg2, (uintptr)arg3, (uintptr)arg4)
469 > #define CallMacOS5(type, tvect, arg1, arg2, arg3, arg4, arg5) call_macos5((uintptr)tvect, (uintptr)arg1, (uintptr)arg2, (uintptr)arg3, (uintptr)arg4, (uintptr)arg5)
470 > #define CallMacOS6(type, tvect, arg1, arg2, arg3, arg4, arg5, arg6) call_macos6((uintptr)tvect, (uintptr)arg1, (uintptr)arg2, (uintptr)arg3, (uintptr)arg4, (uintptr)arg5, (uintptr)arg6)
471 > #define CallMacOS7(type, tvect, arg1, arg2, arg3, arg4, arg5, arg6, arg7) call_macos7((uintptr)tvect, (uintptr)arg1, (uintptr)arg2, (uintptr)arg3, (uintptr)arg4, (uintptr)arg5, (uintptr)arg6, (uintptr)arg7)
472  
473   #ifdef __cplusplus
474   extern "C" {

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