| 44 |
|
#include <string.h> |
| 45 |
|
#include <signal.h> |
| 46 |
|
|
| 47 |
+ |
#ifdef HAVE_PTHREADS |
| 48 |
+ |
# include <pthread.h> |
| 49 |
+ |
#endif |
| 50 |
+ |
|
| 51 |
|
#ifdef HAVE_FCNTL_H |
| 52 |
|
# include <fcntl.h> |
| 53 |
|
#endif |
| 72 |
|
#define POWERPC_ROM 1 |
| 73 |
|
|
| 74 |
|
#if EMULATED_PPC |
| 71 |
– |
// Handle interrupts asynchronously? |
| 72 |
– |
#define ASYNC_IRQ 0 |
| 75 |
|
// Mac ROM is write protected when banked memory is used |
| 76 |
|
#if REAL_ADDRESSING || DIRECT_ADDRESSING |
| 77 |
|
# define ROM_IS_WRITE_PROTECTED 0 |
| 80 |
|
# define ROM_IS_WRITE_PROTECTED 1 |
| 81 |
|
#endif |
| 82 |
|
// Configure PowerPC emulator |
| 83 |
< |
#define PPC_CHECK_INTERRUPTS (ASYNC_IRQ ? 0 : 1) |
| 83 |
> |
#define PPC_REENTRANT_JIT 1 |
| 84 |
> |
#define PPC_CHECK_INTERRUPTS 1 |
| 85 |
|
#define PPC_DECODE_CACHE 1 |
| 86 |
|
#define PPC_FLIGHT_RECORDER 1 |
| 87 |
|
#define PPC_PROFILE_COMPILE_TIME 0 |
| 88 |
|
#define PPC_PROFILE_GENERIC_CALLS 0 |
| 89 |
|
#define KPX_MAX_CPUS 1 |
| 90 |
+ |
#if defined(__i386__) |
| 91 |
+ |
#define DYNGEN_ASM_OPTS 1 |
| 92 |
+ |
#endif |
| 93 |
|
#else |
| 94 |
|
// Mac ROM is write protected |
| 95 |
|
#define ROM_IS_WRITE_PROTECTED 1 |
| 145 |
|
**/ |
| 146 |
|
|
| 147 |
|
#if defined(__GNUC__) |
| 148 |
< |
#if defined(__x86_64__) |
| 148 |
> |
#if defined(__x86_64__) || defined(__i386__) |
| 149 |
|
// Linux/AMD64 currently has no asm optimized bswap_32() in <byteswap.h> |
| 150 |
|
#define opt_bswap_32 do_opt_bswap_32 |
| 151 |
|
static inline uint32 do_opt_bswap_32(uint32 x) |
| 190 |
|
((x & 0x000000ff) << 24) ); |
| 191 |
|
} |
| 192 |
|
|
| 193 |
+ |
#if defined(__i386__) |
| 194 |
+ |
#define opt_bswap_64 do_opt_bswap_64 |
| 195 |
+ |
static inline uint64 do_opt_bswap_64(uint64 x) |
| 196 |
+ |
{ |
| 197 |
+ |
return (bswap_32(x >> 32) | (((uint64)bswap_32((uint32)x)) << 32)); |
| 198 |
+ |
} |
| 199 |
+ |
#endif |
| 200 |
+ |
|
| 201 |
|
#ifdef opt_bswap_64 |
| 202 |
|
#undef bswap_64 |
| 203 |
|
#define bswap_64 opt_bswap_64 |
| 231 |
|
// spin locks |
| 232 |
|
#ifdef __GNUC__ |
| 233 |
|
|
| 234 |
< |
#ifdef __powerpc__ |
| 234 |
> |
#if defined(__powerpc__) || defined(__ppc__) |
| 235 |
|
#define HAVE_TEST_AND_SET 1 |
| 236 |
|
static inline int testandset(volatile int *p) |
| 237 |
|
{ |
| 238 |
|
int ret; |
| 239 |
< |
__asm__ __volatile__("0: lwarx %0,0,%1 ;" |
| 240 |
< |
" xor. %0,%3,%0;" |
| 241 |
< |
" bne 1f;" |
| 242 |
< |
" stwcx. %2,0,%1;" |
| 243 |
< |
" bne- 0b;" |
| 239 |
> |
__asm__ __volatile__("0: lwarx %0,0,%1\n" |
| 240 |
> |
" xor. %0,%3,%0\n" |
| 241 |
> |
" bne 1f\n" |
| 242 |
> |
" stwcx. %2,0,%1\n" |
| 243 |
> |
" bne- 0b\n" |
| 244 |
|
"1: " |
| 245 |
|
: "=&r" (ret) |
| 246 |
|
: "r" (p), "r" (1), "r" (0) |
| 249 |
|
} |
| 250 |
|
#endif |
| 251 |
|
|
| 252 |
< |
#ifdef __i386__ |
| 252 |
> |
#if defined(__i386__) || defined(__x86_64__) |
| 253 |
|
#define HAVE_TEST_AND_SET 1 |
| 254 |
|
static inline int testandset(volatile int *p) |
| 255 |
|
{ |
| 256 |
< |
int ret; |
| 243 |
< |
long int readval; |
| 256 |
> |
long int ret; |
| 257 |
|
/* Note: the "xchg" instruction does not need a "lock" prefix */ |
| 258 |
< |
__asm__ __volatile__("xchgl %0, %1" |
| 259 |
< |
: "=r" (ret), "=m" (*p), "=a" (readval) |
| 258 |
> |
__asm__ __volatile__("xchgl %k0, %1" |
| 259 |
> |
: "=r" (ret), "=m" (*p) |
| 260 |
|
: "0" (1), "m" (*p) |
| 261 |
|
: "memory"); |
| 262 |
|
return ret; |
| 361 |
|
extern uint64 GetTicks_usec(void); |
| 362 |
|
extern void Delay_usec(uint32 usec); |
| 363 |
|
|
| 364 |
+ |
#if defined(HAVE_PTHREADS) || (defined(__linux__) && defined(__powerpc__)) |
| 365 |
|
// Setup pthread attributes |
| 366 |
|
extern void Set_pthread_attr(pthread_attr_t *attr, int priority); |
| 367 |
+ |
#endif |
| 368 |
|
|
| 369 |
|
// Various definitions |
| 370 |
|
typedef struct rgb_color { |
