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Comparing SheepShaver/src/Unix/sysdeps.h (file contents):
Revision 1.15 by gbeauche, 2003-11-24T21:20:47Z vs.
Revision 1.22 by gbeauche, 2004-01-18T22:05:28Z

# Line 1 | Line 1
1   /*
2   *  sysdeps.h - System dependent definitions for Linux
3   *
4 < *  SheepShaver (C) 1997-2002 Christian Bauer and Marc Hellwig
4 > *  SheepShaver (C) 1997-2004 Christian Bauer and Marc Hellwig
5   *
6   *  This program is free software; you can redistribute it and/or modify
7   *  it under the terms of the GNU General Public License as published by
# Line 81 | Line 81
81   #define PPC_CHECK_INTERRUPTS (ASYNC_IRQ ? 0 : 1)
82   #define PPC_DECODE_CACHE 1
83   #define PPC_FLIGHT_RECORDER 1
84 + #define PPC_PROFILE_COMPILE_TIME 0
85 + #define PPC_PROFILE_GENERIC_CALLS 0
86 + #define KPX_MAX_CPUS 1
87   #else
88   // Mac ROM is write protected
89   #define ROM_IS_WRITE_PROTECTED 1
# Line 214 | Line 217 | static inline uint64 tswap64(uint64 x) {
217   // spin locks
218   #ifdef __GNUC__
219  
220 < #ifdef __powerpc__
220 > #if defined(__powerpc__) || defined(__ppc__)
221   #define HAVE_TEST_AND_SET 1
222 < static inline int testandset(int *p)
222 > static inline int testandset(volatile int *p)
223   {
224          int ret;
225 <        __asm__ __volatile__("0:    lwarx %0,0,%1 ;"
226 <                                                 "      xor. %0,%3,%0;"
227 <                                                 "      bne 1f;"
228 <                                                 "      stwcx. %2,0,%1;"
229 <                                                 "      bne- 0b;"
225 >        __asm__ __volatile__("0:    lwarx       %0,0,%1\n"
226 >                                                 "      xor.    %0,%3,%0\n"
227 >                                                 "      bne             1f\n"
228 >                                                 "      stwcx.  %2,0,%1\n"
229 >                                                 "      bne-    0b\n"
230                                                   "1:    "
231                                                   : "=&r" (ret)
232                                                   : "r" (p), "r" (1), "r" (0)
# Line 234 | Line 237 | static inline int testandset(int *p)
237  
238   #ifdef __i386__
239   #define HAVE_TEST_AND_SET 1
240 < static inline int testandset(int *p)
240 > static inline int testandset(volatile int *p)
241   {
242 <        char ret;
242 >        int ret;
243          long int readval;
244 <        
245 <        __asm__ __volatile__("lock; cmpxchgl %3, %1; sete %0"
246 <                                                 : "=q" (ret), "=m" (*p), "=a" (readval)
247 <                                                 : "r" (1), "m" (*p), "a" (0)
244 >        /* Note: the "xchg" instruction does not need a "lock" prefix */
245 >        __asm__ __volatile__("xchgl %0, %1"
246 >                                                 : "=r" (ret), "=m" (*p), "=a" (readval)
247 >                                                 : "0" (1), "m" (*p)
248                                                   : "memory");
249          return ret;
250   }
# Line 249 | Line 252 | static inline int testandset(int *p)
252  
253   #ifdef __s390__
254   #define HAVE_TEST_AND_SET 1
255 < static inline int testandset(int *p)
255 > static inline int testandset(volatile int *p)
256   {
257          int ret;
258  
# Line 264 | Line 267 | static inline int testandset(int *p)
267  
268   #ifdef __alpha__
269   #define HAVE_TEST_AND_SET 1
270 < static inline int testandset(int *p)
270 > static inline int testandset(volatile int *p)
271   {
272          int ret;
273          unsigned long one;
# Line 284 | Line 287 | static inline int testandset(int *p)
287  
288   #ifdef __sparc__
289   #define HAVE_TEST_AND_SET 1
290 < static inline int testandset(int *p)
290 > static inline int testandset(volatile int *p)
291   {
292          int ret;
293  
# Line 299 | Line 302 | static inline int testandset(int *p)
302  
303   #ifdef __arm__
304   #define HAVE_TEST_AND_SET 1
305 < static inline int testandset(int *p)
305 > static inline int testandset(volatile int *p)
306   {
307          register unsigned int ret;
308          __asm__ __volatile__("swp %0, %1, [%2]"
# Line 314 | Line 317 | static inline int testandset(int *p)
317  
318   #if HAVE_TEST_AND_SET
319   #define HAVE_SPINLOCKS 1
320 < typedef int spinlock_t;
320 > typedef volatile int spinlock_t;
321  
322   static const spinlock_t SPIN_LOCK_UNLOCKED = 0;
323  
# Line 341 | Line 344 | typedef struct timespec tm_time_t;
344   typedef struct timeval tm_time_t;
345   #endif
346  
347 + // Timing functions
348 + extern uint64 GetTicks_usec(void);
349 + extern void Delay_usec(uint32 usec);
350 +
351   // Setup pthread attributes
352   extern void Set_pthread_attr(pthread_attr_t *attr, int priority);
353  
# Line 352 | Line 359 | typedef struct rgb_color {
359          uint8           alpha;
360   } rgb_color;
361  
362 + // X11 display fast locks
363 + #ifdef HAVE_SPINLOCKS
364 + #define X11_LOCK_TYPE spinlock_t
365 + #define X11_LOCK_INIT SPIN_LOCK_UNLOCKED
366 + #define XDisplayLock() spin_lock(&x_display_lock)
367 + #define XDisplayUnlock() spin_unlock(&x_display_lock)
368 + #elif defined(HAVE_PTHREADS)
369 + #define X11_LOCK_TYPE pthread_mutex_t
370 + #define X11_LOCK_INIT PTHREAD_MUTEX_INITIALIZER
371 + #define XDisplayLock() pthread_mutex_lock(&x_display_lock);
372 + #define XDisplayUnlock() pthread_mutex_unlock(&x_display_lock);
373 + #else
374 + #define XDisplayLock()
375 + #define XDisplayUnlock()
376 + #endif
377 + #ifdef X11_LOCK_TYPE
378 + extern X11_LOCK_TYPE x_display_lock;
379 + #endif
380 +
381   // Macro for calling MacOS routines
382   #define CallMacOS(type, tvect) call_macos((uint32)tvect)
383   #define CallMacOS1(type, tvect, arg1) call_macos1((uint32)tvect, (uint32)arg1)

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