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Comparing SheepShaver/src/Unix/sysdeps.h (file contents):
Revision 1.14 by gbeauche, 2003-11-11T11:32:24Z vs.
Revision 1.28 by gbeauche, 2004-05-14T08:25:30Z

# Line 1 | Line 1
1   /*
2   *  sysdeps.h - System dependent definitions for Linux
3   *
4 < *  SheepShaver (C) 1997-2002 Christian Bauer and Marc Hellwig
4 > *  SheepShaver (C) 1997-2004 Christian Bauer and Marc Hellwig
5   *
6   *  This program is free software; you can redistribute it and/or modify
7   *  it under the terms of the GNU General Public License as published by
# Line 44 | Line 44
44   #include <string.h>
45   #include <signal.h>
46  
47 + #ifdef HAVE_PTHREADS
48 + # include <pthread.h>
49 + #endif
50 +
51   #ifdef HAVE_FCNTL_H
52   # include <fcntl.h>
53   #endif
# Line 81 | Line 85
85   #define PPC_CHECK_INTERRUPTS (ASYNC_IRQ ? 0 : 1)
86   #define PPC_DECODE_CACHE 1
87   #define PPC_FLIGHT_RECORDER 1
88 + #define PPC_PROFILE_COMPILE_TIME 0
89 + #define PPC_PROFILE_GENERIC_CALLS 0
90 + #define KPX_MAX_CPUS 1
91 + #if defined(__i386__)
92 + #define DYNGEN_ASM_OPTS 1
93 + #endif
94   #else
95   // Mac ROM is write protected
96   #define ROM_IS_WRITE_PROTECTED 1
# Line 131 | Line 141 | typedef int64 intptr;
141   #error "Unsupported size of pointer"
142   #endif
143  
144 < // Helper functions to byteswap data
144 > /**
145 > *              Helper functions to byteswap data
146 > **/
147 >
148 > #if defined(__GNUC__)
149 > #if defined(__x86_64__) || defined(__i386__)
150 > // Linux/AMD64 currently has no asm optimized bswap_32() in <byteswap.h>
151 > #define opt_bswap_32 do_opt_bswap_32
152 > static inline uint32 do_opt_bswap_32(uint32 x)
153 > {
154 >  uint32 v;
155 >  __asm__ __volatile__ ("bswap %0" : "=r" (v) : "0" (x));
156 >  return v;
157 > }
158 > #endif
159 > #endif
160 >
161   #ifdef HAVE_BYTESWAP_H
162   #include <byteswap.h>
163   #endif
164  
165 + #ifdef  opt_bswap_16
166 + #undef  bswap_16
167 + #define bswap_16 opt_bswap_16
168 + #endif
169   #ifndef bswap_16
170   #define bswap_16 generic_bswap_16
171   #endif
# Line 145 | Line 175 | static inline uint16 generic_bswap_16(ui
175    return ((x & 0xff) << 8) | ((x >> 8) & 0xff);
176   }
177  
178 + #ifdef  opt_bswap_32
179 + #undef  bswap_32
180 + #define bswap_32 opt_bswap_32
181 + #endif
182   #ifndef bswap_32
183   #define bswap_32 generic_bswap_32
184   #endif
# Line 157 | Line 191 | static inline uint32 generic_bswap_32(ui
191                    ((x & 0x000000ff) << 24) );
192   }
193  
194 + #if defined(__i386__)
195 + #define opt_bswap_64 do_opt_bswap_64
196 + static inline uint64 do_opt_bswap_64(uint64 x)
197 + {
198 +  return (bswap_32(x >> 32) | (((uint64)bswap_32((uint32)x)) << 32));
199 + }
200 + #endif
201 +
202 + #ifdef  opt_bswap_64
203 + #undef  bswap_64
204 + #define bswap_64 opt_bswap_64
205 + #endif
206   #ifndef bswap_64
207   #define bswap_64 generic_bswap_64
208   #endif
# Line 186 | Line 232 | static inline uint64 tswap64(uint64 x) {
232   // spin locks
233   #ifdef __GNUC__
234  
235 < #ifdef __powerpc__
235 > #if defined(__powerpc__) || defined(__ppc__)
236   #define HAVE_TEST_AND_SET 1
237 < static inline int testandset(int *p)
237 > static inline int testandset(volatile int *p)
238   {
239          int ret;
240 <        __asm__ __volatile__("0:    lwarx %0,0,%1 ;"
241 <                                                 "      xor. %0,%3,%0;"
242 <                                                 "      bne 1f;"
243 <                                                 "      stwcx. %2,0,%1;"
244 <                                                 "      bne- 0b;"
240 >        __asm__ __volatile__("0:    lwarx       %0,0,%1\n"
241 >                                                 "      xor.    %0,%3,%0\n"
242 >                                                 "      bne             1f\n"
243 >                                                 "      stwcx.  %2,0,%1\n"
244 >                                                 "      bne-    0b\n"
245                                                   "1:    "
246                                                   : "=&r" (ret)
247                                                   : "r" (p), "r" (1), "r" (0)
# Line 206 | Line 252 | static inline int testandset(int *p)
252  
253   #ifdef __i386__
254   #define HAVE_TEST_AND_SET 1
255 < static inline int testandset(int *p)
255 > static inline int testandset(volatile int *p)
256   {
257 <        char ret;
257 >        int ret;
258          long int readval;
259 <        
260 <        __asm__ __volatile__("lock; cmpxchgl %3, %1; sete %0"
261 <                                                 : "=q" (ret), "=m" (*p), "=a" (readval)
262 <                                                 : "r" (1), "m" (*p), "a" (0)
259 >        /* Note: the "xchg" instruction does not need a "lock" prefix */
260 >        __asm__ __volatile__("xchgl %0, %1"
261 >                                                 : "=r" (ret), "=m" (*p), "=a" (readval)
262 >                                                 : "0" (1), "m" (*p)
263                                                   : "memory");
264          return ret;
265   }
# Line 221 | Line 267 | static inline int testandset(int *p)
267  
268   #ifdef __s390__
269   #define HAVE_TEST_AND_SET 1
270 < static inline int testandset(int *p)
270 > static inline int testandset(volatile int *p)
271   {
272          int ret;
273  
# Line 236 | Line 282 | static inline int testandset(int *p)
282  
283   #ifdef __alpha__
284   #define HAVE_TEST_AND_SET 1
285 < static inline int testandset(int *p)
285 > static inline int testandset(volatile int *p)
286   {
287          int ret;
288          unsigned long one;
# Line 256 | Line 302 | static inline int testandset(int *p)
302  
303   #ifdef __sparc__
304   #define HAVE_TEST_AND_SET 1
305 < static inline int testandset(int *p)
305 > static inline int testandset(volatile int *p)
306   {
307          int ret;
308  
# Line 271 | Line 317 | static inline int testandset(int *p)
317  
318   #ifdef __arm__
319   #define HAVE_TEST_AND_SET 1
320 < static inline int testandset(int *p)
320 > static inline int testandset(volatile int *p)
321   {
322          register unsigned int ret;
323          __asm__ __volatile__("swp %0, %1, [%2]"
# Line 286 | Line 332 | static inline int testandset(int *p)
332  
333   #if HAVE_TEST_AND_SET
334   #define HAVE_SPINLOCKS 1
335 < typedef int spinlock_t;
335 > typedef volatile int spinlock_t;
336  
337   static const spinlock_t SPIN_LOCK_UNLOCKED = 0;
338  
# Line 313 | Line 359 | typedef struct timespec tm_time_t;
359   typedef struct timeval tm_time_t;
360   #endif
361  
362 + // Timing functions
363 + extern uint64 GetTicks_usec(void);
364 + extern void Delay_usec(uint32 usec);
365 +
366 + #if defined(HAVE_PTHREADS) || (defined(__linux__) && defined(__powerpc__))
367   // Setup pthread attributes
368   extern void Set_pthread_attr(pthread_attr_t *attr, int priority);
369 + #endif
370  
371   // Various definitions
372   typedef struct rgb_color {
# Line 324 | Line 376 | typedef struct rgb_color {
376          uint8           alpha;
377   } rgb_color;
378  
379 + // X11 display fast locks
380 + #ifdef HAVE_SPINLOCKS
381 + #define X11_LOCK_TYPE spinlock_t
382 + #define X11_LOCK_INIT SPIN_LOCK_UNLOCKED
383 + #define XDisplayLock() spin_lock(&x_display_lock)
384 + #define XDisplayUnlock() spin_unlock(&x_display_lock)
385 + #elif defined(HAVE_PTHREADS)
386 + #define X11_LOCK_TYPE pthread_mutex_t
387 + #define X11_LOCK_INIT PTHREAD_MUTEX_INITIALIZER
388 + #define XDisplayLock() pthread_mutex_lock(&x_display_lock);
389 + #define XDisplayUnlock() pthread_mutex_unlock(&x_display_lock);
390 + #else
391 + #define XDisplayLock()
392 + #define XDisplayUnlock()
393 + #endif
394 + #ifdef X11_LOCK_TYPE
395 + extern X11_LOCK_TYPE x_display_lock;
396 + #endif
397 +
398   // Macro for calling MacOS routines
399   #define CallMacOS(type, tvect) call_macos((uint32)tvect)
400   #define CallMacOS1(type, tvect, arg1) call_macos1((uint32)tvect, (uint32)arg1)

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