1 |
|
/* |
2 |
|
* main_beos.cpp - Emulation core, BeOS implementation |
3 |
|
* |
4 |
< |
* SheepShaver (C) 1997-2002 Christian Bauer and Marc Hellwig |
4 |
> |
* SheepShaver (C) 1997-2004 Christian Bauer and Marc Hellwig |
5 |
|
* |
6 |
|
* This program is free software; you can redistribute it and/or modify |
7 |
|
* it under the terms of the GNU General Public License as published by |
117 |
|
const char RAM_AREA_NAME[] = "Macintosh RAM"; |
118 |
|
const char ROM_AREA_NAME[] = "Macintosh ROM"; |
119 |
|
const char DR_CACHE_AREA_NAME[] = "Macintosh DR Cache"; |
120 |
+ |
const char DR_EMULATOR_AREA_NAME[] = "Macintosh DR Emulator"; |
121 |
|
const char SHEEP_AREA_NAME[] = "SheepShaver Virtual Stack"; |
122 |
|
|
123 |
|
const uint32 SIG_STACK_SIZE = 8192; // Size of signal stack |
143 |
|
// Initialize other variables |
144 |
|
sheep_fd = -1; |
145 |
|
emulator_data = NULL; |
146 |
< |
kernel_area = kernel_area2 = rom_area = ram_area = dr_cache_area = -1; |
146 |
> |
kernel_area = kernel_area2 = rom_area = ram_area = dr_cache_area = dr_emulator_area = -1; |
147 |
|
emul_thread = nvram_thread = tick_thread = -1; |
148 |
|
ReadyForSignals = false; |
149 |
|
AllowQuitting = true; |
191 |
|
area_id rom_area; // ROM area ID |
192 |
|
area_id ram_area; // RAM area ID |
193 |
|
area_id dr_cache_area; // DR Cache area ID |
194 |
+ |
area_id dr_emulator_area; // DR Emulator area ID |
195 |
|
|
196 |
|
struct sigaction sigusr1_action; // Interrupt signal (of emulator thread) |
197 |
|
struct sigaction sigsegv_action; // Data access exception signal (of emulator thread) |
215 |
|
uint32 KernelDataAddr; // Address of Kernel Data |
216 |
|
uint32 BootGlobsAddr; // Address of BootGlobs structure at top of Mac RAM |
217 |
|
uint32 DRCacheAddr; // Address of DR Cache |
218 |
+ |
uint32 DREmulatorAddr; // Address of DR Emulator |
219 |
|
uint32 PVR; // Theoretical PVR |
220 |
|
int64 CPUClockSpeed; // Processor clock speed (Hz) |
221 |
|
int64 BusClockSpeed; // Bus clock speed (Hz) |
222 |
+ |
int64 TimebaseSpeed; // Timebase clock speed (Hz) |
223 |
|
system_info SysInfo; // System information |
224 |
+ |
uint8 *RAMBaseHost; // Base address of Mac RAM (host address space) |
225 |
+ |
uint8 *ROMBaseHost; // Base address of Mac ROM (host address space) |
226 |
|
|
227 |
|
static void *sig_stack = NULL; // Stack for signal handlers |
228 |
|
static void *extra_stack = NULL; // Stack for SIGSEGV inside interrupt handler |
229 |
+ |
uint32 SheepMem::page_size; // Size of a native page |
230 |
|
uintptr SheepMem::zero_page = 0; // Address of ro page filled in with zeros |
231 |
|
uintptr SheepMem::base; // Address of SheepShaver data |
232 |
|
uintptr SheepMem::top; // Top of SheepShaver data (stack like storage) |
302 |
|
} |
303 |
|
CPUClockSpeed = SysInfo.cpu_clock_speed; |
304 |
|
BusClockSpeed = SysInfo.bus_clock_speed; |
305 |
+ |
TimebaseSpeed = BusClockSpeed / 4; |
306 |
|
|
307 |
|
// Delete old areas |
308 |
|
area_id old_kernel_area = find_area(KERNEL_AREA_NAME); |
320 |
|
area_id old_dr_cache_area = find_area(DR_CACHE_AREA_NAME); |
321 |
|
if (old_dr_cache_area > 0) |
322 |
|
delete_area(old_dr_cache_area); |
323 |
+ |
area_id old_dr_emulator_area = find_area(DR_EMULATOR_AREA_NAME); |
324 |
+ |
if (old_dr_emulator_area > 0) |
325 |
+ |
delete_area(old_dr_emulator_area); |
326 |
|
|
327 |
|
// Read preferences |
328 |
|
int argc = 0; |
413 |
|
|
414 |
|
// Create area for SheepShaver data |
415 |
|
if (!SheepMem::Init()) { |
416 |
< |
sprintf(str, GetString(STR_NO_SHEEP_MEM_AREA_ERR)); |
416 |
> |
sprintf(str, GetString(STR_NO_SHEEP_MEM_AREA_ERR), strerror(SheepMemArea), SheepMemArea); |
417 |
|
ErrorAlert(str); |
418 |
|
PostMessage(B_QUIT_REQUESTED); |
419 |
|
return; |
434 |
|
PostMessage(B_QUIT_REQUESTED); |
435 |
|
return; |
436 |
|
} |
437 |
< |
D(bug("RAM area %ld at %p\n", ram_area, RAMBase)); |
437 |
> |
RAMBaseHost = (uint8 *)RAMBase |
438 |
> |
D(bug("RAM area %ld at %p\n", ram_area, RAMBaseHost)); |
439 |
|
|
440 |
|
// Create area and load Mac ROM |
441 |
|
try { |
469 |
|
} |
470 |
|
D(bug("DR Cache area %ld at %p\n", dr_cache_area, DRCacheAddr)); |
471 |
|
|
472 |
+ |
// Create area for DR Emulator |
473 |
+ |
DREmulatorAddr = DR_EMULATOR_BASE; |
474 |
+ |
dr_emulator_area = create_area(DR_EMULATOR_AREA_NAME, (void **)&DREmulatorAddr, B_EXACT_ADDRESS, DR_EMULATOR_SIZE, B_NO_LOCK, B_READ_AREA | B_WRITE_AREA); |
475 |
+ |
if (dr_emulator_area < 0) { |
476 |
+ |
sprintf(str, GetString(STR_NO_KERNEL_DATA_ERR), strerror(dr_emulator_area), dr_emulator_area); |
477 |
+ |
ErrorAlert(str); |
478 |
+ |
PostMessage(B_QUIT_REQUESTED); |
479 |
+ |
return; |
480 |
+ |
} |
481 |
+ |
D(bug("DR Emulator area %ld at %p\n", dr_emulator_area, DREmulatorAddr)); |
482 |
+ |
|
483 |
|
// Load NVRAM |
484 |
|
XPRAMInit(); |
485 |
|
|
545 |
|
|
546 |
|
// Clear caches (as we loaded and patched code) and write protect ROM |
547 |
|
#if !EMULATED_PPC |
548 |
< |
clear_caches((void *)ROM_BASE, ROM_AREA_SIZE, B_INVALIDATE_ICACHE | B_FLUSH_DCACHE); |
548 |
> |
clear_caches(ROMBaseHost, ROM_AREA_SIZE, B_INVALIDATE_ICACHE | B_FLUSH_DCACHE); |
549 |
|
#endif |
550 |
|
set_area_protection(rom_area, B_READ_AREA); |
551 |
|
|
705 |
|
// Delete SheepShaver globals |
706 |
|
SheepMem::Exit(); |
707 |
|
|
708 |
+ |
// Delete DR Emulator area |
709 |
+ |
if (dr_emulator_area >= 0) |
710 |
+ |
delete_area(dr_emulator_area); |
711 |
+ |
|
712 |
|
// Delete DR Cache area |
713 |
|
if (dr_cache_area >= 0) |
714 |
|
delete_area(dr_cache_area); |
753 |
|
|
754 |
|
void SheepShaver::init_rom(void) |
755 |
|
{ |
756 |
+ |
// Size of a native page |
757 |
+ |
page_size = B_PAGE_SIZE; |
758 |
+ |
|
759 |
|
// Create area for ROM |
760 |
< |
void *rom_addr = (void *)ROM_BASE; |
761 |
< |
rom_area = create_area(ROM_AREA_NAME, &rom_addr, B_EXACT_ADDRESS, ROM_AREA_SIZE, B_NO_LOCK, B_READ_AREA | B_WRITE_AREA); |
760 |
> |
ROMBaseHost = (uint8 *)ROM_BASE; |
761 |
> |
rom_area = create_area(ROM_AREA_NAME, (void **)&ROMBaseHost, B_EXACT_ADDRESS, ROM_AREA_SIZE, B_NO_LOCK, B_READ_AREA | B_WRITE_AREA); |
762 |
|
if (rom_area < 0) |
763 |
|
throw area_error(); |
764 |
|
D(bug("ROM area %ld at %p\n", rom_area, rom_addr)); |
1340 |
|
* Make code executable |
1341 |
|
*/ |
1342 |
|
|
1343 |
< |
void MakeExecutable(int dummy, void *start, uint32 length) |
1343 |
> |
void MakeExecutable(int dummy, uint32 start, uint32 length) |
1344 |
|
{ |
1345 |
< |
if (((uint32)start >= ROM_BASE) && ((uint32)start < (ROM_BASE + ROM_SIZE))) |
1345 |
> |
if ((start >= ROM_BASE) && (start < (ROM_BASE + ROM_SIZE))) |
1346 |
|
return; |
1347 |
< |
clear_caches(start, length, B_INVALIDATE_ICACHE | B_FLUSH_DCACHE); |
1347 |
> |
clear_caches((void *)start, length, B_INVALIDATE_ICACHE | B_FLUSH_DCACHE); |
1348 |
|
} |
1349 |
|
|
1350 |
|
|