[ViewVC] Diff of: cebix/SheepShaver/src/BeOS/main

Comparing SheepShaver/src/BeOS/main_beos.cpp (file contents):
Revision 1.10 by cebix, 2004-01-12T15:37:19Z vs.
Revision 1.15 by gbeauche, 2004-11-22T21:22:58Z

#	Line 117 \| Line 117 \| const char KERNEL_AREA2_NAME[] = "Macint
117		const char RAM_AREA_NAME[] = "Macintosh RAM";
118		const char ROM_AREA_NAME[] = "Macintosh ROM";
119		const char DR_CACHE_AREA_NAME[] = "Macintosh DR Cache";
120	+	const char DR_EMULATOR_AREA_NAME[] = "Macintosh DR Emulator";
121		const char SHEEP_AREA_NAME[] = "SheepShaver Virtual Stack";
122
123		const uint32 SIG_STACK_SIZE = 8192; // Size of signal stack
#	Line 142 \| Line 143 \| public:
143		// Initialize other variables
144		sheep_fd = -1;
145		emulator_data = NULL;
146	<	kernel_area = kernel_area2 = rom_area = ram_area = dr_cache_area = -1;
146	>	kernel_area = kernel_area2 = rom_area = ram_area = dr_cache_area = dr_emulator_area = -1;
147		emul_thread = nvram_thread = tick_thread = -1;
148		ReadyForSignals = false;
149		AllowQuitting = true;
#	Line 190 \| Line 191 \| private:
191		area_id rom_area; // ROM area ID
192		area_id ram_area; // RAM area ID
193		area_id dr_cache_area; // DR Cache area ID
194	+	area_id dr_emulator_area; // DR Emulator area ID
195
196		struct sigaction sigusr1_action; // Interrupt signal (of emulator thread)
197		struct sigaction sigsegv_action; // Data access exception signal (of emulator thread)
#	Line 213 \| Line 215 \| uint32 RAMSize; // Size of Mac RAM
215		uint32 KernelDataAddr; // Address of Kernel Data
216		uint32 BootGlobsAddr; // Address of BootGlobs structure at top of Mac RAM
217		uint32 DRCacheAddr; // Address of DR Cache
218	+	uint32 DREmulatorAddr; // Address of DR Emulator
219		uint32 PVR; // Theoretical PVR
220		int64 CPUClockSpeed; // Processor clock speed (Hz)
221		int64 BusClockSpeed; // Bus clock speed (Hz)
222	+	int64 TimebaseSpeed; // Timebase clock speed (Hz)
223		system_info SysInfo; // System information
224	+	uint8 *RAMBaseHost; // Base address of Mac RAM (host address space)
225	+	uint8 *ROMBaseHost; // Base address of Mac ROM (host address space)
226
227		static void *sig_stack = NULL; // Stack for signal handlers
228		static void *extra_stack = NULL; // Stack for SIGSEGV inside interrupt handler
229	+	uint32 SheepMem::page_size; // Size of a native page
230		uintptr SheepMem::zero_page = 0; // Address of ro page filled in with zeros
231		uintptr SheepMem::base; // Address of SheepShaver data
232	<	uintptr SheepMem::top; // Top of SheepShaver data (stack like storage)
232	>	uintptr SheepMem::proc; // Bottom address of SheepShave procedures
233	>	uintptr SheepMem::data; // Top of SheepShaver data (stack like storage)
234		static area_id SheepMemArea; // SheepShaver data area ID
235
236
#	Line 295 \| Line 303 \| void SheepShaver::ReadyToRun(void)
303		}
304		CPUClockSpeed = SysInfo.cpu_clock_speed;
305		BusClockSpeed = SysInfo.bus_clock_speed;
306	+	TimebaseSpeed = BusClockSpeed / 4;
307
308		// Delete old areas
309		area_id old_kernel_area = find_area(KERNEL_AREA_NAME);
#	Line 312 \| Line 321 \| void SheepShaver::ReadyToRun(void)
321		area_id old_dr_cache_area = find_area(DR_CACHE_AREA_NAME);
322		if (old_dr_cache_area > 0)
323		delete_area(old_dr_cache_area);
324	+	area_id old_dr_emulator_area = find_area(DR_EMULATOR_AREA_NAME);
325	+	if (old_dr_emulator_area > 0)
326	+	delete_area(old_dr_emulator_area);
327
328		// Read preferences
329		int argc = 0;
#	Line 402 \| Line 414 \| void SheepShaver::StartEmulator(void)
414
415		// Create area for SheepShaver data
416		if (!SheepMem::Init()) {
417	<	sprintf(str, GetString(STR_NO_SHEEP_MEM_AREA_ERR));
417	>	sprintf(str, GetString(STR_NO_SHEEP_MEM_AREA_ERR), strerror(SheepMemArea), SheepMemArea);
418		ErrorAlert(str);
419		PostMessage(B_QUIT_REQUESTED);
420		return;
#	Line 423 \| Line 435 \| void SheepShaver::StartEmulator(void)
435		PostMessage(B_QUIT_REQUESTED);
436		return;
437		}
438	<	D(bug("RAM area %ld at %p\n", ram_area, RAMBase));
438	>	RAMBaseHost = (uint8 *)RAMBase
439	>	D(bug("RAM area %ld at %p\n", ram_area, RAMBaseHost));
440
441		// Create area and load Mac ROM
442		try {
#	Line 457 \| Line 470 \| void SheepShaver::StartEmulator(void)
470		}
471		D(bug("DR Cache area %ld at %p\n", dr_cache_area, DRCacheAddr));
472
473	+	// Create area for DR Emulator
474	+	DREmulatorAddr = DR_EMULATOR_BASE;
475	+	dr_emulator_area = create_area(DR_EMULATOR_AREA_NAME, (void **)&DREmulatorAddr, B_EXACT_ADDRESS, DR_EMULATOR_SIZE, B_NO_LOCK, B_READ_AREA \| B_WRITE_AREA);
476	+	if (dr_emulator_area < 0) {
477	+	sprintf(str, GetString(STR_NO_KERNEL_DATA_ERR), strerror(dr_emulator_area), dr_emulator_area);
478	+	ErrorAlert(str);
479	+	PostMessage(B_QUIT_REQUESTED);
480	+	return;
481	+	}
482	+	D(bug("DR Emulator area %ld at %p\n", dr_emulator_area, DREmulatorAddr));
483	+
484		// Load NVRAM
485		XPRAMInit();
486
#	Line 522 \| Line 546 \| void SheepShaver::StartEmulator(void)
546
547		// Clear caches (as we loaded and patched code) and write protect ROM
548		#if !EMULATED_PPC
549	<	clear_caches((void *)ROM_BASE, ROM_AREA_SIZE, B_INVALIDATE_ICACHE \| B_FLUSH_DCACHE);
549	>	clear_caches(ROMBaseHost, ROM_AREA_SIZE, B_INVALIDATE_ICACHE \| B_FLUSH_DCACHE);
550		#endif
551		set_area_protection(rom_area, B_READ_AREA);
552
#	Line 682 \| Line 706 \| void SheepShaver::Quit(void)
706		// Delete SheepShaver globals
707		SheepMem::Exit();
708
709	+	// Delete DR Emulator area
710	+	if (dr_emulator_area >= 0)
711	+	delete_area(dr_emulator_area);
712	+
713		// Delete DR Cache area
714		if (dr_cache_area >= 0)
715		delete_area(dr_cache_area);
#	Line 726 \| Line 754 \| void SheepShaver::Quit(void)
754
755		void SheepShaver::init_rom(void)
756		{
757	+	// Size of a native page
758	+	page_size = B_PAGE_SIZE;
759	+
760		// Create area for ROM
761	<	void rom_addr = (void )ROM_BASE;
762	<	rom_area = create_area(ROM_AREA_NAME, &rom_addr, B_EXACT_ADDRESS, ROM_AREA_SIZE, B_NO_LOCK, B_READ_AREA \| B_WRITE_AREA);
761	>	ROMBaseHost = (uint8 *)ROM_BASE;
762	>	rom_area = create_area(ROM_AREA_NAME, (void **)&ROMBaseHost, B_EXACT_ADDRESS, ROM_AREA_SIZE, B_NO_LOCK, B_READ_AREA \| B_WRITE_AREA);
763		if (rom_area < 0)
764		throw area_error();
765		D(bug("ROM area %ld at %p\n", rom_area, rom_addr));
#	Line 1310 \| Line 1341 \| *void Dump68kRegs(M68kRegisters r)**
1341		* Make code executable
1342		*/
1343
1344	<	void MakeExecutable(int dummy, void *start, uint32 length)
1344	>	void MakeExecutable(int dummy, uint32 start, uint32 length)
1345		{
1346	<	if (((uint32)start >= ROM_BASE) && ((uint32)start < (ROM_BASE + ROM_SIZE)))
1346	>	if ((start >= ROM_BASE) && (start < (ROM_BASE + ROM_SIZE)))
1347		return;
1348	<	clear_caches(start, length, B_INVALIDATE_ICACHE \| B_FLUSH_DCACHE);
1348	>	clear_caches((void *)start, length, B_INVALIDATE_ICACHE \| B_FLUSH_DCACHE);
1349		}
1350
1351
#	Line 2079 \| Line 2110 \| bool SheepMem::Init(void)
2110		delete_area(old_sheep_area);
2111
2112		// Create area for SheepShaver data
2113	<	base = 0x60000000;
2113	>	proc = base = 0x60000000;
2114		SheepMemArea = create_area(SHEEP_AREA_NAME, (void **)&base, B_BASE_ADDRESS, size, B_NO_LOCK, B_READ_AREA \| B_WRITE_AREA);
2115		if (SheepMemArea < 0)
2116		return false;
#	Line 2089 \| Line 2120 \| bool SheepMem::Init(void)
2120		zero_page = const_zero_page;
2121
2122		D(bug("SheepShaver area %ld at %p\n", SheepMemArea, base));
2123	<	top = base + size;
2123	>	data = base + size;
2124		return true;
2125		}
2126

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Comparing SheepShaver/src/BeOS/main_beos.cpp (file contents): Revision 1.10 by cebix, 2004-01-12T15:37:19Z vs. Revision 1.15 by gbeauche, 2004-11-22T21:22:58Z

Diff Legend

Comparing SheepShaver/src/BeOS/main_beos.cpp (file contents):
Revision 1.10 by cebix, 2004-01-12T15:37:19Z vs.
Revision 1.15 by gbeauche, 2004-11-22T21:22:58Z