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root/cebix/BasiliskII/src/uae_cpu/newcpu.h
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Comparing BasiliskII/src/uae_cpu/newcpu.h (file contents):
Revision 1.4 by gbeauche, 2000-09-22T17:21:45Z vs.
Revision 1.14 by gbeauche, 2005-06-04T16:47:14Z

# Line 9 | Line 9
9   #ifndef NEWCPU_H
10   #define NEWCPU_H
11  
12 < #define SPCFLAG_STOP 2
13 < #define SPCFLAG_DISK 4
14 < #define SPCFLAG_INT  8
15 < #define SPCFLAG_BRK  16
16 < #define SPCFLAG_EXTRA_CYCLES 32
17 < #define SPCFLAG_TRACE 64
18 < #define SPCFLAG_DOTRACE 128
19 < #define SPCFLAG_DOINT 256
20 < #define SPCFLAG_BLTNASTY 512
21 < #define SPCFLAG_EXEC 1024
22 < #define SPCFLAG_MODE_CHANGE 8192
23 <
24 < #ifndef SET_CFLG
25 <
26 < #define SET_CFLG(x) (CFLG = (x))
27 < #define SET_NFLG(x) (NFLG = (x))
28 < #define SET_VFLG(x) (VFLG = (x))
29 < #define SET_ZFLG(x) (ZFLG = (x))
30 < #define SET_XFLG(x) (XFLG = (x))
31 <
32 < #define GET_CFLG CFLG
33 < #define GET_NFLG NFLG
34 < #define GET_VFLG VFLG
35 < #define GET_ZFLG ZFLG
36 < #define GET_XFLG XFLG
37 <
38 < #define CLEAR_CZNV do { \
39 < SET_CFLG (0); \
40 < SET_ZFLG (0); \
41 < SET_NFLG (0); \
42 < SET_VFLG (0); \
43 < } while (0)
44 <
45 < #define COPY_CARRY (SET_XFLG (GET_CFLG))
12 > #ifndef FLIGHT_RECORDER
13 > #define FLIGHT_RECORDER 0
14   #endif
15  
16 + #include "m68k.h"
17 + #include "readcpu.h"
18 + #include "spcflags.h"
19 +
20   extern int areg_byteinc[];
21   extern int imm8_table[];
22  
# Line 52 | Line 24 | extern int movem_index1[256];
24   extern int movem_index2[256];
25   extern int movem_next[256];
26  
55 extern int fpp_movem_index1[256];
56 extern int fpp_movem_index2[256];
57 extern int fpp_movem_next[256];
58
27   extern int broken_in;
28  
29 < typedef void REGPARAM2 cpuop_func (uae_u32) REGPARAM;
29 > #ifdef X86_ASSEMBLY
30 > /* This hack seems to force all register saves (pushl %reg) to be moved to the
31 >   begining of the function, thus making it possible to cpuopti to remove them
32 >   since m68k_run_1 will save those registers before calling the instruction
33 >   handler */
34 > # define cpuop_tag(tag)         __asm__ __volatile__ ( "#cpuop_" tag )
35 > #else
36 > # define cpuop_tag(tag)         ;
37 > #endif
38  
39 + #define cpuop_begin()           do { cpuop_tag("begin"); } while (0)
40 + #define cpuop_end()                     do { cpuop_tag("end"); } while (0)
41 +
42 + typedef void REGPARAM2 cpuop_func (uae_u32) REGPARAM;
43 +
44   struct cputbl {
45      cpuop_func *handler;
46 <    int specific;
46 >    uae_u16 specific;
47      uae_u16 opcode;
48   };
49  
50 < extern void REGPARAM2 op_illg (uae_u32) REGPARAM;
50 > extern cpuop_func *cpufunctbl[65536] ASM_SYM_FOR_FUNC ("cpufunctbl");
51  
52 < typedef char flagtype;
52 > #if USE_JIT
53 > typedef void compop_func (uae_u32) REGPARAM;
54  
55 < extern struct regstruct
56 < {
57 <    uae_u32 regs[16];
58 <    uaecptr  usp,isp,msp;
59 <    uae_u16 sr;
60 <    flagtype t1;
61 <    flagtype t0;
62 <    flagtype s;
81 <    flagtype m;
82 <    flagtype x;
83 <    flagtype stopped;
84 <    int intmask;
85 <
86 <    uae_u32 pc;
87 <    uae_u8 *pc_p;
88 <    uae_u8 *pc_oldp;
55 > struct comptbl {
56 >    compop_func *handler;
57 >        uae_u32         specific;
58 >        uae_u32         opcode;
59 > };
60 > #endif
61 >
62 > extern void REGPARAM2 op_illg (uae_u32) REGPARAM;
63  
64 <    uae_u32 vbr,sfc,dfc;
64 > typedef char flagtype;
65  
66 <    double fp[8];
67 <    uae_u32 fpcr,fpsr,fpiar;
66 > struct regstruct {
67 >    uae_u32             regs[16];
68  
69 <    uae_u32 spcflags;
70 <    uae_u32 kick_mask;
69 >    uae_u32             pc;
70 >    uae_u8 *    pc_p;
71 >    uae_u8 *    pc_oldp;
72 >
73 >        spcflags_t      spcflags;
74 >    int                 intmask;
75 >
76 >    uae_u32             vbr, sfc, dfc;
77 >    uaecptr             usp, isp, msp;
78 >    uae_u16             sr;
79 >    flagtype    t1;
80 >    flagtype    t0;
81 >    flagtype    s;
82 >    flagtype    m;
83 >    flagtype    x;
84 >    flagtype    stopped;
85  
86 + #if USE_PREFETCH_BUFFER
87      /* Fellow sources say this is 4 longwords. That's impossible. It needs
88       * to be at least a longword. The HRM has some cryptic comment about two
89       * instructions being on the same longword boundary.
90       * The way this is implemented now seems like a good compromise.
91       */
92      uae_u32 prefetch;
93 < } regs, lastint_regs;
93 > #endif
94 > };
95 >
96 > extern regstruct regs, lastint_regs;
97  
98   #define m68k_dreg(r,num) ((r).regs[(num)])
99   #define m68k_areg(r,num) (((r).regs + 8)[(num)])
# Line 116 | Line 108 | extern struct regstruct
108   #define GET_OPCODE (get_iword (0))
109   #endif
110  
111 + #if USE_PREFETCH_BUFFER
112   static __inline__ uae_u32 get_ibyte_prefetch (uae_s32 o)
113   {
114      if (o > 3 || o < 0)
# Line 138 | Line 131 | static __inline__ uae_u32 get_ilong_pref
131          return do_get_mem_long(&regs.prefetch);
132      return (do_get_mem_word (((uae_u16 *)&regs.prefetch) + 1) << 16) | do_get_mem_word ((uae_u16 *)(regs.pc_p + 4));
133   }
134 + #endif
135  
136   #define m68k_incpc(o) (regs.pc_p += (o))
137  
# Line 190 | Line 184 | static __inline__ uae_u32 next_ilong (vo
184      return r;
185   }
186  
193 #if !defined USE_COMPILER
187   static __inline__ void m68k_setpc (uaecptr newpc)
188   {
189   #if REAL_ADDRESSING || DIRECT_ADDRESSING
# Line 200 | Line 193 | static __inline__ void m68k_setpc (uaecp
193      regs.pc = newpc;
194   #endif
195   }
203 #else
204 extern void m68k_setpc (uaecptr newpc);
205 #endif
196  
197   static __inline__ uaecptr m68k_getpc (void)
198   {
# Line 213 | Line 203 | static __inline__ uaecptr m68k_getpc (vo
203   #endif
204   }
205  
216 #ifdef USE_COMPILER
217 extern void m68k_setpc_fast (uaecptr newpc);
218 extern void m68k_setpc_bcc (uaecptr newpc);
219 extern void m68k_setpc_rte (uaecptr newpc);
220 #else
206   #define m68k_setpc_fast m68k_setpc
207   #define m68k_setpc_bcc  m68k_setpc
208   #define m68k_setpc_rte  m68k_setpc
209 < #endif
209 >
210 > static __inline__ void m68k_do_rts(void)
211 > {
212 >            m68k_setpc(get_long(m68k_areg(regs, 7)));
213 >                m68k_areg(regs, 7) += 4;
214 > }
215 >
216 > static __inline__ void m68k_do_bsr(uaecptr oldpc, uae_s32 offset)
217 > {
218 >            m68k_areg(regs, 7) -= 4;
219 >                put_long(m68k_areg(regs, 7), oldpc);
220 >                    m68k_incpc(offset);
221 > }
222 >
223 > static __inline__ void m68k_do_jsr(uaecptr oldpc, uaecptr dest)
224 > {
225 >            m68k_areg(regs, 7) -= 4;
226 >                put_long(m68k_areg(regs, 7), oldpc);
227 >                    m68k_setpc(dest);
228 > }
229  
230   static __inline__ void m68k_setstopped (int stop)
231   {
232      regs.stopped = stop;
233 <    if (stop)
234 <        regs.spcflags |= SPCFLAG_STOP;
233 >    /* A traced STOP instruction drops through immediately without
234 >       actually stopping.  */
235 >    if (stop && (regs.spcflags & SPCFLAG_DOTRACE) == 0)
236 >    SPCFLAGS_SET( SPCFLAG_STOP );
237   }
238  
239   extern uae_u32 get_disp_ea_020 (uae_u32 base, uae_u32 dp);
# Line 239 | Line 245 | extern void MakeSR (void);
245   extern void MakeFromSR (void);
246   extern void Exception (int, uaecptr);
247   extern void dump_counts (void);
248 < extern void m68k_move2c (int, uae_u32 *);
249 < extern void m68k_movec2 (int, uae_u32 *);
248 > extern int m68k_move2c (int, uae_u32 *);
249 > extern int m68k_movec2 (int, uae_u32 *);
250   extern void m68k_divl (uae_u32, uae_u32, uae_u16, uaecptr);
251   extern void m68k_mull (uae_u32, uae_u32, uae_u16);
252 + extern void m68k_emulop (uae_u32);
253 + extern void m68k_emulop_return (void);
254   extern void init_m68k (void);
255   extern void exit_m68k (void);
248 extern void m68k_go (int);
256   extern void m68k_dumpstate (uaecptr *);
257   extern void m68k_disasm (uaecptr, uaecptr *, int);
258   extern void m68k_reset (void);
259   extern void m68k_enter_debugger(void);
260 + extern int m68k_do_specialties(void);
261  
262   extern void mmu_op (uae_u32, uae_u16);
263  
256 extern void fpp_opp (uae_u32, uae_u16);
257 extern void fdbcc_opp (uae_u32, uae_u16);
258 extern void fscc_opp (uae_u32, uae_u16);
259 extern void ftrapcc_opp (uae_u32,uaecptr);
260 extern void fbcc_opp (uae_u32, uaecptr, uae_u32);
261 extern void fsave_opp (uae_u32);
262 extern void frestore_opp (uae_u32);
263
264 extern void fpu_set_integral_fpu (bool is_integral);
265 extern void fpu_init (void);
266 extern void fpu_exit (void);
267 extern void fpu_reset (void);
268
264   /* Opcode of faulting instruction */
265   extern uae_u16 last_op_for_exception_3;
266   /* PC at fault time */
# Line 276 | Line 271 | extern uaecptr last_fault_for_exception_
271   #define CPU_OP_NAME(a) op ## a
272  
273   /* 68020 + 68881 */
274 < extern struct cputbl op_smalltbl_0[];
274 > extern struct cputbl op_smalltbl_0_ff[];
275   /* 68020 */
276 < extern struct cputbl op_smalltbl_1[];
276 > extern struct cputbl op_smalltbl_1_ff[];
277   /* 68010 */
278 < extern struct cputbl op_smalltbl_2[];
278 > extern struct cputbl op_smalltbl_2_ff[];
279   /* 68000 */
280 < extern struct cputbl op_smalltbl_3[];
280 > extern struct cputbl op_smalltbl_3_ff[];
281   /* 68000 slow but compatible.  */
282 < extern struct cputbl op_smalltbl_4[];
288 <
289 < extern cpuop_func *cpufunctbl[65536] ASM_SYM_FOR_FUNC ("cpufunctbl");
282 > extern struct cputbl op_smalltbl_4_ff[];
283  
284 + #if FLIGHT_RECORDER
285 + extern void m68k_record_step(uaecptr) REGPARAM;
286 + #endif
287 + extern void m68k_do_execute(void);
288 + extern void m68k_execute(void);
289 + #if USE_JIT
290 + #if defined(X86_ASSEMBLY) || defined(X86_64_ASSEMBLY)
291 + /* This is generated code */
292 + extern void (*m68k_compile_execute)(void);
293 + #else
294 + extern void m68k_do_compile_execute(void);
295 + extern void m68k_compile_execute(void);
296 + #endif
297 + #endif
298 +
299   #endif /* NEWCPU_H */

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