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#ifndef NEWCPU_H |
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#define NEWCPU_H |
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|
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#ifndef FLIGHT_RECORDER |
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#define FLIGHT_RECORDER 0 |
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#endif |
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|
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#include "m68k.h" |
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#include "readcpu.h" |
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#include "spcflags.h" |
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extern int movem_index2[256]; |
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extern int movem_next[256]; |
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|
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extern int fpp_movem_index1[256]; |
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extern int fpp_movem_index2[256]; |
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extern int fpp_movem_next[256]; |
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|
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extern int broken_in; |
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|
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/* Control flow information */ |
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#define CFLOW_NORMAL 0 |
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#define CFLOW_BRANCH 1 |
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#define CFLOW_JUMP 2 |
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#define CFLOW_TRAP CFLOW_JUMP |
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#define CFLOW_RETURN 3 |
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#define CFLOW_SPCFLAGS 32 /* some spcflags are set */ |
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#define CFLOW_EXEC_RETURN 64 /* must exit from the execution loop */ |
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|
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#define cpuop_rettype void |
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#define cpuop_return(v) do { (v); return; } while (0) |
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|
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#ifdef X86_ASSEMBLY |
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/* This hack seems to force all register saves (pushl %reg) to be moved to the |
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begining of the function, thus making it possible to cpuopti to remove them |
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#endif |
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|
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#define cpuop_begin() do { cpuop_tag("begin"); } while (0) |
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#define cpuop_end(cflow) do { cpuop_tag("end"); cpuop_return(cflow); } while (0) |
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#define cpuop_end() do { cpuop_tag("end"); } while (0) |
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|
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typedef cpuop_rettype REGPARAM2 cpuop_func (uae_u32) REGPARAM; |
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typedef void REGPARAM2 cpuop_func (uae_u32) REGPARAM; |
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|
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struct cputbl { |
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cpuop_func *handler; |
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uae_u16 opcode; |
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}; |
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|
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< |
extern cpuop_rettype REGPARAM2 op_illg (uae_u32) REGPARAM; |
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> |
extern cpuop_func *cpufunctbl[65536] ASM_SYM_FOR_FUNC ("cpufunctbl"); |
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> |
|
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#if USE_JIT |
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typedef void compop_func (uae_u32) REGPARAM; |
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> |
|
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> |
struct comptbl { |
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> |
compop_func *handler; |
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> |
uae_u32 specific; |
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> |
uae_u32 opcode; |
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}; |
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#endif |
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> |
|
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> |
extern void REGPARAM2 op_illg (uae_u32) REGPARAM; |
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|
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typedef char flagtype; |
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|
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flagtype x; |
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flagtype stopped; |
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|
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double fp[8]; |
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uae_u32 fpcr,fpsr,fpiar; |
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|
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#if USE_PREFETCH_BUFFER |
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/* Fellow sources say this is 4 longwords. That's impossible. It needs |
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* to be at least a longword. The HRM has some cryptic comment about two |
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|
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extern void mmu_op (uae_u32, uae_u16); |
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|
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extern void fpp_opp (uae_u32, uae_u16); |
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extern void fdbcc_opp (uae_u32, uae_u16); |
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extern void fscc_opp (uae_u32, uae_u16); |
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extern void ftrapcc_opp (uae_u32,uaecptr); |
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extern void fbcc_opp (uae_u32, uaecptr, uae_u32); |
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extern void fsave_opp (uae_u32); |
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extern void frestore_opp (uae_u32); |
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|
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extern void fpu_set_integral_fpu (bool is_integral); |
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extern void fpu_init (void); |
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extern void fpu_exit (void); |
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extern void fpu_reset (void); |
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|
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/* Opcode of faulting instruction */ |
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extern uae_u16 last_op_for_exception_3; |
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/* PC at fault time */ |
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/* 68000 slow but compatible. */ |
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extern struct cputbl op_smalltbl_4_ff[]; |
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|
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+ |
#if FLIGHT_RECORDER |
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+ |
extern void m68k_record_step(uaecptr) REGPARAM; |
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#endif |
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extern void m68k_do_execute(void); |
| 288 |
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extern void m68k_execute(void); |
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+ |
#if USE_JIT |
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+ |
#if defined(X86_ASSEMBLY) || defined(X86_64_ASSEMBLY) |
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/* This is generated code */ |
| 292 |
+ |
extern void (*m68k_compile_execute)(void); |
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#else |
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+ |
extern void m68k_do_compile_execute(void); |
| 295 |
+ |
extern void m68k_compile_execute(void); |
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+ |
#endif |
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+ |
#endif |
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#ifdef USE_CPU_EMUL_SERVICES |
| 299 |
+ |
extern int32 emulated_ticks; |
| 300 |
+ |
extern void cpu_do_check_ticks(void); |
| 301 |
+ |
|
| 302 |
+ |
static inline void cpu_check_ticks(void) |
| 303 |
+ |
{ |
| 304 |
+ |
if (--emulated_ticks <= 0) |
| 305 |
+ |
cpu_do_check_ticks(); |
| 306 |
+ |
} |
| 307 |
+ |
#else |
| 308 |
+ |
#define cpu_check_ticks() |
| 309 |
+ |
#define cpu_do_check_ticks() |
| 310 |
+ |
#endif |
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|
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#endif /* NEWCPU_H */ |
