| 26 |
|
|
| 27 |
|
extern int broken_in; |
| 28 |
|
|
| 29 |
– |
/* Control flow information */ |
| 30 |
– |
#define CFLOW_NORMAL 0 |
| 31 |
– |
#define CFLOW_BRANCH 1 |
| 32 |
– |
#define CFLOW_JUMP 2 |
| 33 |
– |
#define CFLOW_RETURN 3 |
| 34 |
– |
#define CFLOW_TRAP 4 |
| 35 |
– |
#define CFLOW_SPCFLAGS 32 /* some spcflags are set */ |
| 36 |
– |
#define CFLOW_EXEC_RETURN 64 /* must exit from the execution loop */ |
| 37 |
– |
|
| 38 |
– |
#define cpuop_rettype void |
| 39 |
– |
#define cpuop_return(v) do { (v); return; } while (0) |
| 40 |
– |
|
| 29 |
|
#ifdef X86_ASSEMBLY |
| 30 |
|
/* This hack seems to force all register saves (pushl %reg) to be moved to the |
| 31 |
|
begining of the function, thus making it possible to cpuopti to remove them |
| 37 |
|
#endif |
| 38 |
|
|
| 39 |
|
#define cpuop_begin() do { cpuop_tag("begin"); } while (0) |
| 40 |
< |
#define cpuop_end(cflow) do { cpuop_tag("end"); cpuop_return(cflow); } while (0) |
| 40 |
> |
#define cpuop_end() do { cpuop_tag("end"); } while (0) |
| 41 |
|
|
| 42 |
< |
typedef cpuop_rettype REGPARAM2 cpuop_func (uae_u32) REGPARAM; |
| 42 |
> |
typedef void REGPARAM2 cpuop_func (uae_u32) REGPARAM; |
| 43 |
|
|
| 44 |
|
struct cputbl { |
| 45 |
|
cpuop_func *handler; |
| 59 |
|
}; |
| 60 |
|
#endif |
| 61 |
|
|
| 62 |
< |
extern cpuop_rettype REGPARAM2 op_illg (uae_u32) REGPARAM; |
| 62 |
> |
extern void REGPARAM2 op_illg (uae_u32) REGPARAM; |
| 63 |
|
|
| 64 |
|
typedef char flagtype; |
| 65 |
|
|
| 282 |
|
extern struct cputbl op_smalltbl_4_ff[]; |
| 283 |
|
|
| 284 |
|
#if FLIGHT_RECORDER |
| 285 |
< |
extern void m68k_record_step(uaecptr); |
| 285 |
> |
extern void m68k_record_step(uaecptr) REGPARAM; |
| 286 |
|
#endif |
| 287 |
|
extern void m68k_do_execute(void); |
| 288 |
|
extern void m68k_execute(void); |
| 289 |
|
#if USE_JIT |
| 290 |
< |
#ifdef X86_ASSEMBLY |
| 290 |
> |
#if defined(X86_ASSEMBLY) || defined(X86_64_ASSEMBLY) |
| 291 |
|
/* This is generated code */ |
| 292 |
|
extern void (*m68k_compile_execute)(void); |
| 293 |
|
#else |
