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root/cebix/BasiliskII/src/uae_cpu/newcpu.cpp
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Comparing BasiliskII/src/uae_cpu/newcpu.cpp (file contents):
Revision 1.1 by cebix, 1999-10-03T14:16:26Z vs.
Revision 1.6 by gbeauche, 2000-09-05T16:53:19Z

# Line 111 | Line 111 | static __inline__ unsigned int cft_map (
111   #endif
112   }
113  
114 < static unsigned long REGPARAM2 op_illg_1 (uae_u32 opcode) REGPARAM;
114 > static void REGPARAM2 op_illg_1 (uae_u32 opcode) REGPARAM;
115  
116 < static unsigned long REGPARAM2 op_illg_1 (uae_u32 opcode)
116 > static void REGPARAM2 op_illg_1 (uae_u32 opcode)
117   {
118      op_illg (cft_map (opcode));
119 –    return 4;
119   }
120  
121   static void build_cpufunctbl (void)
122   {
123      int i;
124      unsigned long opcode;
125 <        int cpu_level = (FPUType ? 3 : CPUType >= 2 ? 2 : CPUType == 1 ? 1 : 0);
126 <    struct cputbl *tbl = (cpu_level == 3 ? op_smalltbl_0
127 <                          : cpu_level == 2 ? op_smalltbl_1
128 <                          : cpu_level == 1 ? op_smalltbl_2
129 <                          : op_smalltbl_3);
125 >        int cpu_level = 0;              // 68000 (default)
126 >        if (CPUType == 4)
127 >                cpu_level = 4;          // 68040 with FPU
128 >        else {
129 >                if (FPUType)
130 >                        cpu_level = 3;  // 68020 with FPU
131 >                else if (CPUType >= 2)
132 >                        cpu_level = 2;  // 68020
133 >                else if (CPUType == 1)
134 >                        cpu_level = 1;
135 >        }
136 >    struct cputbl *tbl = (
137 >                  cpu_level == 4 ? op_smalltbl_0
138 >                : cpu_level == 3 ? op_smalltbl_1
139 >                : cpu_level == 2 ? op_smalltbl_2
140 >                : cpu_level == 1 ? op_smalltbl_3
141 >                : op_smalltbl_4);
142  
143      for (opcode = 0; opcode < 65536; opcode++)
144          cpufunctbl[cft_map (opcode)] = op_illg_1;
# Line 172 | Line 183 | void init_m68k (void)
183          for (j = 7 ; j >= 0 ; j--) {
184                  if (i & (1 << j)) break;
185          }
186 <        fpp_movem_index1[i] = j;
187 <        fpp_movem_index2[i] = 7-j;
186 >        fpp_movem_index1[i] = 7-j;
187 >        fpp_movem_index2[i] = j;
188          fpp_movem_next[i] = i & (~(1 << j));
189      }
190   #if COUNT_INSTRS
# Line 196 | Line 207 | void init_m68k (void)
207      do_merges ();
208  
209      build_cpufunctbl ();
210 +    
211 +    fpu_init ();
212 +    fpu_set_integral_fpu (CPUType == 4);
213 + }
214 +
215 + void exit_m68k (void)
216 + {
217 +        fpu_exit ();
218   }
219  
220   struct regstruct regs, lastint_regs;
# Line 239 | Line 258 | uae_s32 ShowEA (int reg, amodes mode, wo
258          disp16 = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
259          addr = m68k_areg(regs,reg) + (uae_s16)disp16;
260          sprintf (buffer,"(A%d,$%04x) == $%08lx", reg, disp16 & 0xffff,
261 <                                        (long unsigned int)addr);
261 >                                        (unsigned long)addr);
262          break;
263       case Ad8r:
264          dp = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
# Line 272 | Line 291 | uae_s32 ShowEA (int reg, amodes mode, wo
291                      dp & 0x8000 ? 'A' : 'D', (int)r, dp & 0x800 ? 'L' : 'W',
292                      1 << ((dp >> 9) & 3),
293                      disp,outer,
294 <                    (long unsigned int)addr);
294 >                    (unsigned long)addr);
295          } else {
296            addr = m68k_areg(regs,reg) + (uae_s32)((uae_s8)disp8) + dispreg;
297            sprintf (buffer,"(A%d, %c%d.%c*%d, $%02x) == $%08lx", reg,
298                 dp & 0x8000 ? 'A' : 'D', (int)r, dp & 0x800 ? 'L' : 'W',
299                 1 << ((dp >> 9) & 3), disp8,
300 <               (long unsigned int)addr);
300 >               (unsigned long)addr);
301          }
302          break;
303       case PC16:
304          addr = m68k_getpc () + m68kpc_offset;
305          disp16 = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
306          addr += (uae_s16)disp16;
307 <        sprintf (buffer,"(PC,$%04x) == $%08lx", disp16 & 0xffff,(long unsigned int)addr);
307 >        sprintf (buffer,"(PC,$%04x) == $%08lx", disp16 & 0xffff,(unsigned long)addr);
308          break;
309       case PC8r:
310          addr = m68k_getpc () + m68kpc_offset;
# Line 319 | Line 338 | uae_s32 ShowEA (int reg, amodes mode, wo
338                      dp & 0x8000 ? 'A' : 'D', (int)r, dp & 0x800 ? 'L' : 'W',
339                      1 << ((dp >> 9) & 3),
340                      disp,outer,
341 <                    (long unsigned int)addr);
341 >                    (unsigned long)addr);
342          } else {
343            addr += (uae_s32)((uae_s8)disp8) + dispreg;
344            sprintf (buffer,"(PC, %c%d.%c*%d, $%02x) == $%08lx", dp & 0x8000 ? 'A' : 'D',
345                  (int)r, dp & 0x800 ? 'L' : 'W',  1 << ((dp >> 9) & 3),
346 <                disp8, (long unsigned int)addr);
346 >                disp8, (unsigned long)addr);
347          }
348          break;
349       case absw:
350 <        sprintf (buffer,"$%08lx", (long unsigned int)(uae_s32)(uae_s16)get_iword_1 (m68kpc_offset));
350 >        sprintf (buffer,"$%08lx", (unsigned long)(uae_s32)(uae_s16)get_iword_1 (m68kpc_offset));
351          m68kpc_offset += 2;
352          break;
353       case absl:
354 <        sprintf (buffer,"$%08lx", (long unsigned int)get_ilong_1 (m68kpc_offset));
354 >        sprintf (buffer,"$%08lx", (unsigned long)get_ilong_1 (m68kpc_offset));
355          m68kpc_offset += 4;
356          break;
357       case imm:
# Line 346 | Line 365 | uae_s32 ShowEA (int reg, amodes mode, wo
365              m68kpc_offset += 2;
366              break;
367           case sz_long:
368 <            sprintf (buffer,"#$%08lx", (long unsigned int)(get_ilong_1 (m68kpc_offset)));
368 >            sprintf (buffer,"#$%08lx", (unsigned long)(get_ilong_1 (m68kpc_offset)));
369              m68kpc_offset += 4;
370              break;
371           default:
# Line 366 | Line 385 | uae_s32 ShowEA (int reg, amodes mode, wo
385       case imm2:
386          offset = (uae_s32)get_ilong_1 (m68kpc_offset);
387          m68kpc_offset += 4;
388 <        sprintf (buffer,"#$%08lx", (long unsigned int)offset);
388 >        sprintf (buffer,"#$%08lx", (unsigned long)offset);
389          break;
390       case immi:
391          offset = (uae_s32)(uae_s8)(reg & 0xff);
392 <        sprintf (buffer,"#$%08lx", (long unsigned int)offset);
392 >        sprintf (buffer,"#$%08lx", (unsigned long)offset);
393          break;
394       default:
395          break;
# Line 710 | Line 729 | static void Interrupt(int nr)
729      regs.spcflags |= SPCFLAG_INT;
730   }
731  
732 < static int caar, cacr;
732 > static int caar, cacr, tc, itt0, itt1, dtt0, dtt1;
733  
734   void m68k_move2c (int regno, uae_u32 *regp)
735   {
# Line 721 | Line 740 | void m68k_move2c (int regno, uae_u32 *re
740           case 0: regs.sfc = *regp & 7; break;
741           case 1: regs.dfc = *regp & 7; break;
742           case 2: cacr = *regp & 0x3; break;     /* ignore C and CE */
743 +         case 3: tc = *regp & 0xc000; break;
744 +         case 4: itt0 = *regp & 0xffffe364; break;
745 +         case 5: itt1 = *regp & 0xffffe364; break;
746 +         case 6: dtt0 = *regp & 0xffffe364; break;
747 +         case 7: dtt1 = *regp & 0xffffe364; break;
748           case 0x800: regs.usp = *regp; break;
749           case 0x801: regs.vbr = *regp; break;
750           case 0x802: caar = *regp &0xfc; break;
# Line 741 | Line 765 | void m68k_movec2 (int regno, uae_u32 *re
765           case 0: *regp = regs.sfc; break;
766           case 1: *regp = regs.dfc; break;
767           case 2: *regp = cacr; break;
768 +         case 3: *regp = tc; break;
769 +         case 4: *regp = itt0; break;
770 +         case 5: *regp = itt1; break;
771 +         case 6: *regp = dtt0; break;
772 +         case 7: *regp = dtt1; break;
773           case 0x800: *regp = regs.usp; break;
774           case 0x801: *regp = regs.vbr; break;
775           case 0x802: *regp = caar; break;
# Line 1026 | Line 1055 | void m68k_reset (void)
1055      regs.spcflags = 0;
1056      regs.intmask = 7;
1057      regs.vbr = regs.sfc = regs.dfc = 0;
1058 <    regs.fpcr = regs.fpsr = regs.fpiar = 0;
1058 >    /* gb-- moved into {fpp,fpu_x86}.cpp::fpu_init()
1059 >    regs.fpcr = regs.fpsr = regs.fpiar = 0; */
1060 >    fpu_reset();
1061   }
1062  
1063 < unsigned long REGPARAM2 op_illg (uae_u32 opcode)
1063 > void REGPARAM2 op_illg (uae_u32 opcode)
1064   {
1065      uaecptr pc = m68k_getpc ();
1066  
# Line 1043 | Line 1074 | unsigned long REGPARAM2 op_illg (uae_u32
1074                  if (opcode == M68K_EXEC_RETURN) {
1075                          regs.spcflags |= SPCFLAG_BRK;
1076                          quit_program = 1;
1077 <                        return 4;
1077 >                        return;
1078                  }
1079  
1080                  // Call EMUL_OP opcode
# Line 1062 | Line 1093 | unsigned long REGPARAM2 op_illg (uae_u32
1093                  MakeFromSR();
1094                  m68k_incpc(2);
1095                  fill_prefetch_0 ();
1096 <                return 4;
1096 >                return;
1097          }
1098  
1099      if ((opcode & 0xF000) == 0xA000) {
1100          Exception(0xA,0);
1101 <        return 4;
1101 >        return;
1102      }
1103  
1104 + //    write_log ("Illegal instruction: %04x at %08lx\n", opcode, pc);
1105 +
1106      if ((opcode & 0xF000) == 0xF000) {
1107          Exception(0xB,0);
1108 <        return 4;
1108 >        return;
1109      }
1110  
1111      write_log ("Illegal instruction: %04x at %08lx\n", opcode, pc);
1112 +
1113      Exception (4,0);
1080 –    return 4;
1114   }
1115  
1116   void mmu_op(uae_u32 opcode, uae_u16 extra)
# Line 1172 | Line 1205 | static int do_specialties (void)
1205  
1206   static void m68k_run_1 (void)
1207   {
1208 <    for (;;) {
1209 <        int cycles;
1210 <        uae_u32 opcode = GET_OPCODE;
1211 < #if 0
1212 <        if (get_ilong (0) != do_get_mem_long (&regs.prefetch)) {
1213 <            debugging = 1;
1214 <            return;
1182 <        }
1183 < #endif
1184 <        /* assert (!regs.stopped && !(regs.spcflags & SPCFLAG_STOP)); */
1185 < /*      regs_backup[backup_pointer = (backup_pointer + 1) % 16] = regs;*/
1186 < #if COUNT_INSTRS == 2
1187 <        if (table68k[cft_map (opcode)].handler != -1)
1188 <            instrcount[table68k[cft_map (opcode)].handler]++;
1189 < #elif COUNT_INSTRS == 1
1190 <        instrcount[opcode]++;
1191 < #endif
1192 < #if defined(X86_ASSEMBLYxxx)
1193 <        __asm__ __volatile__("\tcall *%%ebx"
1194 <                             : "=&a" (cycles) : "b" (cpufunctbl[opcode]), "0" (opcode)
1195 <                             : "%edx", "%ecx",
1196 <                             "%esi", "%edi", "%ebp", "memory", "cc");
1197 < #else
1198 <        cycles = (*cpufunctbl[opcode])(opcode);
1199 < #endif
1200 <        /*n_insns++;*/
1201 <        if (regs.spcflags) {
1202 <            if (do_specialties ())
1203 <                return;
1208 >        for (;;) {
1209 >                uae_u32 opcode = GET_OPCODE;
1210 >                (*cpufunctbl[opcode])(opcode);
1211 >                if (regs.spcflags) {
1212 >                        if (do_specialties())
1213 >                                return;
1214 >                }
1215          }
1205 –    }
1216   }
1217  
1208 – #ifdef X86_ASSEMBLYxxx
1209 – static __inline__ void m68k_run1 (void)
1210 – {
1211 –    /* Work around compiler bug: GCC doesn't push %ebp in m68k_run_1. */
1212 –    __asm__ __volatile__ ("pushl %%ebp\n\tcall *%0\n\tpopl %%ebp" : : "r" (m68k_run_1) : "%eax", "%edx", "%ecx", "memory", "cc");
1213 – }
1214 – #else
1218   #define m68k_run1 m68k_run_1
1216 – #endif
1219  
1220   int in_m68k_go = 0;
1221  

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