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root/cebix/BasiliskII/src/uae_cpu/m68k.h

Comparing BasiliskII/src/uae_cpu/m68k.h (file contents):
Revision 1.2 by cebix, 1999-10-21T15:27:11Z vs.
Revision 1.7 by gbeauche, 2006-02-06T22:55:44Z

#	Line 6 | Line 6
6		* Copyright 1996 Bernd Schmidt
7		*/
8
9	<	#if defined(__i386__) && defined(X86_ASSEMBLY)
9	>	#ifndef M68K_FLAGS_H
10	>	#define M68K_FLAGS_H
11
12	+	#ifdef OPTIMIZED_FLAGS
13	+
14	+	#if (defined(__i386__) && defined(X86_ASSEMBLY)) || (defined(__x86_64__) && defined(X86_64_ASSEMBLY))
15	+
16	+	#ifndef SAHF_SETO_PROFITABLE
17	+
18	+	/* PUSH/POP instructions are naturally 64-bit sized on x86-64, thus
19	+	unsigned long hereunder is either 64-bit or 32-bit wide depending
20	+	on the target.  */
21		struct flag_struct {
22	<	unsigned int cznv;
23	<	unsigned int x;
22	>	unsigned long cznv;
23	>	unsigned long x;
24		};
25
26	<	#define SET_ZFLG(y) (regflags.cznv = (regflags.cznv & ~0x40) | (((y) & 1) << 6))
27	<	#define SET_CFLG(y) (regflags.cznv = (regflags.cznv & ~1) | ((y) & 1))
18	<	#define SET_VFLG(y) (regflags.cznv = (regflags.cznv & ~0x800) | (((y) & 1) << 11))
19	<	#define SET_NFLG(y) (regflags.cznv = (regflags.cznv & ~0x80) | (((y) & 1) << 7))
20	<	#define SET_XFLG(y) (regflags.x = (y))
21	<
22	<	#define GET_ZFLG ((regflags.cznv >> 6) & 1)
23	<	#define GET_CFLG (regflags.cznv & 1)
24	<	#define GET_VFLG ((regflags.cznv >> 11) & 1)
25	<	#define GET_NFLG ((regflags.cznv >> 7) & 1)
26	<	#define GET_XFLG (regflags.x & 1)
26	>	#define FLAGVAL_Z       0x40
27	>	#define FLAGVAL_N       0x80
28
29	<	#define CLEAR_CZNV (regflags.cznv = 0)
30	<	#define COPY_CARRY (regflags.x = regflags.cznv)
29	>	#define SET_ZFLG(y)     (regflags.cznv = (((uae_u32)regflags.cznv) & ~0x40) | (((y) & 1) << 6))
30	>	#define SET_CFLG(y)     (regflags.cznv = (((uae_u32)regflags.cznv) & ~1) | ((y) & 1))
31	>	#define SET_VFLG(y)     (regflags.cznv = (((uae_u32)regflags.cznv) & ~0x800) | (((y) & 1) << 11))
32	>	#define SET_NFLG(y)     (regflags.cznv = (((uae_u32)regflags.cznv) & ~0x80) | (((y) & 1) << 7))
33	>	#define SET_XFLG(y)     (regflags.x = (y))
34	>
35	>	#define GET_ZFLG        ((regflags.cznv >> 6) & 1)
36	>	#define GET_CFLG        (regflags.cznv & 1)
37	>	#define GET_VFLG        ((regflags.cznv >> 11) & 1)
38	>	#define GET_NFLG        ((regflags.cznv >> 7) & 1)
39	>	#define GET_XFLG        (regflags.x & 1)
40	>
41	>	#define CLEAR_CZNV      (regflags.cznv = 0)
42	>	#define GET_CZNV        (regflags.cznv)
43	>	#define IOR_CZNV(X)     (regflags.cznv |= (X))
44	>	#define SET_CZNV(X)     (regflags.cznv = (X))
45	>
46	>	#define COPY_CARRY      (regflags.x = regflags.cznv)
47
48		extern struct flag_struct regflags __asm__ ("regflags");
49
#	Line 58 | Line 75 | static __inline__ int cctrue(int cc)
75		return 0;
76		}
77
78	<	#define x86_flag_testl(v) \
79	<	__asm__ __volatile__ ("testl %1,%1\n\t" \
80	<	"pushfl\n\t" \
81	<	"popl %0\n\t" \
78	>	#define optflag_testl(v) \
79	>	__asm__ __volatile__ ("andl %1,%1\n\t" \
80	>	"pushf\n\t" \
81	>	"pop %0\n\t" \
82		: "=r" (regflags.cznv) : "r" (v) : "cc")
83
84	<	#define x86_flag_testw(v) \
85	<	__asm__ __volatile__ ("testw %w1,%w1\n\t" \
86	<	"pushfl\n\t" \
87	<	"popl %0\n\t" \
84	>	#define optflag_testw(v) \
85	>	__asm__ __volatile__ ("andw %w1,%w1\n\t" \
86	>	"pushf\n\t" \
87	>	"pop %0\n\t" \
88		: "=r" (regflags.cznv) : "r" (v) : "cc")
89
90	<	#define x86_flag_testb(v) \
91	<	__asm__ __volatile__ ("testb %b1,%b1\n\t" \
92	<	"pushfl\n\t" \
93	<	"popl %0\n\t" \
90	>	#define optflag_testb(v) \
91	>	__asm__ __volatile__ ("andb %b1,%b1\n\t" \
92	>	"pushf\n\t" \
93	>	"pop %0\n\t" \
94		: "=r" (regflags.cznv) : "q" (v) : "cc")
95
96	<	#define x86_flag_addl(v, s, d) do { \
96	>	#define optflag_addl(v, s, d) do { \
97		__asm__ __volatile__ ("addl %k2,%k1\n\t" \
98	<	"pushfl\n\t" \
99	<	"popl %0\n\t" \
98	>	"pushf\n\t" \
99	>	"pop %0\n\t" \
100		: "=r" (regflags.cznv), "=r" (v) : "rmi" (s), "1" (d) : "cc"); \
101		COPY_CARRY; \
102		} while (0)
103
104	<	#define x86_flag_addw(v, s, d) do { \
104	>	#define optflag_addw(v, s, d) do { \
105		__asm__ __volatile__ ("addw %w2,%w1\n\t" \
106	<	"pushfl\n\t" \
107	<	"popl %0\n\t" \
106	>	"pushf\n\t" \
107	>	"pop %0\n\t" \
108		: "=r" (regflags.cznv), "=r" (v) : "rmi" (s), "1" (d) : "cc"); \
109		COPY_CARRY; \
110		} while (0)
111
112	<	#define x86_flag_addb(v, s, d) do { \
112	>	#define optflag_addb(v, s, d) do { \
113		__asm__ __volatile__ ("addb %b2,%b1\n\t" \
114	<	"pushfl\n\t" \
115	<	"popl %0\n\t" \
114	>	"pushf\n\t" \
115	>	"pop %0\n\t" \
116		: "=r" (regflags.cznv), "=q" (v) : "qmi" (s), "1" (d) : "cc"); \
117		COPY_CARRY; \
118		} while (0)
119
120	<	#define x86_flag_subl(v, s, d) do { \
120	>	#define optflag_subl(v, s, d) do { \
121		__asm__ __volatile__ ("subl %k2,%k1\n\t" \
122	<	"pushfl\n\t" \
123	<	"popl %0\n\t" \
122	>	"pushf\n\t" \
123	>	"pop %0\n\t" \
124		: "=r" (regflags.cznv), "=r" (v) : "rmi" (s), "1" (d) : "cc"); \
125		COPY_CARRY; \
126		} while (0)
127
128	<	#define x86_flag_subw(v, s, d) do { \
128	>	#define optflag_subw(v, s, d) do { \
129		__asm__ __volatile__ ("subw %w2,%w1\n\t" \
130	<	"pushfl\n\t" \
131	<	"popl %0\n\t" \
130	>	"pushf\n\t" \
131	>	"pop %0\n\t" \
132		: "=r" (regflags.cznv), "=r" (v) : "rmi" (s), "1" (d) : "cc"); \
133		COPY_CARRY; \
134		} while (0)
135
136	<	#define x86_flag_subb(v, s, d) do { \
136	>	#define optflag_subb(v, s, d) do { \
137		__asm__ __volatile__ ("subb %b2,%b1\n\t" \
138	<	"pushfl\n\t" \
139	<	"popl %0\n\t" \
138	>	"pushf\n\t" \
139	>	"pop %0\n\t" \
140		: "=r" (regflags.cznv), "=q" (v) : "qmi" (s), "1" (d) : "cc"); \
141		COPY_CARRY; \
142		} while (0)
143
144	<	#define x86_flag_cmpl(s, d) \
144	>	#define optflag_cmpl(s, d) \
145		__asm__ __volatile__ ("cmpl %k1,%k2\n\t" \
146	<	"pushfl\n\t" \
147	<	"popl %0\n\t" \
146	>	"pushf\n\t" \
147	>	"pop %0\n\t" \
148		: "=r" (regflags.cznv) : "rmi" (s), "r" (d) : "cc")
149
150	<	#define x86_flag_cmpw(s, d) \
150	>	#define optflag_cmpw(s, d) \
151		__asm__ __volatile__ ("cmpw %w1,%w2\n\t" \
152	<	"pushfl\n\t" \
153	<	"popl %0\n\t" \
152	>	"pushf\n\t" \
153	>	"pop %0\n\t" \
154		: "=r" (regflags.cznv) : "rmi" (s), "r" (d) : "cc")
155
156	<	#define x86_flag_cmpb(s, d) \
156	>	#define optflag_cmpb(s, d) \
157		__asm__ __volatile__ ("cmpb %b1,%b2\n\t" \
158	<	"pushfl\n\t" \
159	<	"popl %0\n\t" \
158	>	"pushf\n\t" \
159	>	"pop %0\n\t" \
160		: "=r" (regflags.cznv) : "qmi" (s), "q" (d) : "cc")
161
162	+	#else
163	+
164	+	struct flag_struct {
165	+	uae_u32 cznv;
166	+	uae_u32 x;
167	+	};
168	+
169	+	#define FLAGVAL_Z       0x4000
170	+	#define FLAGVAL_N       0x8000
171	+
172	+	#define SET_ZFLG(y)     (regflags.cznv = (regflags.cznv & ~0x4000) | (((y) & 1) << 14))
173	+	#define SET_CFLG(y)     (regflags.cznv = (regflags.cznv & ~0x100) | (((y) & 1) << 8))
174	+	#define SET_VFLG(y)     (regflags.cznv = (regflags.cznv & ~0x1) | (((y) & 1)))
175	+	#define SET_NFLG(y)     (regflags.cznv = (regflags.cznv & ~0x8000) | (((y) & 1) << 15))
176	+	#define SET_XFLG(y)     (regflags.x = (y))
177	+
178	+	#define GET_ZFLG        ((regflags.cznv >> 14) & 1)
179	+	#define GET_CFLG        ((regflags.cznv >> 8) & 1)
180	+	#define GET_VFLG        ((regflags.cznv >> 0) & 1)
181	+	#define GET_NFLG        ((regflags.cznv >> 15) & 1)
182	+	#define GET_XFLG        (regflags.x & 1)
183	+
184	+	#define CLEAR_CZNV      (regflags.cznv = 0)
185	+	#define GET_CZNV        (regflags.cznv)
186	+	#define IOR_CZNV(X)     (regflags.cznv |= (X))
187	+	#define SET_CZNV(X)     (regflags.cznv = (X))
188	+
189	+	#define COPY_CARRY      (regflags.x = (regflags.cznv)>>8)
190	+
191	+	extern struct flag_struct regflags __asm__ ("regflags");
192	+
193	+	static __inline__ int cctrue(int cc)
194	+	{
195	+	uae_u32 cznv = regflags.cznv;
196	+	switch(cc){
197	+	case 0: return 1;                       /* T */
198	+	case 1: return 0;                       /* F */
199	+	case 2: return (cznv & 0x4100) == 0; /* !GET_CFLG && !GET_ZFLG;  HI */
200	+	case 3: return (cznv & 0x4100) != 0; /* GET_CFLG || GET_ZFLG;    LS */
201	+	case 4: return (cznv & 0x100) == 0;  /* !GET_CFLG;               CC */
202	+	case 5: return (cznv & 0x100) != 0;  /* GET_CFLG;                CS */
203	+	case 6: return (cznv & 0x4000) == 0; /* !GET_ZFLG;               NE */
204	+	case 7: return (cznv & 0x4000) != 0; /* GET_ZFLG;                EQ */
205	+	case 8: return (cznv & 0x01) == 0;   /* !GET_VFLG;               VC */
206	+	case 9: return (cznv & 0x01) != 0;   /* GET_VFLG;                VS */
207	+	case 10:return (cznv & 0x8000) == 0; /* !GET_NFLG;               PL */
208	+	case 11:return (cznv & 0x8000) != 0; /* GET_NFLG;                MI */
209	+	case 12:return (((cznv << 15) ^ cznv) & 0x8000) == 0; /* GET_NFLG == GET_VFLG;             GE */
210	+	case 13:return (((cznv << 15) ^ cznv) & 0x8000) != 0;/* GET_NFLG != GET_VFLG;             LT */
211	+	case 14:
212	+	cznv &= 0xc001;
213	+	return (((cznv << 15) ^ cznv) & 0xc000) == 0; /* !GET_ZFLG && (GET_NFLG == GET_VFLG);  GT */
214	+	case 15:
215	+	cznv &= 0xc001;
216	+	return (((cznv << 15) ^ cznv) & 0xc000) != 0; /* GET_ZFLG || (GET_NFLG != GET_VFLG);   LE */
217	+	}
218	+	abort();
219	+	return 0;
220	+	}
221	+
222	+	/* Manually emit LAHF instruction so that 64-bit assemblers can grok it */
223	+	#if defined __x86_64__ && defined __GNUC__
224	+	#define ASM_LAHF ".byte 0x9f"
225	+	#else
226	+	#define ASM_LAHF "lahf"
227	+	#endif
228	+
229	+	/* Is there any way to do this without declaring *all* memory clobbered?
230	+	I.e. any way to tell gcc that some byte-sized value is in %al? */
231	+	#define optflag_testl(v) \
232	+	__asm__ __volatile__ ("andl %0,%0\n\t" \
233	+	ASM_LAHF "\n\t" \
234	+	"seto %%al\n\t" \
235	+	"movb %%al,regflags\n\t" \
236	+	"movb %%ah,regflags+1\n\t" \
237	+	: : "r" (v) : "%eax","cc","memory")
238	+
239	+	#define optflag_testw(v) \
240	+	__asm__ __volatile__ ("andw %w0,%w0\n\t" \
241	+	ASM_LAHF "\n\t" \
242	+	"seto %%al\n\t" \
243	+	"movb %%al,regflags\n\t" \
244	+	"movb %%ah,regflags+1\n\t" \
245	+	: : "r" (v) : "%eax","cc","memory")
246	+
247	+	#define optflag_testb(v) \
248	+	__asm__ __volatile__ ("andb %b0,%b0\n\t" \
249	+	ASM_LAHF "\n\t" \
250	+	"seto %%al\n\t" \
251	+	"movb %%al,regflags\n\t" \
252	+	"movb %%ah,regflags+1\n\t" \
253	+	: : "q" (v) : "%eax","cc","memory")
254	+
255	+	#define optflag_addl(v, s, d) do { \
256	+	__asm__ __volatile__ ("addl %k1,%k0\n\t" \
257	+	ASM_LAHF "\n\t" \
258	+	"seto %%al\n\t" \
259	+	"movb %%al,regflags\n\t" \
260	+	"movb %%ah,regflags+1\n\t" \
261	+	: "=r" (v) : "rmi" (s), "0" (d) : "%eax","cc","memory"); \
262	+	COPY_CARRY; \
263	+	} while (0)
264	+
265	+	#define optflag_addw(v, s, d) do { \
266	+	__asm__ __volatile__ ("addw %w1,%w0\n\t" \
267	+	ASM_LAHF "\n\t" \
268	+	"seto %%al\n\t" \
269	+	"movb %%al,regflags\n\t" \
270	+	"movb %%ah,regflags+1\n\t" \
271	+	: "=r" (v) : "rmi" (s), "0" (d) : "%eax","cc","memory"); \
272	+	COPY_CARRY; \
273	+	} while (0)
274	+
275	+	#define optflag_addb(v, s, d) do { \
276	+	__asm__ __volatile__ ("addb %b1,%b0\n\t" \
277	+	ASM_LAHF "\n\t" \
278	+	"seto %%al\n\t" \
279	+	"movb %%al,regflags\n\t" \
280	+	"movb %%ah,regflags+1\n\t" \
281	+	: "=q" (v) : "qmi" (s), "0" (d) : "%eax","cc","memory"); \
282	+	COPY_CARRY; \
283	+	} while (0)
284	+
285	+	#define optflag_subl(v, s, d) do { \
286	+	__asm__ __volatile__ ("subl %k1,%k0\n\t" \
287	+	ASM_LAHF "\n\t" \
288	+	"seto %%al\n\t" \
289	+	"movb %%al,regflags\n\t" \
290	+	"movb %%ah,regflags+1\n\t" \
291	+	: "=r" (v) : "rmi" (s), "0" (d) : "%eax","cc","memory"); \
292	+	COPY_CARRY; \
293	+	} while (0)
294	+
295	+	#define optflag_subw(v, s, d) do { \
296	+	__asm__ __volatile__ ("subw %w1,%w0\n\t" \
297	+	ASM_LAHF "\n\t" \
298	+	"seto %%al\n\t" \
299	+	"movb %%al,regflags\n\t" \
300	+	"movb %%ah,regflags+1\n\t" \
301	+	: "=r" (v) : "rmi" (s), "0" (d) : "%eax","cc","memory"); \
302	+	COPY_CARRY; \
303	+	} while (0)
304	+
305	+	#define optflag_subb(v, s, d) do { \
306	+	__asm__ __volatile__ ("subb %b1,%b0\n\t" \
307	+	ASM_LAHF "\n\t" \
308	+	"seto %%al\n\t" \
309	+	"movb %%al,regflags\n\t" \
310	+	"movb %%ah,regflags+1\n\t" \
311	+	: "=q" (v) : "qmi" (s), "0" (d) : "%eax","cc","memory"); \
312	+	COPY_CARRY; \
313	+	} while (0)
314	+
315	+	#define optflag_cmpl(s, d) \
316	+	__asm__ __volatile__ ("cmpl %k0,%k1\n\t" \
317	+	ASM_LAHF "\n\t" \
318	+	"seto %%al\n\t" \
319	+	"movb %%al,regflags\n\t" \
320	+	"movb %%ah,regflags+1\n\t" \
321	+	: : "rmi" (s), "r" (d) : "%eax","cc","memory")
322	+
323	+	#define optflag_cmpw(s, d) \
324	+	__asm__ __volatile__ ("cmpw %w0,%w1\n\t" \
325	+	ASM_LAHF "\n\t" \
326	+	"seto %%al\n\t" \
327	+	"movb %%al,regflags\n\t" \
328	+	"movb %%ah,regflags+1\n\t" \
329	+	: : "rmi" (s), "r" (d) : "%eax","cc","memory");
330	+
331	+	#define optflag_cmpb(s, d) \
332	+	__asm__ __volatile__ ("cmpb %b0,%b1\n\t" \
333	+	ASM_LAHF "\n\t" \
334	+	"seto %%al\n\t" \
335	+	"movb %%al,regflags\n\t" \
336	+	"movb %%ah,regflags+1\n\t" \
337	+	: : "qmi" (s), "q" (d) : "%eax","cc","memory")
338	+
339	+	#endif
340	+
341		#elif defined(__sparc__) && (defined(SPARC_V8_ASSEMBLY) || defined(SPARC_V9_ASSEMBLY))
342
343		struct flag_struct {
#	Line 151 | Line 347 | struct flag_struct {
347
348		extern struct flag_struct regflags;
349
350	<	#define SET_ZFLG(y) (regflags.nzvc = (regflags.nzvc & ~0x04) | (((y) & 1) << 2))
351	<	#define SET_CFLG(y) (regflags.nzvc = (regflags.nzvc & ~1) | ((y) & 1))
352	<	#define SET_VFLG(y) (regflags.nzvc = (regflags.nzvc & ~0x02) | (((y) & 1) << 1))
353	<	#define SET_NFLG(y) (regflags.nzvc = (regflags.nzvc & ~0x08) | (((y) & 1) << 3))
354	<	#define SET_XFLG(y) (regflags.x = (y))
355	<
356	<	#define GET_ZFLG ((regflags.nzvc >> 2) & 1)
357	<	#define GET_CFLG (regflags.nzvc & 1)
358	<	#define GET_VFLG ((regflags.nzvc >> 1) & 1)
359	<	#define GET_NFLG ((regflags.nzvc >> 3) & 1)
360	<	#define GET_XFLG (regflags.x & 1)
350	>	#define FLAGVAL_Z       0x04
351	>	#define FLAGVAL_N       0x08
352	>
353	>	#define SET_ZFLG(y)     (regflags.nzvc = (regflags.nzvc & ~0x04) | (((y) & 1) << 2))
354	>	#define SET_CFLG(y)     (regflags.nzvc = (regflags.nzvc & ~1) | ((y) & 1))
355	>	#define SET_VFLG(y)     (regflags.nzvc = (regflags.nzvc & ~0x02) | (((y) & 1) << 1))
356	>	#define SET_NFLG(y)     (regflags.nzvc = (regflags.nzvc & ~0x08) | (((y) & 1) << 3))
357	>	#define SET_XFLG(y)     (regflags.x = (y))
358	>
359	>	#define GET_ZFLG        ((regflags.nzvc >> 2) & 1)
360	>	#define GET_CFLG        (regflags.nzvc & 1)
361	>	#define GET_VFLG        ((regflags.nzvc >> 1) & 1)
362	>	#define GET_NFLG        ((regflags.nzvc >> 3) & 1)
363	>	#define GET_XFLG        (regflags.x & 1)
364	>
365	>	#define CLEAR_CZNV      (regflags.nzvc = 0)
366	>	#define GET_CZNV        (reflags.nzvc)
367	>	#define IOR_CZNV(X)     (refglags.nzvc |= (X))
368	>	#define SET_CZNV(X)     (regflags.nzvc = (X))
369
166	–	#define CLEAR_CZNV (regflags.nzvc = 0)
370		#define COPY_CARRY (regflags.x = regflags.nzvc)
371
372		static __inline__ int cctrue(int cc)
#	Line 787 | Line 990 | static inline uae_u32 sparc_v9_flag_addx
990
991		#endif /* SPARC_V9_ASSEMBLY */
992
993	+	#endif
994	+
995		#else
996
997		struct flag_struct {
#	Line 805 | Line 1010 | extern struct flag_struct regflags;
1010		#define VFLG (regflags.v)
1011		#define XFLG (regflags.x)
1012
1013	+	#define SET_CFLG(x) (CFLG = (x))
1014	+	#define SET_NFLG(x) (NFLG = (x))
1015	+	#define SET_VFLG(x) (VFLG = (x))
1016	+	#define SET_ZFLG(x) (ZFLG = (x))
1017	+	#define SET_XFLG(x) (XFLG = (x))
1018	+
1019	+	#define GET_CFLG CFLG
1020	+	#define GET_NFLG NFLG
1021	+	#define GET_VFLG VFLG
1022	+	#define GET_ZFLG ZFLG
1023	+	#define GET_XFLG XFLG
1024	+
1025	+	#define CLEAR_CZNV do { \
1026	+	SET_CFLG (0); \
1027	+	SET_ZFLG (0); \
1028	+	SET_NFLG (0); \
1029	+	SET_VFLG (0); \
1030	+	} while (0)
1031	+
1032	+	#define COPY_CARRY (SET_XFLG (GET_CFLG))
1033	+
1034		static __inline__ int cctrue(const int cc)
1035		{
1036		switch(cc){
#	Line 828 | Line 1054 | static __inline__ int cctrue(const int c
1054		return 0;
1055		}
1056
1057	<	#endif
1057	>	#endif /* OPTIMIZED_FLAGS */
1058	>
1059	>	#endif /* M68K_FLAGS_H */

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