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root/cebix/BasiliskII/src/uae_cpu/gencpu.c

Comparing BasiliskII/src/uae_cpu/gencpu.c (file contents):
Revision 1.14 by gbeauche, 2001-07-13T10:13:57Z vs.
Revision 1.20 by gbeauche, 2002-11-02T18:13:27Z

#	Line 725 | Line 725 | static void genflags (flagtypes type, wo
725		start_brace ();
726		printf ("\tuae_u32 %s;\n", value);
727		break;
728	–
728		default:
729		break;
730		}
#	Line 746 | Line 745 | static void genflags (flagtypes type, wo
745		}
746		printf ("\t}\n");
747		return;
748	+
749		case flag_logical:
750		if (strcmp (value, "0") == 0) {
751		printf ("\tSET_CZNV (FLAGVAL_Z);\n");
#	Line 786 | Line 786 | static void genflags (flagtypes type, wo
786		break;
787		}
788		#endif
789	–
789		genflags_normal (type, size, value, src, dst);
790		}
791
#	Line 910 | Line 909 | static void gen_opcode (unsigned long in
909		genastore ("newv", curi->dmode, "dstreg", curi->size, "dst");
910		break;
911		case i_SBCD:
913	–	/* Let's hope this works... */
912		genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
913		genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
914		start_brace ();
915		printf ("\tuae_u16 newv_lo = (dst & 0xF) - (src & 0xF) - (GET_XFLG ? 1 : 0);\n");
916		printf ("\tuae_u16 newv_hi = (dst & 0xF0) - (src & 0xF0);\n");
917	<	printf ("\tuae_u16 newv;\n");
918	<	printf ("\tint cflg;\n");
919	<	printf ("\tif (newv_lo > 9) { newv_lo-=6; newv_hi-=0x10; }\n");
920	<	printf ("\tnewv = newv_hi + (newv_lo & 0xF);");
921	<	printf ("\tcflg = (newv_hi & 0x1F0) > 0x90;\n");
922	<	printf ("\tSET_CFLG (cflg);\n");
917	>	printf ("\tuae_u16 newv, tmp_newv;\n");
918	>	printf ("\tint bcd = 0;\n");
919	>	printf ("\tnewv = tmp_newv = newv_hi + newv_lo;\n");
920	>	printf ("\tif (newv_lo & 0xF0) { newv -= 6; bcd = 6; };\n");
921	>	printf ("\tif ((((dst & 0xFF) - (src & 0xFF) - (GET_XFLG ? 1 : 0)) & 0x100) > 0xFF) { newv -= 0x60; }\n");
922	>	printf ("\tSET_CFLG ((((dst & 0xFF) - (src & 0xFF) - bcd - (GET_XFLG ? 1 : 0)) & 0x300) > 0xFF);\n");
923		duplicate_carry ();
926	–	printf ("\tif (cflg) newv -= 0x60;\n");
924		genflags (flag_zn, curi->size, "newv", "", "");
925	<	genflags (flag_sv, curi->size, "newv", "src", "dst");
925	>	printf ("\tSET_VFLG ((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0);\n");
926		genastore ("newv", curi->dmode, "dstreg", curi->size, "dst");
927		break;
928		case i_ADD:
#	Line 957 | Line 954 | static void gen_opcode (unsigned long in
954		start_brace ();
955		printf ("\tuae_u16 newv_lo = (src & 0xF) + (dst & 0xF) + (GET_XFLG ? 1 : 0);\n");
956		printf ("\tuae_u16 newv_hi = (src & 0xF0) + (dst & 0xF0);\n");
957	<	printf ("\tuae_u16 newv;\n");
957	>	printf ("\tuae_u16 newv, tmp_newv;\n");
958		printf ("\tint cflg;\n");
959	<	printf ("\tif (newv_lo > 9) { newv_lo +=6; }\n");
960	<	printf ("\tnewv = newv_hi + newv_lo;");
961	<	printf ("\tcflg = (newv & 0x1F0) > 0x90;\n");
959	>	printf ("\tnewv = tmp_newv = newv_hi + newv_lo;\n");
960	>	printf ("\tif (newv_lo > 9) { newv += 6; }\n");
961	>	printf ("\tcflg = (newv & 0x3F0) > 0x90;\n");
962	>	printf ("\tif (cflg) newv += 0x60;\n");
963		printf ("\tSET_CFLG (cflg);\n");
964		duplicate_carry ();
967	–	printf ("\tif (cflg) newv += 0x60;\n");
965		genflags (flag_zn, curi->size, "newv", "", "");
966	<	genflags (flag_sv, curi->size, "newv", "src", "dst");
966	>	printf ("\tSET_VFLG ((tmp_newv & 0x80) == 0 && (newv & 0x80) != 0);\n");
967		genastore ("newv", curi->dmode, "dstreg", curi->size, "dst");
968		break;
969		case i_NEG:
#	Line 990 | Line 987 | static void gen_opcode (unsigned long in
987		printf ("\tuae_u16 newv_hi = - (src & 0xF0);\n");
988		printf ("\tuae_u16 newv;\n");
989		printf ("\tint cflg;\n");
990	<	printf ("\tif (newv_lo > 9) { newv_lo-=6; newv_hi-=0x10; }\n");
991	<	printf ("\tnewv = newv_hi + (newv_lo & 0xF);");
992	<	printf ("\tcflg = cflg = (newv_hi & 0x1F0) > 0x90;\n");
990	>	printf ("\tif (newv_lo > 9) { newv_lo -= 6; }\n");
991	>	printf ("\tnewv = newv_hi + newv_lo;\n");
992	>	printf ("\tcflg = (newv & 0x1F0) > 0x90;\n");
993	>	printf ("\tif (cflg) newv -= 0x60;\n");
994		printf ("\tSET_CFLG (cflg);\n");
995		duplicate_carry();
998	–	printf ("\tif (cflg) newv -= 0x60;\n");
996		genflags (flag_zn, curi->size, "newv", "", "");
997		genastore ("newv", curi->smode, "srcreg", curi->size, "src");
998		break;
#	Line 1203 | Line 1200 | static void gen_opcode (unsigned long in
1200		printf ("\tif ((format & 0xF000) == 0x0000) { break; }\n");
1201		printf ("\telse if ((format & 0xF000) == 0x1000) { ; }\n");
1202		printf ("\telse if ((format & 0xF000) == 0x2000) { m68k_areg(regs, 7) += 4; break; }\n");
1203	+	/* gb-- the next two lines are deleted in Bernie's gencpu.c */
1204		printf ("\telse if ((format & 0xF000) == 0x3000) { m68k_areg(regs, 7) += 4; break; }\n");
1205		printf ("\telse if ((format & 0xF000) == 0x7000) { m68k_areg(regs, 7) += 52; break; }\n");
1206		printf ("\telse if ((format & 0xF000) == 0x8000) { m68k_areg(regs, 7) += 50; break; }\n");
#	Line 1291 | Line 1289 | static void gen_opcode (unsigned long in
1289		m68k_pc_offset = 0;
1290		break;
1291		case i_Bcc:
1292	+	if (0 && !using_prefetch && !using_exception_3 && (cpu_level >= 2)) {
1293	+	/* gb-- variant probably more favorable to compiler optimizations
1294	+	also assumes no prefetch buffer is used
1295	+	Hmm, that would make sense with processors capable of conditional moves */
1296	+	if (curi->size == sz_long && next_cpu_level < 1)
1297	+	next_cpu_level = 1;
1298	+	genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1299	+	printf ("\tm68k_incpc (cctrue(%d) ? ((uae_s32)src + 2) : %d);\n", curi->cc, m68k_pc_offset);
1300	+	m68k_pc_offset = 0;
1301	+	}
1302	+	else {
1303	+	/* original code for branch instructions */
1304		if (curi->size == sz_long) {
1305		if (cpu_level < 2) {
1306		printf ("\tm68k_incpc(2);\n");
#	Line 1314 | Line 1324 | static void gen_opcode (unsigned long in
1324		printf ("\t}\n");
1325		need_endlabel = 1;
1326		}
1317	–	#ifdef USE_COMPILER
1318	–	printf ("\tm68k_setpc_bcc(m68k_getpc() + 2 + (uae_s32)src);\n");
1319	–	#else
1327		printf ("\tm68k_incpc ((uae_s32)src + 2);\n");
1321	–	#endif
1328		fill_prefetch_0 ();
1329	<	printf ("\tgoto %s;\n", endlabelstr);
1329	>	printf ("return;\n");
1330		printf ("didnt_jump:;\n");
1331		need_endlabel = 1;
1332	+	}
1333		break;
1334		case i_LEA:
1335		genamode (curi->smode, "srcreg", curi->size, "src", 0, 0);
#	Line 1350 | Line 1357 | static void gen_opcode (unsigned long in
1357		printf ("\t\t}\n");
1358		need_endlabel = 1;
1359		}
1353	–	#ifdef USE_COMPILER
1354	–	printf ("\t\t\tm68k_setpc_bcc(m68k_getpc() + (uae_s32)offs + 2);\n");
1355	–	#else
1360		printf ("\t\t\tm68k_incpc((uae_s32)offs + 2);\n");
1357	–	#endif
1361		fill_prefetch_0 ();
1362	<	printf ("\t\tgoto %s;\n", endlabelstr);
1362	>	printf ("return;\n");
1363		printf ("\t\t}\n");
1364		printf ("\t}\n");
1365		need_endlabel = 1;
#	Line 1454 | Line 1457 | static void gen_opcode (unsigned long in
1457		abort ();
1458		}
1459		printf ("\tSET_ZFLG (upper == reg || lower == reg);\n");
1460	<	printf ("\tSET_CFLG (lower <= upper ? reg < lower || reg > upper : reg > upper || reg < lower);\n");
1460	>	printf ("\tSET_CFLG_ALWAYS (lower <= upper ? reg < lower || reg > upper : reg > upper || reg < lower);\n");
1461		printf ("\tif ((extra & 0x800) && GET_CFLG) { Exception(6,oldpc); goto %s; }\n}\n", endlabelstr);
1462		need_endlabel = 1;
1463		break;
#	Line 1991 | Line 1994 | static void gen_opcode (unsigned long in
1994		printf ("\ttmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7)));\n");
1995		}
1996		printf ("\ttmp >>= (32 - width);\n");
1997	<	printf ("\tSET_NFLG (tmp & (1 << (width-1)) ? 1 : 0);\n");
1997	>	printf ("\tSET_NFLG_ALWAYS (tmp & (1 << (width-1)) ? 1 : 0);\n");
1998		printf ("\tSET_ZFLG (tmp == 0); SET_VFLG (0); SET_CFLG (0);\n");
1999		switch (curi->mnemo) {
2000		case i_BFTST:
#	Line 2019 | Line 2022 | static void gen_opcode (unsigned long in
2022		break;
2023		case i_BFINS:
2024		printf ("\ttmp = m68k_dreg(regs, (extra >> 12) & 7);\n");
2025	+	printf ("\tSET_NFLG_ALWAYS (tmp & (1 << (width - 1)) ? 1 : 0);\n");
2026	+	printf ("\tSET_ZFLG (tmp == 0);\n");
2027		break;
2028		default:
2029		break;
#	Line 2089 | Line 2094 | static void gen_opcode (unsigned long in
2094		genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0);
2095		sync_m68k_pc ();
2096		swap_opcode ();
2097	<	printf ("\tfpp_opp(opcode,extra);\n");
2097	>	printf ("\tfpuop_arithmetic(opcode, extra);\n");
2098		break;
2099		case i_FDBcc:
2100		genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0);
2101		sync_m68k_pc ();
2102		swap_opcode ();
2103	<	printf ("\tfdbcc_opp(opcode,extra);\n");
2103	>	printf ("\tfpuop_dbcc(opcode, extra);\n");
2104		break;
2105		case i_FScc:
2106		genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0);
2107		sync_m68k_pc ();
2108		swap_opcode ();
2109	<	printf ("\tfscc_opp(opcode,extra);\n");
2109	>	printf ("\tfpuop_scc(opcode,extra);\n");
2110		break;
2111		case i_FTRAPcc:
2112		sync_m68k_pc ();
#	Line 2111 | Line 2116 | static void gen_opcode (unsigned long in
2116		genamode (curi->smode, "srcreg", curi->size, "dummy", 1, 0);
2117		sync_m68k_pc ();
2118		swap_opcode ();
2119	<	printf ("\tftrapcc_opp(opcode,oldpc);\n");
2119	>	printf ("\tfpuop_trapcc(opcode,oldpc);\n");
2120		break;
2121		case i_FBcc:
2122		sync_m68k_pc ();
#	Line 2120 | Line 2125 | static void gen_opcode (unsigned long in
2125		genamode (curi->dmode, "srcreg", curi->size, "extra", 1, 0);
2126		sync_m68k_pc ();
2127		swap_opcode ();
2128	<	printf ("\tfbcc_opp(opcode,pc,extra);\n");
2128	>	printf ("\tfpuop_bcc(opcode,pc,extra);\n");
2129		break;
2130		case i_FSAVE:
2131		sync_m68k_pc ();
2132		swap_opcode ();
2133	<	printf ("\tfsave_opp(opcode);\n");
2133	>	printf ("\tfpuop_save(opcode);\n");
2134		break;
2135		case i_FRESTORE:
2136		sync_m68k_pc ();
2137		swap_opcode ();
2138	<	printf ("\tfrestore_opp(opcode);\n");
2138	>	printf ("\tfpuop_restore(opcode);\n");
2139		break;
2140		case i_CINVL:
2141		case i_CINVP:
2142		case i_CINVA:
2143	+	/* gb-- srcreg now contains the cache field */
2144	+	printf ("\tif (srcreg&0x2)\n");
2145	+	printf ("\t\tflush_icache(%d);\n", 30 + ((opcode >> 3) & 3));
2146	+	break;
2147		case i_CPUSHL:
2148		case i_CPUSHP:
2149		case i_CPUSHA:
2150	+	/* gb-- srcreg now contains the cache field */
2151	+	printf ("\tif (srcreg&0x2)\n");
2152	+	printf ("\t\tflush_icache(%d);\n", 40 + ((opcode >> 3) & 3));
2153		break;
2154		case i_MOVE16:
2155		if ((opcode & 0xfff8) == 0xf620) {
#	Line 2175 | Line 2187 | static void gen_opcode (unsigned long in
2187		swap_opcode ();
2188		printf ("\tmmu_op(opcode,extra);\n");
2189		break;
2190	+
2191	+	case i_EMULOP_RETURN:
2192	+	printf ("\tm68k_emulop_return();\n");
2193	+	m68k_pc_offset = 0;
2194	+	break;
2195	+
2196	+	case i_EMULOP:
2197	+	printf ("\n");
2198	+	swap_opcode ();
2199	+	printf ("\tm68k_emulop(opcode);\n");
2200	+	break;
2201	+
2202		default:
2203		abort ();
2204		break;
#	Line 2186 | Line 2210 | static void gen_opcode (unsigned long in
2210		static void generate_includes (FILE * f)
2211		{
2212		fprintf (f, "#include \"sysdeps.h\"\n");
2213	+
2214		fprintf (f, "#include \"m68k.h\"\n");
2215		fprintf (f, "#include \"memory.h\"\n");
2216		fprintf (f, "#include \"readcpu.h\"\n");
2217		fprintf (f, "#include \"newcpu.h\"\n");
2218	+	fprintf (f, "#include \"compiler/compemu.h\"\n");
2219	+	fprintf (f, "#include \"fpu/fpu.h\"\n");
2220		fprintf (f, "#include \"cputbl.h\"\n");
2221	+
2222	+	fprintf (f, "#define SET_CFLG_ALWAYS(x) SET_CFLG(x)\n");
2223	+	fprintf (f, "#define SET_NFLG_ALWAYS(x) SET_NFLG(x)\n");
2224	+	fprintf (f, "#define CPUFUNC_FF(x) x##_ff\n");
2225	+	fprintf (f, "#define CPUFUNC_NF(x) x##_nf\n");
2226	+	fprintf (f, "#define CPUFUNC(x) CPUFUNC_FF(x)\n");
2227	+
2228	+	fprintf (f, "#ifdef NOFLAGS\n");
2229	+	fprintf (f, "# include \"noflags.h\"\n");
2230	+	fprintf (f, "#endif\n");
2231		}
2232
2233		static int postfix;
#	Line 2214 | Line 2251 | static void generate_one_opcode (int rp)
2251		return;
2252
2253		if (opcode_next_clev[rp] != cpu_level) {
2254	<	fprintf (stblfile, "{ op_%lx_%d, 0, %ld }, /* %s */\n", opcode, opcode_last_postfix[rp],
2254	>	fprintf (stblfile, "{ CPUFUNC(op_%lx_%d), 0, %ld }, /* %s */\n", opcode, opcode_last_postfix[rp],
2255		opcode, lookuptab[i].name);
2256		return;
2257		}
2258	<	fprintf (stblfile, "{ op_%lx_%d, 0, %ld }, /* %s */\n", opcode, postfix, opcode, lookuptab[i].name);
2259	<	fprintf (headerfile, "extern cpuop_func op_%lx_%d;\n", opcode, postfix);
2260	<	printf ("void REGPARAM2 op_%lx_%d(uae_u32 opcode) /* %s */\n{\n", opcode, postfix, lookuptab[i].name);
2258	>
2259	>	if (table68k[opcode].flagdead == 0)
2260	>	/* force to the "ff" variant since the instruction doesn't set at all the condition codes */
2261	>	fprintf (stblfile, "{ CPUFUNC_FF(op_%lx_%d), 0, %ld }, /* %s */\n", opcode, postfix, opcode, lookuptab[i].name);
2262	>	else
2263	>	fprintf (stblfile, "{ CPUFUNC(op_%lx_%d), 0, %ld }, /* %s */\n", opcode, postfix, opcode, lookuptab[i].name);
2264	>
2265	>	fprintf (headerfile, "extern cpuop_func op_%lx_%d_nf;\n", opcode, postfix);
2266	>	fprintf (headerfile, "extern cpuop_func op_%lx_%d_ff;\n", opcode, postfix);
2267	>	printf ("void REGPARAM2 CPUFUNC(op_%lx_%d)(uae_u32 opcode) /* %s */\n{\n", opcode, postfix, lookuptab[i].name);
2268	>	printf ("\tcpuop_begin();\n");
2269	>
2270	>	/* gb-- The "nf" variant for an instruction that doesn't set the condition
2271	>	codes at all is the same as the "ff" variant, so we don't need the "nf"
2272	>	variant to be compiled since it is mapped to the "ff" variant in the
2273	>	smalltbl. */
2274	>	if (table68k[opcode].flagdead == 0)
2275	>	printf ("#ifndef NOFLAGS\n");
2276
2277		switch (table68k[opcode].stype) {
2278		case 0: smsk = 7; break;
#	Line 2229 | Line 2281 | static void generate_one_opcode (int rp)
2281		case 3: smsk = 7; break;
2282		case 4: smsk = 7; break;
2283		case 5: smsk = 63; break;
2284	+	case 6: smsk = 255; break;
2285		case 7: smsk = 3; break;
2286		default: abort ();
2287		}
#	Line 2239 | Line 2292 | static void generate_one_opcode (int rp)
2292		&& table68k[opcode].smode != imm && table68k[opcode].smode != imm0
2293		&& table68k[opcode].smode != imm1 && table68k[opcode].smode != imm2
2294		&& table68k[opcode].smode != absw && table68k[opcode].smode != absl
2295	<	&& table68k[opcode].smode != PC8r && table68k[opcode].smode != PC16)
2295	>	&& table68k[opcode].smode != PC8r && table68k[opcode].smode != PC16
2296	>	/* gb-- We don't want to fetch the EmulOp code since the EmulOp()
2297	>	routine uses the whole opcode value. Maybe all the EmulOps
2298	>	could be expanded out but I don't think it is an improvement */
2299	>	&& table68k[opcode].stype != 6
2300	>	)
2301		{
2302		if (table68k[opcode].spos == -1) {
2303		if (((int) table68k[opcode].sreg) >= 128)
#	Line 2335 | Line 2393 | static void generate_one_opcode (int rp)
2393		gen_opcode (opcode);
2394		if (need_endlabel)
2395		printf ("%s: ;\n", endlabelstr);
2396	+	if (table68k[opcode].flagdead == 0)
2397	+	printf ("\n#endif\n");
2398	+	printf ("\tcpuop_end();\n");
2399		printf ("}\n");
2400		opcode_next_clev[rp] = next_cpu_level;
2401		opcode_last_postfix[rp] = postfix;
#	Line 2362 | Line 2423 | static void generate_func (void)
2423		opcode_next_clev[rp] = 0;
2424		}
2425		postfix = i;
2426	<	fprintf (stblfile, "struct cputbl op_smalltbl_%d[] = {\n", postfix);
2426	>	fprintf (stblfile, "struct cputbl CPUFUNC(op_smalltbl_%d)[] = {\n", postfix);
2427
2428		/* sam: this is for people with low memory (eg. me :)) */
2429		printf ("\n"

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