24 |
|
#include "sysdeps.h" |
25 |
|
#include "readcpu.h" |
26 |
|
|
27 |
+ |
#if defined(SPARC_V8_ASSEMBLY) || defined(SPARC_V9_ASSEMBLY) |
28 |
+ |
#define SPARC_ASSEMBLY 0 |
29 |
+ |
#endif |
30 |
+ |
|
31 |
|
#define BOOL_TYPE "int" |
32 |
|
|
33 |
|
static FILE *headerfile; |
59 |
|
if (file) { |
60 |
|
fscanf (file, "Total: %lu\n", &total); |
61 |
|
while (fscanf (file, "%lx: %lu %s\n", &opcode, &count, name) == 3) { |
62 |
< |
opcode_next_clev[nr] = 3; |
62 |
> |
opcode_next_clev[nr] = 4; |
63 |
|
opcode_last_postfix[nr] = -1; |
64 |
|
opcode_map[nr++] = opcode; |
65 |
|
counts[opcode] = count; |
72 |
|
if (table68k[opcode].handler == -1 && table68k[opcode].mnemo != i_ILLG |
73 |
|
&& counts[opcode] == 0) |
74 |
|
{ |
75 |
< |
opcode_next_clev[nr] = 3; |
75 |
> |
opcode_next_clev[nr] = 4; |
76 |
|
opcode_last_postfix[nr] = -1; |
77 |
|
opcode_map[nr++] = opcode; |
78 |
|
counts[opcode] = count; |
714 |
|
|
715 |
|
static void genflags (flagtypes type, wordsizes size, char *value, char *src, char *dst) |
716 |
|
{ |
717 |
< |
#ifdef X86_ASSEMBLY |
717 |
> |
#ifdef SPARC_V8_ASSEMBLY |
718 |
> |
switch(type) |
719 |
> |
{ |
720 |
> |
case flag_add: |
721 |
> |
start_brace(); |
722 |
> |
printf("\tuae_u32 %s;\n", value); |
723 |
> |
switch(size) |
724 |
> |
{ |
725 |
> |
case sz_byte: |
726 |
> |
printf("\t%s = sparc_v8_flag_add_8(M68K_FLAGS_ADDR, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst); |
727 |
> |
break; |
728 |
> |
case sz_word: |
729 |
> |
printf("\t%s = sparc_v8_flag_add_16(M68K_FLAGS_ADDR, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst); |
730 |
> |
break; |
731 |
> |
case sz_long: |
732 |
> |
printf("\t%s = sparc_v8_flag_add_32(M68K_FLAGS_ADDR, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst); |
733 |
> |
break; |
734 |
> |
} |
735 |
> |
return; |
736 |
> |
} |
737 |
> |
#elif defined(SPARC_V9_ASSEMBLY) |
738 |
> |
switch(type) |
739 |
> |
{ |
740 |
> |
case flag_add: |
741 |
> |
start_brace(); |
742 |
> |
printf("\tuae_u32 %s;\n", value); |
743 |
> |
switch(size) |
744 |
> |
{ |
745 |
> |
case sz_byte: |
746 |
> |
printf("\t%s = sparc_v9_flag_add_8(®flags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst); |
747 |
> |
break; |
748 |
> |
case sz_word: |
749 |
> |
printf("\t%s = sparc_v9_flag_add_16(®flags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst); |
750 |
> |
break; |
751 |
> |
case sz_long: |
752 |
> |
printf("\t%s = sparc_v9_flag_add_32(®flags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst); |
753 |
> |
break; |
754 |
> |
} |
755 |
> |
return; |
756 |
> |
|
757 |
> |
case flag_sub: |
758 |
> |
start_brace(); |
759 |
> |
printf("\tuae_u32 %s;\n", value); |
760 |
> |
switch(size) |
761 |
> |
{ |
762 |
> |
case sz_byte: |
763 |
> |
printf("\t%s = sparc_v9_flag_sub_8(®flags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst); |
764 |
> |
break; |
765 |
> |
case sz_word: |
766 |
> |
printf("\t%s = sparc_v9_flag_sub_16(®flags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst); |
767 |
> |
break; |
768 |
> |
case sz_long: |
769 |
> |
printf("\t%s = sparc_v9_flag_sub_32(®flags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst); |
770 |
> |
break; |
771 |
> |
} |
772 |
> |
return; |
773 |
> |
|
774 |
> |
case flag_cmp: |
775 |
> |
switch(size) |
776 |
> |
{ |
777 |
> |
case sz_byte: |
778 |
> |
printf("\tsparc_v9_flag_cmp_8(®flags, (uae_u32)(%s), (uae_u32)(%s));\n", src, dst); |
779 |
> |
break; |
780 |
> |
case sz_word: |
781 |
> |
printf("\tsparc_v9_flag_cmp_16(®flags, (uae_u32)(%s), (uae_u32)(%s));\n", src, dst); |
782 |
> |
break; |
783 |
> |
case sz_long: |
784 |
> |
printf("\tsparc_v9_flag_cmp_32(®flags, (uae_u32)(%s), (uae_u32)(%s));\n", src, dst); |
785 |
> |
break; |
786 |
> |
} |
787 |
> |
return; |
788 |
> |
|
789 |
> |
case flag_logical: |
790 |
> |
if (strcmp(value, "0") == 0) { |
791 |
> |
printf("\tregflags.nzvc = 0x04;\n"); |
792 |
> |
} else { |
793 |
> |
switch(size) { |
794 |
> |
case sz_byte: |
795 |
> |
printf("\tsparc_v9_flag_test_8(®flags, (uae_u32)(%s));\n", value); |
796 |
> |
break; |
797 |
> |
case sz_word: |
798 |
> |
printf("\tsparc_v9_flag_test_16(®flags, (uae_u32)(%s));\n", value); |
799 |
> |
break; |
800 |
> |
case sz_long: |
801 |
> |
printf("\tsparc_v9_flag_test_32(®flags, (uae_u32)(%s));\n", value); |
802 |
> |
break; |
803 |
> |
} |
804 |
> |
} |
805 |
> |
return; |
806 |
> |
|
807 |
> |
#if 0 |
808 |
> |
case flag_logical_noclobber: |
809 |
> |
printf("\t{uae_u32 old_flags = regflags.nzvc & ~0x0C;\n"); |
810 |
> |
if (strcmp(value, "0") == 0) { |
811 |
> |
printf("\tregflags.nzvc = old_flags | 0x04;\n"); |
812 |
> |
} else { |
813 |
> |
switch(size) { |
814 |
> |
case sz_byte: |
815 |
> |
printf("\tsparc_v9_flag_test_8(®flags, (uae_u32)(%s));\n", value); |
816 |
> |
break; |
817 |
> |
case sz_word: |
818 |
> |
printf("\tsparc_v9_flag_test_16(®flags, (uae_u32)(%s));\n", value); |
819 |
> |
break; |
820 |
> |
case sz_long: |
821 |
> |
printf("\tsparc_v9_flag_test_32(®flags, (uae_u32)(%s));\n", value); |
822 |
> |
break; |
823 |
> |
} |
824 |
> |
printf("\tregflags.nzvc |= old_flags;\n"); |
825 |
> |
} |
826 |
> |
printf("\t}\n"); |
827 |
> |
return; |
828 |
> |
#endif |
829 |
> |
} |
830 |
> |
#elif defined(X86_ASSEMBLY) |
831 |
|
switch (type) { |
832 |
|
case flag_add: |
833 |
|
case flag_sub: |
1481 |
|
printf ("\tif ((format & 0xF000) == 0x0000) { break; }\n"); |
1482 |
|
printf ("\telse if ((format & 0xF000) == 0x1000) { ; }\n"); |
1483 |
|
printf ("\telse if ((format & 0xF000) == 0x2000) { m68k_areg(regs, 7) += 4; break; }\n"); |
1484 |
+ |
printf ("\telse if ((format & 0xF000) == 0x3000) { m68k_areg(regs, 7) += 4; break; }\n"); |
1485 |
+ |
printf ("\telse if ((format & 0xF000) == 0x7000) { m68k_areg(regs, 7) += 52; break; }\n"); |
1486 |
|
printf ("\telse if ((format & 0xF000) == 0x8000) { m68k_areg(regs, 7) += 50; break; }\n"); |
1487 |
|
printf ("\telse if ((format & 0xF000) == 0x9000) { m68k_areg(regs, 7) += 12; break; }\n"); |
1488 |
|
printf ("\telse if ((format & 0xF000) == 0xa000) { m68k_areg(regs, 7) += 24; break; }\n"); |
2408 |
|
swap_opcode (); |
2409 |
|
printf ("\tfrestore_opp(opcode);\n"); |
2410 |
|
break; |
2411 |
+ |
case i_CINVL: |
2412 |
+ |
case i_CINVP: |
2413 |
+ |
case i_CINVA: |
2414 |
+ |
case i_CPUSHL: |
2415 |
+ |
case i_CPUSHP: |
2416 |
+ |
case i_CPUSHA: |
2417 |
+ |
break; |
2418 |
+ |
case i_MOVE16: |
2419 |
+ |
printf ("\tuaecptr mems = m68k_areg(regs, srcreg) & ~15, memd;\n"); |
2420 |
+ |
printf ("\tdstreg = (%s >> 12) & 7;\n", gen_nextiword()); |
2421 |
+ |
printf ("\tmemd = m68k_areg(regs, dstreg) & ~15;\n"); |
2422 |
+ |
printf ("\tput_long(memd, get_long(mems));\n"); |
2423 |
+ |
printf ("\tput_long(memd+4, get_long(mems+4));\n"); |
2424 |
+ |
printf ("\tput_long(memd+8, get_long(mems+8));\n"); |
2425 |
+ |
printf ("\tput_long(memd+12, get_long(mems+12));\n"); |
2426 |
+ |
printf ("\tm68k_areg(regs, srcreg) += 16;\n"); |
2427 |
+ |
printf ("\tm68k_areg(regs, dstreg) += 16;\n"); |
2428 |
+ |
break; |
2429 |
|
case i_MMUOP: |
2430 |
|
genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0); |
2431 |
|
sync_m68k_pc (); |
2604 |
|
|
2605 |
|
using_prefetch = 0; |
2606 |
|
using_exception_3 = 0; |
2607 |
< |
for (i = 0; i < 5; i++) { |
2608 |
< |
cpu_level = 3 - i; |
2609 |
< |
if (i == 4) { |
2607 |
> |
for (i = 0; i < 6; i++) { |
2608 |
> |
cpu_level = 4 - i; |
2609 |
> |
if (i == 5) { |
2610 |
|
cpu_level = 0; |
2611 |
|
using_prefetch = 1; |
2612 |
|
using_exception_3 = 1; |
2644 |
|
|
2645 |
|
fprintf (stblfile, "{ 0, 0, 0 }};\n"); |
2646 |
|
} |
2510 |
– |
|
2647 |
|
} |
2648 |
|
|
2649 |
|
int main (int argc, char **argv) |