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root/cebix/BasiliskII/src/uae_cpu/gencpu.c

Comparing BasiliskII/src/uae_cpu/gencpu.c (file contents):
Revision 1.1 by cebix, 1999-10-03T14:16:26Z vs.
Revision 1.3 by cebix, 1999-10-21T15:14:42Z

#	Line 24 | Line 24
24		#include "sysdeps.h"
25		#include "readcpu.h"
26
27	+	#if defined(SPARC_V8_ASSEMBLY) || defined(SPARC_V9_ASSEMBLY)
28	+	#define SPARC_ASSEMBLY 0
29	+	#include "sparcasm.h"
30	+	#endif
31	+
32		#define BOOL_TYPE "int"
33
34		static FILE *headerfile;
#	Line 710 | Line 715 | static void genflags_normal (flagtypes t
715
716		static void genflags (flagtypes type, wordsizes size, char *value, char *src, char *dst)
717		{
718	<	#ifdef X86_ASSEMBLY
718	>	#ifdef SPARC_V8_ASSEMBLY
719	>	switch(type)
720	>	{
721	>	case flag_add:
722	>	start_brace();
723	>	printf("\tuae_u32 %s;\n", value);
724	>	switch(size)
725	>	{
726	>	case sz_byte:
727	>	printf("\t%s = sparc_v8_flag_add_8(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
728	>	break;
729	>	case sz_word:
730	>	printf("\t%s = sparc_v8_flag_add_16(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
731	>	break;
732	>	case sz_long:
733	>	printf("\t%s = sparc_v8_flag_add_32(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
734	>	break;
735	>	}
736	>	return;
737	>
738	>	case flag_sub:
739	>	start_brace();
740	>	printf("\tuae_u32 %s;\n", value);
741	>	switch(size)
742	>	{
743	>	case sz_byte:
744	>	printf("\t%s = sparc_v8_flag_sub_8(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
745	>	break;
746	>	case sz_word:
747	>	printf("\t%s = sparc_v8_flag_sub_16(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
748	>	break;
749	>	case sz_long:
750	>	printf("\t%s = sparc_v8_flag_sub_32(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
751	>	break;
752	>	}
753	>	return;
754	>
755	>	case flag_cmp:
756	>	switch(size)
757	>	{
758	>	case sz_byte:
759	>	//                                      printf("\tsparc_v8_flag_cmp_8(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", src, dst);
760	>	break;
761	>	case sz_word:
762	>	//                                      printf("\tsparc_v8_flag_cmp_16(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", src, dst);
763	>	break;
764	>	case sz_long:
765	>	#if 1
766	>	printf("\tsparc_v8_flag_cmp_32(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", src, dst);
767	>	return;
768	>	#endif
769	>	break;
770	>	}
771	>	//                      return;
772	>	break;
773	>	}
774	>	#elif defined(SPARC_V9_ASSEMBLY)
775	>	switch(type)
776	>	{
777	>	case flag_add:
778	>	start_brace();
779	>	printf("\tuae_u32 %s;\n", value);
780	>	switch(size)
781	>	{
782	>	case sz_byte:
783	>	printf("\t%s = sparc_v9_flag_add_8(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
784	>	break;
785	>	case sz_word:
786	>	printf("\t%s = sparc_v9_flag_add_16(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
787	>	break;
788	>	case sz_long:
789	>	printf("\t%s = sparc_v9_flag_add_32(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
790	>	break;
791	>	}
792	>	return;
793	>
794	>	case flag_sub:
795	>	start_brace();
796	>	printf("\tuae_u32 %s;\n", value);
797	>	switch(size)
798	>	{
799	>	case sz_byte:
800	>	printf("\t%s = sparc_v9_flag_sub_8(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
801	>	break;
802	>	case sz_word:
803	>	printf("\t%s = sparc_v9_flag_sub_16(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
804	>	break;
805	>	case sz_long:
806	>	printf("\t%s = sparc_v9_flag_sub_32(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", value, src, dst);
807	>	break;
808	>	}
809	>	return;
810	>
811	>	case flag_cmp:
812	>	switch(size)
813	>	{
814	>	case sz_byte:
815	>	printf("\tsparc_v9_flag_cmp_8(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", src, dst);
816	>	break;
817	>	case sz_word:
818	>	printf("\tsparc_v9_flag_cmp_16(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", src, dst);
819	>	break;
820	>	case sz_long:
821	>	printf("\tsparc_v9_flag_cmp_32(&regflags, (uae_u32)(%s), (uae_u32)(%s));\n", src, dst);
822	>	break;
823	>	}
824	>	return;
825	>
826	>	case flag_logical:
827	>	if (strcmp(value, "0") == 0) {
828	>	printf("\tregflags.nzvc = 0x04;\n");
829	>	} else {
830	>	switch(size) {
831	>	case sz_byte:
832	>	printf("\tsparc_v9_flag_test_8(&regflags, (uae_u32)(%s));\n", value);
833	>	break;
834	>	case sz_word:
835	>	printf("\tsparc_v9_flag_test_16(&regflags, (uae_u32)(%s));\n", value);
836	>	break;
837	>	case sz_long:
838	>	printf("\tsparc_v9_flag_test_32(&regflags, (uae_u32)(%s));\n", value);
839	>	break;
840	>	}
841	>	}
842	>	return;
843	>
844	>	#if 0
845	>	case flag_logical_noclobber:
846	>	printf("\t{uae_u32 old_flags = regflags.nzvc & ~0x0C;\n");
847	>	if (strcmp(value, "0") == 0) {
848	>	printf("\tregflags.nzvc = old_flags | 0x04;\n");
849	>	} else {
850	>	switch(size) {
851	>	case sz_byte:
852	>	printf("\tsparc_v9_flag_test_8(&regflags, (uae_u32)(%s));\n", value);
853	>	break;
854	>	case sz_word:
855	>	printf("\tsparc_v9_flag_test_16(&regflags, (uae_u32)(%s));\n", value);
856	>	break;
857	>	case sz_long:
858	>	printf("\tsparc_v9_flag_test_32(&regflags, (uae_u32)(%s));\n", value);
859	>	break;
860	>	}
861	>	printf("\tregflags.nzvc |= old_flags;\n");
862	>	}
863	>	printf("\t}\n");
864	>	return;
865	>	#endif
866	>	}
867	>	#elif defined(X86_ASSEMBLY)
868		switch (type) {
869		case flag_add:
870		case flag_sub:
#	Line 2341 | Line 2495 | static void generate_one_opcode (int rp)
2495		}
2496		fprintf (stblfile, "{ op_%lx_%d, 0, %ld }, /* %s */\n", opcode, postfix, opcode, lookuptab[i].name);
2497		fprintf (headerfile, "extern cpuop_func op_%lx_%d;\n", opcode, postfix);
2498	+	/*      fprintf (headerfile, "extern unsigned long REGPARAM2 op_%lx_%d(uae_u32);\n", opcode, postfix); */
2499		printf ("unsigned long REGPARAM2 op_%lx_%d(uae_u32 opcode) /* %s */\n{\n", opcode, postfix, lookuptab[i].name);
2500
2501		switch (table68k[opcode].stype) {
#	Line 2507 | Line 2662 | static void generate_func (void)
2662
2663		fprintf (stblfile, "{ 0, 0, 0 }};\n");
2664		}
2510	–
2665		}
2666
2667		int main (int argc, char **argv)

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