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/* |
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* fpu_x86.h - 68881/68040 fpu code for x86/Windows and Linux/x86. |
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* fpu/fpu_x86.h - Extra Definitions for the X86 assembly FPU core |
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* |
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* Basilisk II (C) 1997-2001 Christian Bauer |
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* |
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* MC68881 emulation |
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* |
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* Based on UAE FPU, original copyright 1996 Herman ten Brugge, |
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* rewritten by Lauri Pesonen 1999-2000, |
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* accomodated to GCC's Extended Asm syntax by Gwenole Beauchesne 2000. |
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* Basilisk II (C) 1997-1999 Christian Bauer |
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* |
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* MC68881/68040 fpu emulation |
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* |
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* Original UAE FPU, copyright 1996 Herman ten Brugge |
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* Rewrite for x86, copyright 1999-2000 Lauri Pesonen |
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* New framework, copyright 2000 Gwenole Beauchesne |
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* Adapted for JIT compilation (c) Bernd Meyer, 2000 |
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* |
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* This program is free software; you can redistribute it and/or modify |
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* it under the terms of the GNU General Public License as published by |
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* the Free Software Foundation; either version 2 of the License, or |
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
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*/ |
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|
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/* gb-- defined in newcpu.h |
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// is_integral: true == 68040, false == 68881 |
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void fpu_set_integral_fpu( bool is_integral ); |
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|
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// MUST be called before the cpu starts up. |
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void fpu_init( void ); |
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|
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// Finalize. |
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void fpu_exit( void ); |
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|
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// Soft reset. |
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void fpu_reset( void ); |
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*/ |
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|
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// The same as original. "ftrapcc_opp" is bound to change soon. |
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/* gb-- defined in newcpu.h |
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void REGPARAM2 fpp_opp (uae_u32, uae_u16); |
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void REGPARAM2 fdbcc_opp (uae_u32, uae_u16); |
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void REGPARAM2 fscc_opp (uae_u32, uae_u16); |
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void REGPARAM2 ftrapcc_opp (uae_u32,uaecptr); |
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void REGPARAM2 fbcc_opp (uae_u32, uaecptr, uae_u32); |
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void REGPARAM2 fsave_opp (uae_u32); |
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void REGPARAM2 frestore_opp (uae_u32); |
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*/ |
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|
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/* ---------------------------- Motorola ---------------------------- */ |
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|
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// Exception byte |
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#define BSUN 0x00008000 |
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#define SNAN 0x00004000 |
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#define OPERR 0x00002000 |
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#define OVFL 0x00001000 |
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#define UNFL 0x00000800 |
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#define DZ 0x00000400 |
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#define INEX2 0x00000200 |
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#define INEX1 0x00000100 |
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|
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// Accrued exception byte |
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#define ACCR_IOP 0x80 |
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#define ACCR_OVFL 0x40 |
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#define ACCR_UNFL 0x20 |
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#define ACCR_DZ 0x10 |
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#define ACCR_INEX 0x08 |
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|
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// fpcr rounding modes |
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#define ROUND_CONTROL_MASK 0x30 |
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#define ROUND_TO_NEAREST 0 |
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#define ROUND_TO_ZERO 0x10 |
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#define ROUND_TO_NEGATIVE_INFINITY 0x20 |
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#define ROUND_TO_POSITIVE_INFINITY 0x30 |
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|
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// fpcr precision control |
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#define PRECISION_CONTROL_MASK 0xC0 |
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#define PRECISION_CONTROL_EXTENDED 0 |
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#define PRECISION_CONTROL_DOUBLE 0x80 |
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#define PRECISION_CONTROL_SINGLE 0x40 |
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#define PRECISION_CONTROL_UNDEFINED 0xC0 |
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|
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|
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/* ---------------------------- Intel ---------------------------- */ |
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|
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#define CW_RESET 0x0040 // initial CW value after RESET |
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#define CW_FINIT 0x037F // initial CW value after FINIT |
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#define SW_RESET 0x0000 // initial SW value after RESET |
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#define SW_FINIT 0x0000 // initial SW value after FINIT |
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#define TW_RESET 0x5555 // initial TW value after RESET |
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#define TW_FINIT 0x0FFF // initial TW value after FINIT |
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|
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#define CW_X 0x1000 // infinity control |
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#define CW_RC_ZERO 0x0C00 // rounding control toward zero |
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#define CW_RC_UP 0x0800 // rounding control toward + |
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#define CW_RC_DOWN 0x0400 // rounding control toward - |
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#define CW_RC_NEAR 0x0000 // rounding control toward even |
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#define CW_PC_EXTENDED 0x0300 // precision control 64bit |
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#define CW_PC_DOUBLE 0x0200 // precision control 53bit |
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#define CW_PC_RESERVED 0x0100 // precision control reserved |
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#define CW_PC_SINGLE 0x0000 // precision control 24bit |
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#define CW_PM 0x0020 // precision exception mask |
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#define CW_UM 0x0010 // underflow exception mask |
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#define CW_OM 0x0008 // overflow exception mask |
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#define CW_ZM 0x0004 // zero divide exception mask |
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#define CW_DM 0x0002 // denormalized operand exception mask |
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#define CW_IM 0x0001 // invalid operation exception mask |
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|
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#define SW_B 0x8000 // busy flag |
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#define SW_C3 0x4000 // condition code flag 3 |
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#define SW_TOP_7 0x3800 // top of stack = ST(7) |
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#define SW_TOP_6 0x3000 // top of stack = ST(6) |
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#define SW_TOP_5 0x2800 // top of stack = ST(5) |
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#define SW_TOP_4 0x2000 // top of stack = ST(4) |
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#define SW_TOP_3 0x1800 // top of stack = ST(3) |
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#define SW_TOP_2 0x1000 // top of stack = ST(2) |
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#define SW_TOP_1 0x0800 // top of stack = ST(1) |
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#define SW_TOP_0 0x0000 // top of stack = ST(0) |
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#define SW_C2 0x0400 // condition code flag 2 |
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#define SW_C1 0x0200 // condition code flag 1 |
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#define SW_C0 0x0100 // condition code flag 0 |
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#define SW_ES 0x0080 // error summary status flag |
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#define SW_SF 0x0040 // stack fault flag |
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#define SW_PE 0x0020 // precision exception flag |
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#define SW_UE 0x0010 // underflow exception flag |
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#define SW_OE 0x0008 // overflow exception flag |
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#define SW_ZE 0x0004 // zero divide exception flag |
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#define SW_DE 0x0002 // denormalized operand exception flag |
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#define SW_IE 0x0001 // invalid operation exception flag |
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#ifndef FPU_X86_H |
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#define FPU_X86_H |
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|
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/* NOTE: this file shall be included from fpu/fpu_x86.cpp */ |
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#undef PUBLIC |
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#define PUBLIC extern |
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|
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#undef PRIVATE |
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#define PRIVATE static |
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|
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#undef FFPU |
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#define FFPU /**/ |
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|
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#undef FPU |
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#define FPU fpu. |
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|
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// Status word |
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PRIVATE uae_u32 x86_status_word; |
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PRIVATE uae_u32 x86_status_word_accrued; |
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|
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// FPU jump table |
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typedef void REGPARAM2 ( *fpuop_func )( uae_u32, uae_u32 ); |
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PRIVATE fpuop_func fpufunctbl[65536]; |
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|
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// FPU consistency |
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PRIVATE uae_u32 checked_sw_atstart; |
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|
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// FMOVECR constants supported byt x86 FPU |
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PRIVATE fpu_register const_pi; |
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PRIVATE fpu_register const_lg2; |
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PRIVATE fpu_register const_l2e; |
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PRIVATE fpu_register const_z; |
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PRIVATE fpu_register const_ln2; |
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PRIVATE fpu_register const_1; |
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|
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// FMOVECR constants not not suported by x86 FPU |
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PRIVATE fpu_register const_e; |
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PRIVATE fpu_register const_log_10_e; |
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PRIVATE fpu_register const_ln_10; |
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PRIVATE fpu_register const_1e1; |
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PRIVATE fpu_register const_1e2; |
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PRIVATE fpu_register const_1e4; |
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PRIVATE fpu_register const_1e8; |
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PRIVATE fpu_register const_1e16; |
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PRIVATE fpu_register const_1e32; |
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PRIVATE fpu_register const_1e64; |
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PRIVATE fpu_register const_1e128; |
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PRIVATE fpu_register const_1e256; |
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PRIVATE fpu_register const_1e512; |
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PRIVATE fpu_register const_1e1024; |
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PRIVATE fpu_register const_1e2048; |
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PRIVATE fpu_register const_1e4096; |
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|
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// Saved host FPU state |
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PRIVATE uae_u8 m_fpu_state_original[108]; // 90/94/108 |
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|
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/* -------------------------------------------------------------------------- */ |
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/* --- Methods --- */ |
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/* -------------------------------------------------------------------------- */ |
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|
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// Debug support functions |
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PRIVATE void FFPU dump_first_bytes_buf(char *b, uae_u8* buf, uae_s32 actual); |
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PRIVATE char * FFPU etos(fpu_register const & e) REGPARAM; |
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|
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// FPU consistency |
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PRIVATE void FFPU FPU_CONSISTENCY_CHECK_START(void); |
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PRIVATE void FFPU FPU_CONSISTENCY_CHECK_STOP(const char *name); |
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|
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// Get special floating-point value class |
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PRIVATE __inline__ uae_u32 FFPU IS_INFINITY (fpu_register const & f); |
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PRIVATE __inline__ uae_u32 FFPU IS_NAN (fpu_register const & f); |
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PRIVATE __inline__ uae_u32 FFPU IS_ZERO (fpu_register const & f); |
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PRIVATE __inline__ uae_u32 FFPU IS_NEGATIVE (fpu_register const & f); |
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|
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// Make a special floating-point value |
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PRIVATE __inline__ void FFPU MAKE_NAN (fpu_register & f); |
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PRIVATE __inline__ void FFPU MAKE_INF_POSITIVE (fpu_register & f); |
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PRIVATE __inline__ void FFPU MAKE_INF_NEGATIVE (fpu_register & f); |
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PRIVATE __inline__ void FFPU MAKE_ZERO_POSITIVE (fpu_register & f); |
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PRIVATE __inline__ void FFPU MAKE_ZERO_NEGATIVE (fpu_register & f); |
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|
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// Conversion from extended floating-point values |
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PRIVATE uae_s32 FFPU extended_to_signed_32 ( fpu_register const & f ) REGPARAM; |
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PRIVATE uae_s16 FFPU extended_to_signed_16 ( fpu_register const & f ) REGPARAM; |
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PRIVATE uae_s8 FFPU extended_to_signed_8 ( fpu_register const & f ) REGPARAM; |
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PRIVATE fpu_double FFPU extended_to_double( fpu_register const & f ) REGPARAM; |
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PRIVATE uae_u32 FFPU from_single ( fpu_register const & f ) REGPARAM; |
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PRIVATE void FFPU from_exten ( fpu_register const & f, uae_u32 *wrd1, uae_u32 *wrd2, uae_u32 *wrd3 ) REGPARAM; |
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PRIVATE void FFPU from_double ( fpu_register const & f, uae_u32 *wrd1, uae_u32 *wrd2 ) REGPARAM; |
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PRIVATE void FFPU from_pack (fpu_double src, uae_u32 * wrd1, uae_u32 * wrd2, uae_u32 * wrd3) REGPARAM; |
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|
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// Conversion to extended floating-point values |
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PRIVATE void FFPU signed_to_extended ( uae_s32 x, fpu_register & f ) REGPARAM; |
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PRIVATE void FFPU double_to_extended ( double x, fpu_register & f ) REGPARAM; |
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PRIVATE void FFPU to_single ( uae_u32 src, fpu_register & f ) REGPARAM; |
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PRIVATE void FFPU to_exten_no_normalize ( uae_u32 wrd1, uae_u32 wrd2, uae_u32 wrd3, fpu_register & f ) REGPARAM; |
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PRIVATE void FFPU to_exten ( uae_u32 wrd1, uae_u32 wrd2, uae_u32 wrd3, fpu_register & f ) REGPARAM; |
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PRIVATE void FFPU to_double ( uae_u32 wrd1, uae_u32 wrd2, fpu_register & f ) REGPARAM; |
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PRIVATE fpu_double FFPU to_pack(uae_u32 wrd1, uae_u32 wrd2, uae_u32 wrd3) REGPARAM; |
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|
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// Atomic floating-point arithmetic operations |
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PRIVATE void FFPU do_fmove ( fpu_register & dest, fpu_register const & src ) REGPARAM; |
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PRIVATE void FFPU do_fmove_no_status ( fpu_register & dest, fpu_register const & src ) REGPARAM; |
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PRIVATE void FFPU do_fint ( fpu_register & dest, fpu_register const & src ) REGPARAM; |
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PRIVATE void FFPU do_fintrz ( fpu_register & dest, fpu_register const & src ) REGPARAM; |
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PRIVATE void FFPU do_fsqrt ( fpu_register & dest, fpu_register const & src ) REGPARAM; |
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PRIVATE void FFPU do_ftst ( fpu_register const & src ) REGPARAM; |
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PRIVATE void FFPU do_fsinh ( fpu_register & dest, fpu_register const & src ) REGPARAM; |
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PRIVATE void FFPU do_flognp1 ( fpu_register & dest, fpu_register const & src ) REGPARAM; |
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PRIVATE void FFPU do_fetoxm1 ( fpu_register & dest, fpu_register const & src ) REGPARAM; |
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PRIVATE void FFPU do_ftanh ( fpu_register & dest, fpu_register const & src ) REGPARAM; |
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PRIVATE void FFPU do_fatan ( fpu_register & dest, fpu_register const & src ) REGPARAM; |
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PRIVATE void FFPU do_fasin ( fpu_register & dest, fpu_register const & src ) REGPARAM; |
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PRIVATE void FFPU do_fatanh ( fpu_register & dest, fpu_register const & src ) REGPARAM; |
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PRIVATE void FFPU do_fetox ( fpu_register & dest, fpu_register const & src ) REGPARAM; |
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PRIVATE void FFPU do_ftwotox ( fpu_register & dest, fpu_register const & src ) REGPARAM; |
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PRIVATE void FFPU do_ftentox ( fpu_register & dest, fpu_register const & src ) REGPARAM; |
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PRIVATE void FFPU do_flogn ( fpu_register & dest, fpu_register const & src ) REGPARAM; |
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PRIVATE void FFPU do_flog10 ( fpu_register & dest, fpu_register const & src ) REGPARAM; |
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PRIVATE void FFPU do_flog2 ( fpu_register & dest, fpu_register const & src ) REGPARAM; |
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PRIVATE void FFPU do_facos ( fpu_register & dest, fpu_register const & src ) REGPARAM; |
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PRIVATE void FFPU do_fcosh ( fpu_register & dest, fpu_register const & src ) REGPARAM; |
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PRIVATE void FFPU do_fsin ( fpu_register & dest, fpu_register const & src ) REGPARAM; |
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PRIVATE void FFPU do_ftan ( fpu_register & dest, fpu_register const & src ) REGPARAM; |
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PRIVATE void FFPU do_fabs ( fpu_register & dest, fpu_register const & src ) REGPARAM; |
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PRIVATE void FFPU do_fneg ( fpu_register & dest, fpu_register const & src ) REGPARAM; |
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PRIVATE void FFPU do_fcos ( fpu_register & dest, fpu_register const & src ) REGPARAM; |
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PRIVATE void FFPU do_fgetexp ( fpu_register & dest, fpu_register const & src ) REGPARAM; |
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PRIVATE void FFPU do_fgetman ( fpu_register & dest, fpu_register const & src ) REGPARAM; |
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PRIVATE void FFPU do_fdiv ( fpu_register & dest, fpu_register const & src ) REGPARAM; |
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PRIVATE void FFPU do_fmod ( fpu_register & dest, fpu_register const & src ) REGPARAM; |
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PRIVATE void FFPU do_frem ( fpu_register & dest, fpu_register const & src ) REGPARAM; |
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PRIVATE void FFPU do_fmod_dont_set_cw ( fpu_register & dest, fpu_register const & src ) REGPARAM; |
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PRIVATE void FFPU do_frem_dont_set_cw ( fpu_register & dest, fpu_register const & src ) REGPARAM; |
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PRIVATE void FFPU do_fadd ( fpu_register & dest, fpu_register const & src ) REGPARAM; |
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PRIVATE void FFPU do_fmul ( fpu_register & dest, fpu_register const & src ) REGPARAM; |
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PRIVATE void FFPU do_fsgldiv ( fpu_register & dest, fpu_register const & src ) REGPARAM; |
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PRIVATE void FFPU do_fscale ( fpu_register & dest, fpu_register const & src ) REGPARAM; |
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PRIVATE void FFPU do_fsglmul ( fpu_register & dest, fpu_register const & src ) REGPARAM; |
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PRIVATE void FFPU do_fsub ( fpu_register & dest, fpu_register const & src ) REGPARAM; |
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PRIVATE void FFPU do_fsincos ( fpu_register & dest_sin, fpu_register & dest_cos, fpu_register const & src ) REGPARAM; |
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PRIVATE void FFPU do_fcmp ( fpu_register & dest, fpu_register const & src ) REGPARAM; |
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PRIVATE void FFPU do_fldpi ( fpu_register & dest ) REGPARAM; |
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PRIVATE void FFPU do_fldlg2 ( fpu_register & dest ) REGPARAM; |
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PRIVATE void FFPU do_fldl2e ( fpu_register & dest ) REGPARAM; |
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PRIVATE void FFPU do_fldz ( fpu_register & dest ) REGPARAM; |
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PRIVATE void FFPU do_fldln2 ( fpu_register & dest ) REGPARAM; |
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PRIVATE void FFPU do_fld1 ( fpu_register & dest ) REGPARAM; |
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|
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// Instructions handlers |
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PRIVATE void REGPARAM2 FFPU fpuop_illg( uae_u32 opcode, uae_u32 extra ); |
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PRIVATE void REGPARAM2 FFPU fpuop_fmove_2_ea( uae_u32 opcode, uae_u32 extra ); |
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PRIVATE void REGPARAM2 FFPU fpuop_fmovem_none_2_Dreg( uae_u32 opcode, uae_u32 extra ); |
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PRIVATE void REGPARAM2 FFPU fpuop_fmovem_fpiar_2_Dreg( uae_u32 opcode, uae_u32 extra ); |
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PRIVATE void REGPARAM2 FFPU fpuop_fmovem_fpsr_2_Dreg( uae_u32 opcode, uae_u32 extra ); |
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PRIVATE void REGPARAM2 FFPU fpuop_fmovem_fpcr_2_Dreg( uae_u32 opcode, uae_u32 extra ); |
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PRIVATE void REGPARAM2 FFPU fpuop_fmovem_fpsr_fpiar_2_Dreg( uae_u32 opcode, uae_u32 extra ); |
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PRIVATE void REGPARAM2 FFPU fpuop_fmovem_fpcr_fpiar_2_Dreg( uae_u32 opcode, uae_u32 extra ); |
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PRIVATE void REGPARAM2 FFPU fpuop_fmovem_fpcr_fpsr_2_Dreg( uae_u32 opcode, uae_u32 extra ); |
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PRIVATE void REGPARAM2 FFPU fpuop_fmovem_fpcr_fpsr_fpiar_2_Dreg( uae_u32 opcode, uae_u32 extra ); |
| 188 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_Dreg_2_none( uae_u32 opcode, uae_u32 extra ); |
| 189 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_Dreg_2_fpiar( uae_u32 opcode, uae_u32 extra ); |
| 190 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_Dreg_2_fpsr( uae_u32 opcode, uae_u32 extra ); |
| 191 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_Dreg_2_fpsr_fpiar( uae_u32 opcode, uae_u32 extra ); |
| 192 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_Dreg_2_fpcr( uae_u32 opcode, uae_u32 extra ); |
| 193 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_Dreg_2_fpcr_fpiar( uae_u32 opcode, uae_u32 extra ); |
| 194 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_Dreg_2_fpcr_fpsr( uae_u32 opcode, uae_u32 extra ); |
| 195 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_Dreg_2_fpcr_fpsr_fpiar( uae_u32 opcode, uae_u32 extra ); |
| 196 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_none_2_Areg( uae_u32 opcode, uae_u32 extra ); |
| 197 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_fpiar_2_Areg( uae_u32 opcode, uae_u32 extra ); |
| 198 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_fpsr_2_Areg( uae_u32 opcode, uae_u32 extra ); |
| 199 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_fpcr_2_Areg( uae_u32 opcode, uae_u32 extra ); |
| 200 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_fpsr_fpiar_2_Areg( uae_u32 opcode, uae_u32 extra ); |
| 201 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_fpcr_fpiar_2_Areg( uae_u32 opcode, uae_u32 extra ); |
| 202 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_fpcr_fpsr_2_Areg( uae_u32 opcode, uae_u32 extra ); |
| 203 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_fpcr_fpsr_fpiar_2_Areg( uae_u32 opcode, uae_u32 extra ); |
| 204 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_Areg_2_none( uae_u32 opcode, uae_u32 extra ); |
| 205 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_Areg_2_fpiar( uae_u32 opcode, uae_u32 extra ); |
| 206 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_Areg_2_fpsr( uae_u32 opcode, uae_u32 extra ); |
| 207 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_Areg_2_fpsr_fpiar( uae_u32 opcode, uae_u32 extra ); |
| 208 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_Areg_2_fpcr( uae_u32 opcode, uae_u32 extra ); |
| 209 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_Areg_2_fpcr_fpiar( uae_u32 opcode, uae_u32 extra ); |
| 210 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_Areg_2_fpcr_fpsr( uae_u32 opcode, uae_u32 extra ); |
| 211 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_Areg_2_fpcr_fpsr_fpiar( uae_u32 opcode, uae_u32 extra ); |
| 212 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_none_2_Mem_predecrement( uae_u32 opcode, uae_u32 extra ); |
| 213 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_fpiar_2_Mem_predecrement( uae_u32 opcode, uae_u32 extra ); |
| 214 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_fpsr_2_Mem_predecrement( uae_u32 opcode, uae_u32 extra ); |
| 215 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_fpsr_fpiar_2_Mem_predecrement( uae_u32 opcode, uae_u32 extra ); |
| 216 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_fpcr_2_Mem_predecrement( uae_u32 opcode, uae_u32 extra ); |
| 217 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_fpcr_fpiar_2_Mem_predecrement( uae_u32 opcode, uae_u32 extra ); |
| 218 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_fpcr_fpsr_2_Mem_predecrement( uae_u32 opcode, uae_u32 extra ); |
| 219 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_fpcr_fpsr_fpiar_2_Mem_predecrement( uae_u32 opcode, uae_u32 extra ); |
| 220 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_none_2_Mem_postincrement( uae_u32 opcode, uae_u32 extra ); |
| 221 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_fpiar_2_Mem_postincrement( uae_u32 opcode, uae_u32 extra ); |
| 222 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_fpsr_2_Mem_postincrement( uae_u32 opcode, uae_u32 extra ); |
| 223 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_fpsr_fpiar_2_Mem_postincrement( uae_u32 opcode, uae_u32 extra ); |
| 224 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_fpcr_2_Mem_postincrement( uae_u32 opcode, uae_u32 extra ); |
| 225 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_fpcr_fpiar_2_Mem_postincrement( uae_u32 opcode, uae_u32 extra ); |
| 226 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_fpcr_fpsr_2_Mem_postincrement( uae_u32 opcode, uae_u32 extra ); |
| 227 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_fpcr_fpsr_fpiar_2_Mem_postincrement( uae_u32 opcode, uae_u32 extra ); |
| 228 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_none_2_Mem( uae_u32 opcode, uae_u32 extra ); |
| 229 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_fpiar_2_Mem( uae_u32 opcode, uae_u32 extra ); |
| 230 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_fpsr_2_Mem( uae_u32 opcode, uae_u32 extra ); |
| 231 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_fpsr_fpiar_2_Mem( uae_u32 opcode, uae_u32 extra ); |
| 232 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_fpcr_2_Mem( uae_u32 opcode, uae_u32 extra ); |
| 233 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_fpcr_fpiar_2_Mem( uae_u32 opcode, uae_u32 extra ); |
| 234 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_fpcr_fpsr_2_Mem( uae_u32 opcode, uae_u32 extra ); |
| 235 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_fpcr_fpsr_fpiar_2_Mem( uae_u32 opcode, uae_u32 extra ); |
| 236 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_Mem_2_none_predecrement( uae_u32 opcode, uae_u32 extra ); |
| 237 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_Mem_2_fpiar_predecrement( uae_u32 opcode, uae_u32 extra ); |
| 238 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_Mem_2_fpsr_predecrement( uae_u32 opcode, uae_u32 extra ); |
| 239 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_Mem_2_fpsr_fpiar_predecrement( uae_u32 opcode, uae_u32 extra ); |
| 240 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_Mem_2_fpcr_predecrement( uae_u32 opcode, uae_u32 extra ); |
| 241 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_Mem_2_fpcr_fpiar_predecrement( uae_u32 opcode, uae_u32 extra ); |
| 242 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_Mem_2_fpcr_fpsr_predecrement( uae_u32 opcode, uae_u32 extra ); |
| 243 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_Mem_2_fpcr_fpsr_fpiar_predecrement( uae_u32 opcode, uae_u32 extra ); |
| 244 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_Mem_2_none_postincrement( uae_u32 opcode, uae_u32 extra ); |
| 245 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_Mem_2_fpiar_postincrement( uae_u32 opcode, uae_u32 extra ); |
| 246 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_Mem_2_fpsr_postincrement( uae_u32 opcode, uae_u32 extra ); |
| 247 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_Mem_2_fpsr_fpiar_postincrement( uae_u32 opcode, uae_u32 extra ); |
| 248 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_Mem_2_fpcr_postincrement( uae_u32 opcode, uae_u32 extra ); |
| 249 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_Mem_2_fpcr_fpiar_postincrement( uae_u32 opcode, uae_u32 extra ); |
| 250 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_Mem_2_fpcr_fpsr_postincrement( uae_u32 opcode, uae_u32 extra ); |
| 251 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_Mem_2_fpcr_fpsr_fpiar_postincrement( uae_u32 opcode, uae_u32 extra ); |
| 252 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_Mem_2_none_2_Mem( uae_u32 opcode, uae_u32 extra ); |
| 253 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_Mem_2_fpiar_2_Mem( uae_u32 opcode, uae_u32 extra ); |
| 254 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_Mem_2_fpsr_2_Mem( uae_u32 opcode, uae_u32 extra ); |
| 255 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_Mem_2_fpsr_fpiar_2_Mem( uae_u32 opcode, uae_u32 extra ); |
| 256 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_Mem_2_fpcr_2_Mem( uae_u32 opcode, uae_u32 extra ); |
| 257 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_Mem_2_fpcr_fpiar_2_Mem( uae_u32 opcode, uae_u32 extra ); |
| 258 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_Mem_2_fpcr_fpsr_2_Mem( uae_u32 opcode, uae_u32 extra ); |
| 259 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_Mem_2_fpcr_fpsr_fpiar_2_Mem( uae_u32 opcode, uae_u32 extra ); |
| 260 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_Mem_2_fpp_static_pred_postincrement( uae_u32 opcode, uae_u32 extra ); |
| 261 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_Mem_2_fpp_static_pred_predecrement( uae_u32 opcode, uae_u32 extra ); |
| 262 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_Mem_2_fpp_static_pred( uae_u32 opcode, uae_u32 extra ); |
| 263 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_Mem_2_fpp_dynamic_pred_postincrement( uae_u32 opcode, uae_u32 extra ); |
| 264 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_Mem_2_fpp_dynamic_pred_predecrement( uae_u32 opcode, uae_u32 extra ); |
| 265 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_Mem_2_fpp_dynamic_pred( uae_u32 opcode, uae_u32 extra ); |
| 266 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_Mem_2_fpp_static_postinc_postincrement( uae_u32 opcode, uae_u32 extra ); |
| 267 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_Mem_2_fpp_static_postinc_predecrement( uae_u32 opcode, uae_u32 extra ); |
| 268 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_Mem_2_fpp_static_postinc( uae_u32 opcode, uae_u32 extra ); |
| 269 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_Mem_2_fpp_dynamic_postinc_postincrement( uae_u32 opcode, uae_u32 extra ); |
| 270 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_Mem_2_fpp_dynamic_postinc_predecrement( uae_u32 opcode, uae_u32 extra ); |
| 271 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_Mem_2_fpp_dynamic_postinc( uae_u32 opcode, uae_u32 extra ); |
| 272 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_fpp_2_Mem_static_pred_postincrement( uae_u32 opcode, uae_u32 extra ); |
| 273 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_fpp_2_Mem_static_pred_predecrement( uae_u32 opcode, uae_u32 extra ); |
| 274 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_fpp_2_Mem_static_pred( uae_u32 opcode, uae_u32 extra ); |
| 275 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_fpp_2_Mem_dynamic_pred_postincrement( uae_u32 opcode, uae_u32 extra ); |
| 276 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_fpp_2_Mem_dynamic_pred_predecrement( uae_u32 opcode, uae_u32 extra ); |
| 277 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_fpp_2_Mem_dynamic_pred( uae_u32 opcode, uae_u32 extra ); |
| 278 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_fpp_2_Mem_static_postinc_postincrement( uae_u32 opcode, uae_u32 extra ); |
| 279 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_fpp_2_Mem_static_postinc_predecrement( uae_u32 opcode, uae_u32 extra ); |
| 280 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_fpp_2_Mem_static_postinc( uae_u32 opcode, uae_u32 extra ); |
| 281 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_fpp_2_Mem_dynamic_postinc_postincrement( uae_u32 opcode, uae_u32 extra ); |
| 282 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_fpp_2_Mem_dynamic_postinc_predecrement( uae_u32 opcode, uae_u32 extra ); |
| 283 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_fmovem_fpp_2_Mem_dynamic_postinc( uae_u32 opcode, uae_u32 extra ); |
| 284 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_do_fldpi( uae_u32 opcode, uae_u32 extra ); |
| 285 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_do_fldlg2( uae_u32 opcode, uae_u32 extra ); |
| 286 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_do_load_const_e( uae_u32 opcode, uae_u32 extra ); |
| 287 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_do_fldl2e( uae_u32 opcode, uae_u32 extra ); |
| 288 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_do_load_const_log_10_e( uae_u32 opcode, uae_u32 extra ); |
| 289 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_do_fldz( uae_u32 opcode, uae_u32 extra ); |
| 290 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_do_fldln2( uae_u32 opcode, uae_u32 extra ); |
| 291 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_do_load_const_ln_10( uae_u32 opcode, uae_u32 extra ); |
| 292 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_do_fld1( uae_u32 opcode, uae_u32 extra ); |
| 293 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_do_load_const_1e1( uae_u32 opcode, uae_u32 extra ); |
| 294 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_do_load_const_1e2( uae_u32 opcode, uae_u32 extra ); |
| 295 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_do_load_const_1e4( uae_u32 opcode, uae_u32 extra ); |
| 296 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_do_load_const_1e8( uae_u32 opcode, uae_u32 extra ); |
| 297 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_do_load_const_1e16( uae_u32 opcode, uae_u32 extra ); |
| 298 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_do_load_const_1e32( uae_u32 opcode, uae_u32 extra ); |
| 299 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_do_load_const_1e64( uae_u32 opcode, uae_u32 extra ); |
| 300 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_do_load_const_1e128( uae_u32 opcode, uae_u32 extra ); |
| 301 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_do_load_const_1e256( uae_u32 opcode, uae_u32 extra ); |
| 302 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_do_load_const_1e512( uae_u32 opcode, uae_u32 extra ); |
| 303 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_do_load_const_1e1024( uae_u32 opcode, uae_u32 extra ); |
| 304 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_do_load_const_1e2048( uae_u32 opcode, uae_u32 extra ); |
| 305 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_do_load_const_1e4096( uae_u32 opcode, uae_u32 extra ); |
| 306 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_do_fmove( uae_u32 opcode, uae_u32 extra ); |
| 307 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_do_fint( uae_u32 opcode, uae_u32 extra ); |
| 308 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_do_fsinh( uae_u32 opcode, uae_u32 extra ); |
| 309 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_do_fintrz( uae_u32 opcode, uae_u32 extra ); |
| 310 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_do_fsqrt( uae_u32 opcode, uae_u32 extra ); |
| 311 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_do_flognp1( uae_u32 opcode, uae_u32 extra ); |
| 312 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_do_fetoxm1( uae_u32 opcode, uae_u32 extra ); |
| 313 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_do_ftanh( uae_u32 opcode, uae_u32 extra ); |
| 314 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_do_fatan( uae_u32 opcode, uae_u32 extra ); |
| 315 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_do_fasin( uae_u32 opcode, uae_u32 extra ); |
| 316 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_do_fatanh( uae_u32 opcode, uae_u32 extra ); |
| 317 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_do_fsin( uae_u32 opcode, uae_u32 extra ); |
| 318 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_do_ftan( uae_u32 opcode, uae_u32 extra ); |
| 319 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_do_fetox( uae_u32 opcode, uae_u32 extra ); |
| 320 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_do_ftwotox( uae_u32 opcode, uae_u32 extra ); |
| 321 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_do_ftentox( uae_u32 opcode, uae_u32 extra ); |
| 322 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_do_flogn( uae_u32 opcode, uae_u32 extra ); |
| 323 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_do_flog10( uae_u32 opcode, uae_u32 extra ); |
| 324 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_do_flog2( uae_u32 opcode, uae_u32 extra ); |
| 325 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_do_fabs( uae_u32 opcode, uae_u32 extra ); |
| 326 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_do_fcosh( uae_u32 opcode, uae_u32 extra ); |
| 327 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_do_fneg( uae_u32 opcode, uae_u32 extra ); |
| 328 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_do_facos( uae_u32 opcode, uae_u32 extra ); |
| 329 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_do_fcos( uae_u32 opcode, uae_u32 extra ); |
| 330 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_do_fgetexp( uae_u32 opcode, uae_u32 extra ); |
| 331 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_do_fgetman( uae_u32 opcode, uae_u32 extra ); |
| 332 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_do_fdiv( uae_u32 opcode, uae_u32 extra ); |
| 333 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_do_fmod( uae_u32 opcode, uae_u32 extra ); |
| 334 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_do_frem( uae_u32 opcode, uae_u32 extra ); |
| 335 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_do_fadd( uae_u32 opcode, uae_u32 extra ); |
| 336 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_do_fmul( uae_u32 opcode, uae_u32 extra ); |
| 337 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_do_fsgldiv( uae_u32 opcode, uae_u32 extra ); |
| 338 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_do_fscale( uae_u32 opcode, uae_u32 extra ); |
| 339 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_do_fsglmul( uae_u32 opcode, uae_u32 extra ); |
| 340 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_do_fsub( uae_u32 opcode, uae_u32 extra ); |
| 341 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_do_fsincos( uae_u32 opcode, uae_u32 extra ); |
| 342 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_do_fcmp( uae_u32 opcode, uae_u32 extra ); |
| 343 |
> |
PRIVATE void REGPARAM2 FFPU fpuop_do_ftst( uae_u32 opcode, uae_u32 extra ); |
| 344 |
> |
|
| 345 |
> |
// Get & Put floating-point values |
| 346 |
> |
PRIVATE int FFPU get_fp_value (uae_u32 opcode, uae_u32 extra, fpu_register & src) REGPARAM; |
| 347 |
> |
PRIVATE int FFPU put_fp_value (fpu_register const & value, uae_u32 opcode, uae_u32 extra) REGPARAM; |
| 348 |
> |
PRIVATE int FFPU get_fp_ad(uae_u32 opcode, uae_u32 * ad) REGPARAM; |
| 349 |
> |
|
| 350 |
> |
// Floating-point condition-based instruction handlers |
| 351 |
> |
PRIVATE int FFPU fpp_cond(uae_u32 opcode, int condition) REGPARAM; |
| 352 |
> |
|
| 353 |
> |
// Misc functions |
| 354 |
> |
PRIVATE void __inline__ FFPU set_host_fpu_control_word (); |
| 355 |
> |
PRIVATE void __inline__ FFPU SET_BSUN_ON_NAN (); |
| 356 |
> |
PRIVATE void __inline__ FFPU build_ex_status (); |
| 357 |
> |
PRIVATE void FFPU do_null_frestore (); |
| 358 |
> |
PRIVATE void FFPU build_fpp_opp_lookup_table (); |
| 359 |
> |
PRIVATE void FFPU set_constant ( fpu_register & f, char *name, double value, uae_s32 mult ); |
| 360 |
|
|
| 361 |
< |
#define X86_ROUND_CONTROL_MASK 0x0C00 |
| 134 |
< |
#define X86_PRECISION_CONTROL_MASK 0x0300 |
| 361 |
> |
#endif /* FPU_X86_H */ |
