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/* |
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* fpu/fpu_uae.h - Extra Definitions for the old UAE FPU core |
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* |
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* Basilisk II (C) 1997-2005 Christian Bauer |
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* |
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* MC68881/68040 fpu emulation |
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* |
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* Original UAE FPU, copyright 1996 Herman ten Brugge |
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* Rewrite for x86, copyright 1999-2000 Lauri Pesonen |
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* New framework, copyright 2000 Gwenole Beauchesne |
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* Adapted for JIT compilation (c) Bernd Meyer, 2000 |
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* |
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* This program is free software; you can redistribute it and/or modify |
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* it under the terms of the GNU General Public License as published by |
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* the Free Software Foundation; either version 2 of the License, or |
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* (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
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*/ |
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|
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#ifndef FPU_UAE_H |
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#define FPU_UAE_H |
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|
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// Only define if you have IEEE 64 bit doubles. |
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#define FPU_HAVE_IEEE_DOUBLE 1 |
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|
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/* NOTE: this file shall be included from fpu/fpu_uae.cpp */ |
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#undef PUBLIC |
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#define PUBLIC extern |
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|
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#undef PRIVATE |
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#define PRIVATE static |
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|
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#undef FFPU |
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#define FFPU /**/ |
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|
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#undef FPU |
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#define FPU fpu. |
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|
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enum { |
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#ifdef WORDS_BIGENDIAN |
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FHI = 0, |
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FLO = 1 |
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#else |
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FHI = 1, |
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FLO = 0 |
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#endif |
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}; |
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|
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// Floating-point rounding support |
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PRIVATE inline fpu_register round_to_zero(fpu_register const & x); |
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PRIVATE inline fpu_register round_to_nearest(fpu_register const & x); |
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|
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#if FPU_HAVE_IEEE_DOUBLE |
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|
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// Lauri-- full words to avoid partial register stalls. |
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struct double_flags { |
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uae_u32 in_range; |
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uae_u32 zero; |
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uae_u32 infinity; |
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uae_u32 nan; |
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uae_u32 negative; |
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}; |
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PRIVATE double_flags fl_source; |
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PRIVATE double_flags fl_dest; |
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PRIVATE inline void FFPU get_dest_flags(fpu_register const & r); |
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PRIVATE inline void FFPU get_source_flags(fpu_register const & r); |
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|
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PRIVATE inline bool FFPU do_isnan(fpu_register const & r); |
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PRIVATE inline bool FFPU do_isinf(fpu_register const & r); |
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PRIVATE inline bool FFPU do_isneg(fpu_register const & r); |
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PRIVATE inline bool FFPU do_iszero(fpu_register const & r); |
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|
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PRIVATE inline void FFPU make_nan(fpu_register & r); |
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PRIVATE inline void FFPU make_zero_positive(fpu_register & r); |
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PRIVATE inline void FFPU make_zero_negative(fpu_register & r); |
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PRIVATE inline void FFPU make_inf_positive(fpu_register & r); |
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PRIVATE inline void FFPU make_inf_negative(fpu_register & r); |
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|
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PRIVATE inline void FFPU fast_scale(fpu_register & r, int add); |
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PRIVATE inline fpu_register FFPU fast_fgetexp(fpu_register const & r); |
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|
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// May be optimized for particular processors |
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#ifndef FPU_USE_NATIVE_FLAGS |
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PRIVATE inline void FFPU make_fpsr(fpu_register const & r); |
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#endif |
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|
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// Normalize to range 1..2 |
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PRIVATE inline void FFPU fast_remove_exponent(fpu_register & r); |
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|
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// The sign of the quotient is the exclusive-OR of the sign bits |
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// of the source and destination operands. |
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PRIVATE inline uae_u32 FFPU get_quotient_sign( |
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fpu_register const & ra, fpu_register const & rb |
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); |
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|
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// Quotient Byte is loaded with the sign and least significant |
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// seven bits of the quotient. |
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PRIVATE inline void FFPU make_quotient( |
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fpu_register const & quotient, uae_u32 sign |
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); |
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|
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// to_single |
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PRIVATE inline fpu_register FFPU make_single( |
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uae_u32 value |
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); |
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|
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// from_single |
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PRIVATE inline uae_u32 FFPU extract_single( |
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fpu_register const & src |
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); |
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|
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// to_exten |
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PRIVATE inline fpu_register FFPU make_extended( |
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uae_u32 wrd1, uae_u32 wrd2, uae_u32 wrd3 |
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); |
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|
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/* |
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Would be so much easier with full size floats :( |
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... this is so vague. |
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*/ |
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// to_exten_no_normalize |
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PRIVATE inline void FFPU make_extended_no_normalize( |
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uae_u32 wrd1, uae_u32 wrd2, uae_u32 wrd3, fpu_register & result |
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); |
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|
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// from_exten |
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PRIVATE inline void FFPU extract_extended(fpu_register const & src, |
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uae_u32 * wrd1, uae_u32 * wrd2, uae_u32 * wrd3 |
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); |
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|
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// to_double |
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PRIVATE inline fpu_register FFPU make_double( |
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uae_u32 wrd1, uae_u32 wrd2 |
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); |
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|
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// from_double |
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PRIVATE inline void FFPU extract_double(fpu_register const & src, |
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uae_u32 * wrd1, uae_u32 * wrd2 |
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); |
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|
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#else /* !FPU_HAVE_IEEE_DOUBLE */ |
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|
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// FIXME: may be optimized for particular processors |
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#ifndef FPU_USE_NATIVE_FLAGS |
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PRIVATE inline void FFPU make_fpsr(fpu_register const & r); |
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#endif |
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|
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// to_single |
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PRIVATE inline fpu_register make_single( |
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uae_u32 value |
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); |
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|
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// from_single |
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PRIVATE inline uae_u32 FFPU extract_single( |
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fpu_register const & src |
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); |
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|
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// to exten |
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PRIVATE inline fpu_register FFPU make_extended( |
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uae_u32 wrd1, uae_u32 wrd2, uae_u32 wrd3 |
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); |
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|
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// from_exten |
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PRIVATE inline void FFPU extract_extended( |
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fpu_register const & src, uae_u32 * wrd1, uae_u32 * wrd2, uae_u32 * wrd3 |
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); |
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|
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// to_double |
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PRIVATE inline fpu_register FFPU make_double( |
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uae_u32 wrd1, uae_u32 wrd2 |
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); |
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|
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// from_double |
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PRIVATE inline void FFPU extract_double( |
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fpu_register const & src, uae_u32 * wrd1, uae_u32 * wrd2 |
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); |
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|
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#endif /* FPU_HAVE_IEEE_DOUBLE */ |
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|
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PRIVATE inline fpu_register FFPU make_packed( |
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uae_u32 wrd1, uae_u32 wrd2, uae_u32 wrd3 |
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); |
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|
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PRIVATE inline void FFPU extract_packed( |
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fpu_register const & src, uae_u32 * wrd1, uae_u32 * wrd2, uae_u32 * wrd3 |
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); |
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|
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PRIVATE inline int FFPU get_fp_value( |
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uae_u32 opcode, uae_u16 extra, fpu_register & src |
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); |
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|
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PRIVATE inline int FFPU put_fp_value( |
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uae_u32 opcode, uae_u16 extra, fpu_register const & value |
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); |
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|
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PRIVATE inline int FFPU get_fp_ad( |
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uae_u32 opcode, uae_u32 * ad |
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); |
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|
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PRIVATE inline int FFPU fpp_cond( |
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int condition |
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); |
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|
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#endif /* FPU_UAE_H */ |
