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root/cebix/BasiliskII/src/uae_cpu/compiler/compemu_support.cpp
Revision 1.38 - (view) (annotate) - [select for diffs]
2006-05-08T16:56:07Z (18 years, 2 months ago) by gbeauche
Branch: MAIN
CVS Tags: nigel-build-19
Changes since 1.37: +29 -14 lines
Diff to previous 1.37
Fix for LAZY_FLUSH_ICACHE_RANGE. Blocks are indexed by native addresses.

Revision 1.37 - (view) (annotate) - [select for diffs]
2006-02-26T18:58:18Z (18 years, 4 months ago) by gbeauche
Branch: MAIN
Changes since 1.36: +2 -1 lines
Diff to previous 1.36
prefer lower indexes in register allocation, this avoids REX prefixes on
x86_64 when %r8 - %r15 are used (very light speedup expected)

Revision 1.36 - (view) (annotate) - [select for diffs]
2006-01-16T21:31:08Z (18 years, 5 months ago) by gbeauche
Branch: MAIN
Changes since 1.35: +24 -70 lines
Diff to previous 1.35
JIT generated code is not guaranteed to be leaf, e.g. there could be a call
to a generic instruction handler (untranslated code). This caused problems
on MacOS X for Intel where the unaligned stack conditions turned out to be
more visible. Performance loss is really neglectable and this is the right
fix now anyway.

Revision 1.35 - (view) (annotate) - [select for diffs]
2006-01-15T22:42:51Z (18 years, 5 months ago) by gbeauche
Branch: MAIN
Changes since 1.34: +34 -5 lines
Diff to previous 1.34
fix stack alignment (theoritically but it was OK in practise) in generated
functions, move m68k_compile_execute() to compiler/ dir since it's JIT
generic and it now depends on USE_PUSH_POP (as it should)

Revision 1.34 - (view) (annotate) - [select for diffs]
2005-06-11T06:43:24Z (19 years ago) by gbeauche
Branch: MAIN
CVS Tags: nigel-build-17
Changes since 1.33: +14 -0 lines
Diff to previous 1.33
Much improved responsiveness on NetBSD systems.

On those systems, it's really hard to get high resolution timings and the
system oftens fails to honour a timeout in less than 20 ms. The idea here
is to have an average m68k instruction count (countdown quantum) that
triggers real interrupt checks. The quantum is calibrated every 10 ticks
and has a 1000 Hz resolution on average.

Revision 1.33 - (view) (annotate) - [select for diffs]
2005-06-06T19:22:56Z (19 years, 1 month ago) by gbeauche
Branch: MAIN
Changes since 1.32: +15 -5 lines
Diff to previous 1.32
Really make translation through constant jumps functional. This can be
disabled with the new prefs item "jitinline". Some rapid Speedometer 4
benchmarks showed only a 4% improvement.

Revision 1.32 - (view) (annotate) - [select for diffs]
2005-06-04T16:47:14Z (19 years, 1 month ago) by gbeauche
Branch: MAIN
Changes since 1.31: +16 -0 lines
Diff to previous 1.31
Enable FLIGHT_RECORDER for generated code but don't record registers in
that case (yet).

Revision 1.31 - (view) (annotate) - [select for diffs]
2005-04-24T23:02:48Z (19 years, 2 months ago) by gbeauche
Branch: MAIN
Changes since 1.30: +4 -1 lines
Diff to previous 1.30
ensure allocated code fits under 32-bit boundaries

Revision 1.30 - (view) (annotate) - [select for diffs]
2005-04-21T09:08:57Z (19 years, 2 months ago) by gbeauche
Branch: MAIN
Changes since 1.29: +1 -0 lines
Diff to previous 1.29
Recognize lahf_lm from Dual Core Opterons. This enables use of LAHF/SETO
instructions in long mode (64-bit). However, there seems to be another bug
in the JIT preventing it from being fully supported. m68k.h & codegen_x86.h
are easily fixed bug another patch is still needed.

Revision 1.29 - (view) (annotate) - [select for diffs]
2005-01-30T21:42:16Z (19 years, 5 months ago) by gbeauche
Branch: MAIN
Changes since 1.28: +2 -2 lines
Diff to previous 1.28
Happy New Year!

Revision 1.28 - (view) (annotate) - [select for diffs]
2004-11-20T23:35:16Z (19 years, 7 months ago) by gbeauche
Branch: MAIN
Changes since 1.27: +63 -0 lines
Diff to previous 1.27
add some code to gather stats on m68k registers used in translated blocks

Revision 1.27 - (view) (annotate) - [select for diffs]
2004-11-08T23:24:54Z (19 years, 8 months ago) by gbeauche
Branch: MAIN
Changes since 1.26: +2 -2 lines
Diff to previous 1.26
fix inline dispatcher to really generate a cmove on x86-64 (silly bug!)

Revision 1.26 - (view) (annotate) - [select for diffs]
2004-11-08T21:10:46Z (19 years, 8 months ago) by gbeauche
Branch: MAIN
Changes since 1.25: +37 -26 lines
Diff to previous 1.25
Merge BSF simulation on P4 from Amithlon. Use 33-bit memory addressing model.

Revision 1.25 - (view) (annotate) - [select for diffs]
2004-11-02T23:52:00Z (19 years, 8 months ago) by gbeauche
Branch: MAIN
Changes since 1.24: +2 -2 lines
Diff to previous 1.24
fix protection changes on translation cache + cosmetic fixlet

Revision 1.24 - (view) (annotate) - [select for diffs]
2004-11-01T16:01:51Z (19 years, 8 months ago) by gbeauche
Branch: MAIN
Changes since 1.23: +210 -150 lines
Diff to previous 1.23
revive and fix almost two-year old port to x86_64

Revision 1.23 - (view) (annotate) - [select for diffs]
2004-01-12T15:29:30Z (20 years, 5 months ago) by cebix
Branch: MAIN
CVS Tags: nigel-build-15, nigel-build-16
Changes since 1.22: +2 -2 lines
Diff to previous 1.22
Happy New Year! :)

Revision 1.22 - (view) (annotate) - [select for diffs]
2003-11-21T14:20:00Z (20 years, 7 months ago) by gbeauche
Branch: MAIN
Changes since 1.21: +34 -1 lines
Diff to previous 1.21
Implement lazy icache range invalidation. Disable for now until it shows
a real benefit over only 2%

Revision 1.21 - (view) (annotate) - [select for diffs]
2003-10-14T10:29:19Z (20 years, 8 months ago) by gbeauche
Branch: MAIN
Changes since 1.20: +74 -10 lines
Diff to previous 1.20
Add "jitblacklist" prefs item so that opcodes ranges could be excluded for
translation. This should help debugging of (badly) translated code.

Usage: jitblacklist xxxx(-yyyy)?(;xxxx(-yyyy)?)*
where xxxx/yyyy are hexadecimal numbers

Revision 1.20 - (view) (annotate) - [select for diffs]
2003-10-03T18:18:15Z (20 years, 9 months ago) by gbeauche
Branch: MAIN
Changes since 1.19: +58 -1 lines
Diff to previous 1.19
Make sure a 32-bit B2/JIT works reasonnably well on AMD64 too. This implies
to force RAMBaseHost < 0x80000000. This is empirically determined to work on
Linux/x86 and Linux/amd64.

Revision 1.19 - (view) (annotate) - [select for diffs]
2003-10-02T09:51:14Z (20 years, 9 months ago) by gbeauche
Branch: MAIN
Changes since 1.18: +1 -0 lines
Diff to previous 1.18
flags are live after a call to fflags_into_flags_internal()

Revision 1.18 - (view) (annotate) - [select for diffs]
2003-03-21T19:12:44Z (21 years, 3 months ago) by gbeauche
Branch: MAIN
CVS Tags: nigel-build-12, nigel-build-13
Changes since 1.17: +250 -21 lines
Diff to previous 1.17
Remove some dead code. Start implementation of optimized calls to interpretive
fallbacks for untranslatable instruction handlers. Disabled for now since
call_m_01() is not correctly imeplemented yet.

Revision 1.17 - (view) (annotate) - [select for diffs]
2003-03-19T16:28:23Z (21 years, 3 months ago) by gbeauche
Branch: MAIN
Changes since 1.16: +11 -2 lines
Diff to previous 1.16
Add facility to filter out some opcodes from the compfunctbl[] et al.

Revision 1.16 - (view) (annotate) - [select for diffs]
2003-03-13T20:34:34Z (21 years, 3 months ago) by gbeauche
Branch: MAIN
Changes since 1.15: +14 -9 lines
Diff to previous 1.15
Implement a generic setzflg_l() for P4, thus permitting to re-enable
translation of ADDX/SUBX/BCLR/BTST/BSET/BCHG instructions. i.e. make
it faster. ;-)

Revision 1.15 - (view) (annotate) - [select for diffs]
2003-03-13T15:57:01Z (21 years, 3 months ago) by gbeauche
Branch: MAIN
Changes since 1.14: +21 -10 lines
Diff to previous 1.14
Workaround change in flags handling for BSF instruction on Pentium 4.
i.e. currently disable translation of ADDX/SUBX/B<CHG,CLR,SET,TST> instructions
in that case. That is to say, better (much?) slower than inaccurate. :-(

Revision 1.14 - (view) (annotate) - [select for diffs]
2003-03-13T09:51:31Z (21 years, 3 months ago) by gbeauche
Branch: MAIN
Changes since 1.13: +3 -0 lines
Diff to previous 1.13
Fix align_target with a padding of 0 bytes

Revision 1.13 - (view) (annotate) - [select for diffs]
2002-11-02T18:13:29Z (21 years, 8 months ago) by gbeauche
Branch: MAIN
Changes since 1.12: +1 -1 lines
Diff to previous 1.12
Remove obsolete CFLOW_* constants but keep cpuop_{begin,end} for an
inline-threaded core.

Revision 1.12 - (view) (annotate) - [select for diffs]
2002-10-12T16:27:13Z (21 years, 8 months ago) by gbeauche
Branch: MAIN
Changes since 1.11: +15 -4 lines
Diff to previous 1.11
Add raw_emit_nop_filler() with more efficient no-op fillers stolen from
GNU binutils 2.12.90.0.15. Speed bump is marginal (less than 6%). Make it
default though, that's conditionalized by tune_nop_fillers constant.

Revision 1.11 - (view) (annotate) - [select for diffs]
2002-10-03T16:13:46Z (21 years, 9 months ago) by gbeauche
Branch: MAIN
Changes since 1.10: +25 -0 lines
Diff to previous 1.10
JIT add copyright notices just to notify people that's real derivative
work from GPL code (UAE-JIT). Additions and improvements are from B2
developers.

Revision 1.10 - (view) (annotate) - [select for diffs]
2002-10-03T15:05:01Z (21 years, 9 months ago) by gbeauche
Branch: MAIN
Changes since 1.9: +5 -11 lines
Diff to previous 1.9
- Turn on runtime detection of loop and jump alignment as Aranym people
  reported they got some improvement with it and larger loops. Small
  loops are an issue for now until unrolling is implemented for DBcc.
- Const jumps are identified in readcpu. I don't want to duplicate code
  uselessly. Rather, it's the JIT job to know whether we are doing block
  inlining and un-marking those instructions as end-of-block.

Revision 1.9 - (view) (annotate) - [select for diffs]
2002-10-02T16:22:51Z (21 years, 9 months ago) by gbeauche
Branch: MAIN
Changes since 1.8: +43 -1 lines
Diff to previous 1.8
Add PROFILE_UNTRANSLATED_INSNS information. Interestingly, the following
are the bottleneck now: DIVS, BSR.L (why isn't it translated yet?),
bit-field instructions (I need to self-motivate enough for that), and
A-Traps.

Revision 1.8 - (view) (annotate) - [select for diffs]
2002-10-02T15:55:10Z (21 years, 9 months ago) by gbeauche
Branch: MAIN
Changes since 1.7: +122 -54 lines
Diff to previous 1.7
- Remove dead code in readcpu.cpp concerning CONST_JUMP control flow.
- Replace unused fl_compiled with fl_const_jump
- Implement block inlining enabled with USE_INLINING && USE_CHECKSUM_INFO.
  However, this is currently disabled as it doesn't give much and exhibits
  even more a cache/code generation problem with FPU JIT compiled code.
- Actual checksum values are now integral part of a blockinfo regardless
  of USE_CHECKSUM_INFO is set or not. Reduce number of elements in that
  structure and speeds up a little calculation of checksum of chained blocks.
- Don't care about show_checksum() for now.

Revision 1.7 - (view) (annotate) - [select for diffs]
2002-10-01T16:22:36Z (21 years, 9 months ago) by gbeauche
Branch: MAIN
Changes since 1.6: +123 -59 lines
Diff to previous 1.6
- Rewrite blockinfo allocator et al. Use a template class so that this
  can work with other types related to blockinfos.
- Add new method to compute checksums. This should permit code inlining
  and follow-ups of const_jumps without breaking the lazy cache invalidator.
  aka. chain infos for checksuming. TODO: Incomplete support thus disabled.

Revision 1.6 - (view) (annotate) - [select for diffs]
2002-10-01T09:39:55Z (21 years, 9 months ago) by gbeauche
Branch: MAIN
Changes since 1.5: +37 -19 lines
Diff to previous 1.5
- Optimize use of quit_program variable. This is a real boolean for B2.
- Remove unused/dead code concerning surroundings of (debugging).
- m68k_compile_execute() is generated and optimized code now.

Revision 1.5 - (view) (annotate) - [select for diffs]
2002-09-19T14:59:03Z (21 years, 9 months ago) by gbeauche
Branch: MAIN
Changes since 1.4: +20 -26 lines
Diff to previous 1.4
- Rewrite raw_init_cpu() to match more details, from kernel sources.
- Add possibility to tune code alignment to the underlying processor. However,
  this is turned off as I don't see much improvement and align_jumps = 64
  for Athlon looks suspicious to me.
- Remove two extra align_target() that are already covered.
- Remove unused may_trap() predicate.

Revision 1.4 - (view) (annotate) - [select for diffs]
2002-09-18T11:41:56Z (21 years, 9 months ago) by gbeauche
Branch: MAIN
Changes since 1.3: +4 -0 lines
Diff to previous 1.3
Move -DSAHF_SETO_PROFITABLE down in x86 & gas specific block. Also ensure
SAHF_SETO_PROFITABLE is defined when compiling the JIT. Aka I don't want
to support obsolete and probably bogus code nowadays.

Revision 1.3 - (view) (annotate) - [select for diffs]
2002-09-18T09:55:37Z (21 years, 9 months ago) by gbeauche
Branch: MAIN
Changes since 1.2: +3 -11 lines
Diff to previous 1.2
Don't forget to use vm_realease() to free up translation cache. Also free
the right amount of memory that was previously allocated.

Revision 1.2 - (view) (annotate) - [select for diffs]
2002-09-18T07:50:55Z (21 years, 9 months ago) by gbeauche
Branch: MAIN
Changes since 1.1: +3 -8 lines
Diff to previous 1.1
Use vm_acquire() to allocate translation cache

Revision 1.1 - (view) (annotate) - [select for diffs]
2002-09-17T16:04:06Z (21 years, 9 months ago) by gbeauche
Branch: MAIN
Import JIT compiler

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