| 128 |
|
static bool avoid_fpu = true; // Flag: compile FPU instructions ? |
| 129 |
|
static bool have_cmov = false; // target has CMOV instructions ? |
| 130 |
|
static bool have_rat_stall = true; // target has partial register stalls ? |
| 131 |
< |
static bool tune_alignment = true; // Tune code alignments for running CPU ? |
| 131 |
> |
const bool tune_alignment = true; // Tune code alignments for running CPU ? |
| 132 |
> |
const bool tune_nop_fillers = true; // Tune no-op fillers for architecture |
| 133 |
|
static int align_loops = 32; // Align the start of loops |
| 134 |
|
static int align_jumps = 32; // Align the start of jumps |
| 135 |
|
static int zero_fd = -1; |
| 699 |
|
target+=4; |
| 700 |
|
} |
| 701 |
|
|
| 702 |
+ |
static __inline__ void emit_block(const uae_u8 *block, uae_u32 blocklen) |
| 703 |
+ |
{ |
| 704 |
+ |
memcpy((uae_u8 *)target,block,blocklen); |
| 705 |
+ |
target+=blocklen; |
| 706 |
+ |
} |
| 707 |
+ |
|
| 708 |
|
static __inline__ uae_u32 reverse32(uae_u32 v) |
| 709 |
|
{ |
| 710 |
|
#if 1 |
| 4972 |
|
|
| 4973 |
|
static void align_target(uae_u32 a) |
| 4974 |
|
{ |
| 4975 |
< |
/* Fill with NOPs --- makes debugging with gdb easier */ |
| 4976 |
< |
while ((uae_u32)target&(a-1)) |
| 4977 |
< |
*target++=0x90; |
| 4975 |
> |
if (tune_nop_fillers) |
| 4976 |
> |
raw_emit_nop_filler(a - (((uae_u32)target) & (a - 1))); |
| 4977 |
> |
else { |
| 4978 |
> |
/* Fill with NOPs --- makes debugging with gdb easier */ |
| 4979 |
> |
while ((uae_u32)target&(a-1)) |
| 4980 |
> |
*target++=0x90; |
| 4981 |
> |
} |
| 4982 |
|
} |
| 4983 |
|
|
| 4984 |
|
static __inline__ int isinrom(uintptr addr) |
