3474 |
|
X86_PROCESSOR_K6, |
3475 |
|
X86_PROCESSOR_ATHLON, |
3476 |
|
X86_PROCESSOR_PENTIUM4, |
3477 |
+ |
X86_PROCESSOR_K8, |
3478 |
|
X86_PROCESSOR_max |
3479 |
|
}; |
3480 |
|
|
3485 |
|
"PentiumPro", |
3486 |
|
"K6", |
3487 |
|
"Athlon", |
3488 |
< |
"Pentium4" |
3488 |
> |
"Pentium4", |
3489 |
> |
"K8" |
3490 |
|
}; |
3491 |
|
|
3492 |
|
static struct ptt { |
3503 |
|
{ 16, 15, 16, 7, 16 }, |
3504 |
|
{ 32, 7, 32, 7, 32 }, |
3505 |
|
{ 16, 7, 16, 7, 16 }, |
3506 |
< |
{ 0, 0, 0, 0, 0 } |
3506 |
> |
{ 0, 0, 0, 0, 0 }, |
3507 |
> |
{ 16, 7, 16, 7, 16 } |
3508 |
|
}; |
3509 |
|
|
3510 |
|
static void |
3568 |
|
struct cpuinfo_x86 *c = &cpuinfo; |
3569 |
|
|
3570 |
|
/* Defaults */ |
3571 |
+ |
c->x86_processor = X86_PROCESSOR_max; |
3572 |
|
c->x86_vendor = X86_VENDOR_UNKNOWN; |
3573 |
|
c->cpuid_level = -1; /* CPUID not detected */ |
3574 |
|
c->x86_model = c->x86_mask = 0; /* So far unknown... */ |
3604 |
|
c->x86 = 4; |
3605 |
|
} |
3606 |
|
|
3607 |
+ |
/* AMD-defined flags: level 0x80000001 */ |
3608 |
+ |
uae_u32 xlvl; |
3609 |
+ |
cpuid(0x80000000, &xlvl, NULL, NULL, NULL); |
3610 |
+ |
if ( (xlvl & 0xffff0000) == 0x80000000 ) { |
3611 |
+ |
if ( xlvl >= 0x80000001 ) { |
3612 |
+ |
uae_u32 features; |
3613 |
+ |
cpuid(0x80000001, NULL, NULL, NULL, &features); |
3614 |
+ |
if (features & (1 << 29)) { |
3615 |
+ |
/* Assume x86-64 if long mode is supported */ |
3616 |
+ |
c->x86_processor = X86_PROCESSOR_K8; |
3617 |
+ |
} |
3618 |
+ |
} |
3619 |
+ |
} |
3620 |
+ |
|
3621 |
|
/* Canonicalize processor ID */ |
3604 |
– |
c->x86_processor = X86_PROCESSOR_max; |
3622 |
|
switch (c->x86) { |
3623 |
|
case 3: |
3624 |
|
c->x86_processor = X86_PROCESSOR_I386; |
3640 |
|
break; |
3641 |
|
case 15: |
3642 |
|
if (c->x86_vendor == X86_VENDOR_INTEL) { |
3643 |
< |
/* Assume any BranID >= 8 and family == 15 yields a Pentium 4 */ |
3643 |
> |
/* Assume any BrandID >= 8 and family == 15 yields a Pentium 4 */ |
3644 |
|
if (c->x86_brand_id >= 8) |
3645 |
|
c->x86_processor = X86_PROCESSOR_PENTIUM4; |
3646 |
|
} |
3647 |
+ |
if (c->x86_vendor == X86_VENDOR_AMD) { |
3648 |
+ |
/* Assume an Athlon processor if family == 15 and it was not |
3649 |
+ |
detected as an x86-64 so far */ |
3650 |
+ |
if (c->x86_processor == X86_PROCESSOR_max) |
3651 |
+ |
c->x86_processor = X86_PROCESSOR_ATHLON; |
3652 |
+ |
} |
3653 |
|
break; |
3654 |
|
} |
3655 |
|
if (c->x86_processor == X86_PROCESSOR_max) { |
3657 |
|
fprintf(stderr, " Family : %d\n", c->x86); |
3658 |
|
fprintf(stderr, " Model : %d\n", c->x86_model); |
3659 |
|
fprintf(stderr, " Mask : %d\n", c->x86_mask); |
3660 |
+ |
fprintf(stderr, " Vendor : %s [%d]\n", c->x86_vendor_id, c->x86_vendor); |
3661 |
|
if (c->x86_brand_id) |
3662 |
|
fprintf(stderr, " BrandID : %02x\n", c->x86_brand_id); |
3663 |
|
abort(); |
3664 |
|
} |
3665 |
|
|
3666 |
|
/* Have CMOV support? */ |
3667 |
< |
have_cmov = (c->x86_hwcap & (1 << 15)) && true; |
3667 |
> |
have_cmov = c->x86_hwcap & (1 << 15); |
3668 |
|
|
3669 |
|
/* Can the host CPU suffer from partial register stalls? */ |
3670 |
|
have_rat_stall = (c->x86_vendor == X86_VENDOR_INTEL); |