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root/cebix/BasiliskII/src/uae_cpu/compiler/codegen_x86.cpp
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Comparing BasiliskII/src/uae_cpu/compiler/codegen_x86.cpp (file contents):
Revision 1.12 by gbeauche, 2003-03-17T22:37:55Z vs.
Revision 1.13 by gbeauche, 2003-03-18T17:26:32Z

# Line 124 | Line 124 | uae_u8 need_to_preserve[]={1,1,1,1,0,1,1
124   #define CLOBBER_BT   clobber_flags()
125   #define CLOBBER_BSF  clobber_flags()
126  
127 + /* FIXME: disabled until that's proofread.  */
128 + #if 0
129 +
130 + #if defined(__x86_64__)
131 + #define X86_TARGET_64BIT                1
132 + #endif
133 + #define X86_FLAT_REGISTERS              0
134 + #include "codegen_x86.h"
135 +
136 + #define x86_emit_byte(B)                emit_byte(B)
137 + #define x86_emit_word(W)                emit_word(W)
138 + #define x86_emit_long(L)                emit_long(L)
139 + #define x86_get_target()                get_target()
140 + #define x86_emit_failure(MSG)   jit_fail(MSG, __FILE__, __LINE__, __FUNCTION__)
141 +
142 + static void jit_fail(const char *msg, const char *file, int line, const char *function)
143 + {
144 +        fprintf(stderr, "JIT failure in function %s from file %s at line %d: %s\n",
145 +                        function, file, line, msg);
146 +        abort();
147 + }
148 +
149 + LOWFUNC(NONE,WRITE,1,raw_push_l_r,(R4 r))
150 + {
151 +        PUSHLr(r);
152 + }
153 + LENDFUNC(NONE,WRITE,1,raw_push_l_r,(R4 r))
154 +
155 + LOWFUNC(NONE,READ,1,raw_pop_l_r,(R4 r))
156 + {
157 +        POPLr(r);
158 + }
159 + LENDFUNC(NONE,READ,1,raw_pop_l_r,(R4 r))
160 +
161 + LOWFUNC(WRITE,NONE,2,raw_bt_l_ri,(R4 r, IMM i))
162 + {
163 +        BTLir(i, r);
164 + }
165 + LENDFUNC(WRITE,NONE,2,raw_bt_l_ri,(R4 r, IMM i))
166 +
167 + LOWFUNC(WRITE,NONE,2,raw_bt_l_rr,(R4 r, R4 b))
168 + {
169 +        BTLrr(b, r);
170 + }
171 + LENDFUNC(WRITE,NONE,2,raw_bt_l_rr,(R4 r, R4 b))
172 +
173 + LOWFUNC(WRITE,NONE,2,raw_btc_l_ri,(RW4 r, IMM i))
174 + {
175 +        BTCLir(i, r);
176 + }
177 + LENDFUNC(WRITE,NONE,2,raw_btc_l_ri,(RW4 r, IMM i))
178 +
179 + LOWFUNC(WRITE,NONE,2,raw_btc_l_rr,(RW4 r, R4 b))
180 + {
181 +        BTCLrr(b, r);
182 + }
183 + LENDFUNC(WRITE,NONE,2,raw_btc_l_rr,(RW4 r, R4 b))
184 +
185 + LOWFUNC(WRITE,NONE,2,raw_btr_l_ri,(RW4 r, IMM i))
186 + {
187 +        BTRLir(i, r);
188 + }
189 + LENDFUNC(WRITE,NONE,2,raw_btr_l_ri,(RW4 r, IMM i))
190 +
191 + LOWFUNC(WRITE,NONE,2,raw_btr_l_rr,(RW4 r, R4 b))
192 + {
193 +        BTRLrr(b, r);
194 + }
195 + LENDFUNC(WRITE,NONE,2,raw_btr_l_rr,(RW4 r, R4 b))
196 +
197 + LOWFUNC(WRITE,NONE,2,raw_bts_l_ri,(RW4 r, IMM i))
198 + {
199 +        BTSLir(i, r);
200 + }
201 + LENDFUNC(WRITE,NONE,2,raw_bts_l_ri,(RW4 r, IMM i))
202 +
203 + LOWFUNC(WRITE,NONE,2,raw_bts_l_rr,(RW4 r, R4 b))
204 + {
205 +        BTSLrr(b, r);
206 + }
207 + LENDFUNC(WRITE,NONE,2,raw_bts_l_rr,(RW4 r, R4 b))
208 +
209 + LOWFUNC(WRITE,NONE,2,raw_sub_w_ri,(RW2 d, IMM i))
210 + {
211 +        SUBWir(i, d);
212 + }
213 + LENDFUNC(WRITE,NONE,2,raw_sub_w_ri,(RW2 d, IMM i))
214 +
215 + LOWFUNC(NONE,READ,2,raw_mov_l_rm,(W4 d, MEMR s))
216 + {
217 +        MOVLmr(s, X86_NOREG, X86_NOREG, 1, d);
218 + }
219 + LENDFUNC(NONE,READ,2,raw_mov_l_rm,(W4 d, MEMR s))
220 +
221 + LOWFUNC(NONE,WRITE,2,raw_mov_l_mi,(MEMW d, IMM s))
222 + {
223 +        MOVLim(s, d, X86_NOREG, X86_NOREG, 1);
224 + }
225 + LENDFUNC(NONE,WRITE,2,raw_mov_l_mi,(MEMW d, IMM s))
226 +
227 + LOWFUNC(NONE,WRITE,2,raw_mov_w_mi,(MEMW d, IMM s))
228 + {
229 +        MOVWim(s, d, X86_NOREG, X86_NOREG, 1);
230 + }
231 + LENDFUNC(NONE,WRITE,2,raw_mov_w_mi,(MEMW d, IMM s))
232 +
233 + LOWFUNC(NONE,WRITE,2,raw_mov_b_mi,(MEMW d, IMM s))
234 + {
235 +        MOVBim(s, d, X86_NOREG, X86_NOREG, 1);
236 + }
237 + LENDFUNC(NONE,WRITE,2,raw_mov_b_mi,(MEMW d, IMM s))
238 +
239 + LOWFUNC(WRITE,RMW,2,raw_rol_b_mi,(MEMRW d, IMM i))
240 + {
241 +        ROLBim(i, d, X86_NOREG, X86_NOREG, 1);
242 + }
243 + LENDFUNC(WRITE,RMW,2,raw_rol_b_mi,(MEMRW d, IMM i))
244 +
245 + LOWFUNC(WRITE,NONE,2,raw_rol_b_ri,(RW1 r, IMM i))
246 + {
247 +        ROLBir(i, r);
248 + }
249 + LENDFUNC(WRITE,NONE,2,raw_rol_b_ri,(RW1 r, IMM i))
250 +
251 + LOWFUNC(WRITE,NONE,2,raw_rol_w_ri,(RW2 r, IMM i))
252 + {
253 +        ROLWir(i, r);
254 + }
255 + LENDFUNC(WRITE,NONE,2,raw_rol_w_ri,(RW2 r, IMM i))
256 +
257 + LOWFUNC(WRITE,NONE,2,raw_rol_l_ri,(RW4 r, IMM i))
258 + {
259 +        ROLLir(i, r);
260 + }
261 + LENDFUNC(WRITE,NONE,2,raw_rol_l_ri,(RW4 r, IMM i))
262 +
263 + LOWFUNC(WRITE,NONE,2,raw_rol_l_rr,(RW4 d, R1 r))
264 + {
265 +        ROLLrr(r, d);
266 + }
267 + LENDFUNC(WRITE,NONE,2,raw_rol_l_rr,(RW4 d, R1 r))
268 +
269 + LOWFUNC(WRITE,NONE,2,raw_rol_w_rr,(RW2 d, R1 r))
270 + {
271 +        ROLWrr(r, d);
272 + }
273 + LENDFUNC(WRITE,NONE,2,raw_rol_w_rr,(RW2 d, R1 r))
274 +
275 + LOWFUNC(WRITE,NONE,2,raw_rol_b_rr,(RW1 d, R1 r))
276 + {
277 +        ROLBrr(r, d);
278 + }
279 + LENDFUNC(WRITE,NONE,2,raw_rol_b_rr,(RW1 d, R1 r))
280 +
281 + LOWFUNC(WRITE,NONE,2,raw_shll_l_rr,(RW4 d, R1 r))
282 + {
283 +        SHLLrr(r, d);
284 + }
285 + LENDFUNC(WRITE,NONE,2,raw_shll_l_rr,(RW4 d, R1 r))
286 +
287 + LOWFUNC(WRITE,NONE,2,raw_shll_w_rr,(RW2 d, R1 r))
288 + {
289 +        SHLWrr(r, d);
290 + }
291 + LENDFUNC(WRITE,NONE,2,raw_shll_w_rr,(RW2 d, R1 r))
292 +
293 + LOWFUNC(WRITE,NONE,2,raw_shll_b_rr,(RW1 d, R1 r))
294 + {
295 +        SHLBrr(r, d);
296 + }
297 + LENDFUNC(WRITE,NONE,2,raw_shll_b_rr,(RW1 d, R1 r))
298 +
299 + LOWFUNC(WRITE,NONE,2,raw_ror_b_ri,(RW1 r, IMM i))
300 + {
301 +        RORBir(i, r);
302 + }
303 + LENDFUNC(WRITE,NONE,2,raw_ror_b_ri,(RW1 r, IMM i))
304 +
305 + LOWFUNC(WRITE,NONE,2,raw_ror_w_ri,(RW2 r, IMM i))
306 + {
307 +        RORWir(i, r);
308 + }
309 + LENDFUNC(WRITE,NONE,2,raw_ror_w_ri,(RW2 r, IMM i))
310 +
311 + LOWFUNC(WRITE,READ,2,raw_or_l_rm,(RW4 d, MEMR s))
312 + {
313 +        ORLmr(s, X86_NOREG, X86_NOREG, 1, d);
314 + }
315 + LENDFUNC(WRITE,READ,2,raw_or_l_rm,(RW4 d, MEMR s))
316 +
317 + LOWFUNC(WRITE,NONE,2,raw_ror_l_ri,(RW4 r, IMM i))
318 + {
319 +        RORLir(i, r);
320 + }
321 + LENDFUNC(WRITE,NONE,2,raw_ror_l_ri,(RW4 r, IMM i))
322 +
323 + LOWFUNC(WRITE,NONE,2,raw_ror_l_rr,(RW4 d, R1 r))
324 + {
325 +        RORLrr(r, d);
326 + }
327 + LENDFUNC(WRITE,NONE,2,raw_ror_l_rr,(RW4 d, R1 r))
328 +
329 + LOWFUNC(WRITE,NONE,2,raw_ror_w_rr,(RW2 d, R1 r))
330 + {
331 +        RORWrr(r, d);
332 + }
333 + LENDFUNC(WRITE,NONE,2,raw_ror_w_rr,(RW2 d, R1 r))
334 +
335 + LOWFUNC(WRITE,NONE,2,raw_ror_b_rr,(RW1 d, R1 r))
336 + {
337 +        RORBrr(r, d);
338 + }
339 + LENDFUNC(WRITE,NONE,2,raw_ror_b_rr,(RW1 d, R1 r))
340 +
341 + LOWFUNC(WRITE,NONE,2,raw_shrl_l_rr,(RW4 d, R1 r))
342 + {
343 +        SHRLrr(r, d);
344 + }
345 + LENDFUNC(WRITE,NONE,2,raw_shrl_l_rr,(RW4 d, R1 r))
346 +
347 + LOWFUNC(WRITE,NONE,2,raw_shrl_w_rr,(RW2 d, R1 r))
348 + {
349 +        SHRWrr(r, d);
350 + }
351 + LENDFUNC(WRITE,NONE,2,raw_shrl_w_rr,(RW2 d, R1 r))
352 +
353 + LOWFUNC(WRITE,NONE,2,raw_shrl_b_rr,(RW1 d, R1 r))
354 + {
355 +        SHRBrr(r, d);
356 + }
357 + LENDFUNC(WRITE,NONE,2,raw_shrl_b_rr,(RW1 d, R1 r))
358 +
359 + LOWFUNC(WRITE,NONE,2,raw_shra_l_rr,(RW4 d, R1 r))
360 + {
361 +        abort();
362 + }
363 + LENDFUNC(WRITE,NONE,2,raw_shra_l_rr,(RW4 d, R1 r))
364 +
365 + LOWFUNC(WRITE,NONE,2,raw_shra_w_rr,(RW2 d, R1 r))
366 + {
367 +        abort();
368 + }
369 + LENDFUNC(WRITE,NONE,2,raw_shra_w_rr,(RW2 d, R1 r))
370 +
371 + LOWFUNC(WRITE,NONE,2,raw_shra_b_rr,(RW1 d, R1 r))
372 + {
373 +        abort();
374 + }
375 + LENDFUNC(WRITE,NONE,2,raw_shra_b_rr,(RW1 d, R1 r))
376 +
377 + LOWFUNC(WRITE,NONE,2,raw_shll_l_ri,(RW4 r, IMM i))
378 + {
379 +        SHLLir(i, r);
380 + }
381 + LENDFUNC(WRITE,NONE,2,raw_shll_l_ri,(RW4 r, IMM i))
382 +
383 + LOWFUNC(WRITE,NONE,2,raw_shll_w_ri,(RW2 r, IMM i))
384 + {
385 +        SHLWir(i, r);
386 + }
387 + LENDFUNC(WRITE,NONE,2,raw_shll_w_ri,(RW2 r, IMM i))
388 +
389 + LOWFUNC(WRITE,NONE,2,raw_shll_b_ri,(RW1 r, IMM i))
390 + {
391 +        SHLBir(i, r);
392 + }
393 + LENDFUNC(WRITE,NONE,2,raw_shll_b_ri,(RW1 r, IMM i))
394 +
395 + LOWFUNC(WRITE,NONE,2,raw_shrl_l_ri,(RW4 r, IMM i))
396 + {
397 +        SHRLir(i, r);
398 + }
399 + LENDFUNC(WRITE,NONE,2,raw_shrl_l_ri,(RW4 r, IMM i))
400 +
401 + LOWFUNC(WRITE,NONE,2,raw_shrl_w_ri,(RW2 r, IMM i))
402 + {
403 +        SHRWir(i, r);
404 + }
405 + LENDFUNC(WRITE,NONE,2,raw_shrl_w_ri,(RW2 r, IMM i))
406 +
407 + LOWFUNC(WRITE,NONE,2,raw_shrl_b_ri,(RW1 r, IMM i))
408 + {
409 +        SHRBir(i, r);
410 + }
411 + LENDFUNC(WRITE,NONE,2,raw_shrl_b_ri,(RW1 r, IMM i))
412 +
413 + LOWFUNC(WRITE,NONE,2,raw_shra_l_ri,(RW4 r, IMM i))
414 + {
415 +        abort();
416 + }
417 + LENDFUNC(WRITE,NONE,2,raw_shra_l_ri,(RW4 r, IMM i))
418 +
419 + LOWFUNC(WRITE,NONE,2,raw_shra_w_ri,(RW2 r, IMM i))
420 + {
421 +        abort();
422 + }
423 + LENDFUNC(WRITE,NONE,2,raw_shra_w_ri,(RW2 r, IMM i))
424 +
425 + LOWFUNC(WRITE,NONE,2,raw_shra_b_ri,(RW1 r, IMM i))
426 + {
427 +        abort();
428 + }
429 + LENDFUNC(WRITE,NONE,2,raw_shra_b_ri,(RW1 r, IMM i))
430 +
431 + LOWFUNC(WRITE,NONE,1,raw_sahf,(R2 dummy_ah))
432 + {
433 +        SAHF();
434 + }
435 + LENDFUNC(WRITE,NONE,1,raw_sahf,(R2 dummy_ah))
436 +
437 + LOWFUNC(NONE,NONE,1,raw_cpuid,(R4 dummy_eax))
438 + {
439 +        CPUID();
440 + }
441 + LENDFUNC(NONE,NONE,1,raw_cpuid,(R4 dummy_eax))
442 +
443 + LOWFUNC(READ,NONE,1,raw_lahf,(W2 dummy_ah))
444 + {
445 +        LAHF();
446 + }
447 + LENDFUNC(READ,NONE,1,raw_lahf,(W2 dummy_ah))
448 +
449 + LOWFUNC(READ,NONE,2,raw_setcc,(W1 d, IMM cc))
450 + {
451 +        SETCCir(cc, d);
452 + }
453 + LENDFUNC(READ,NONE,2,raw_setcc,(W1 d, IMM cc))
454 +
455 + LOWFUNC(READ,WRITE,2,raw_setcc_m,(MEMW d, IMM cc))
456 + {
457 +        SETCCim(cc, d, X86_NOREG, X86_NOREG, 1);
458 + }
459 + LENDFUNC(READ,WRITE,2,raw_setcc_m,(MEMW d, IMM cc))
460 +
461 + LOWFUNC(READ,NONE,3,raw_cmov_l_rr,(RW4 d, R4 s, IMM cc))
462 + {
463 +        CMOVLrr(cc, s, d);
464 + }
465 + LENDFUNC(READ,NONE,3,raw_cmov_l_rr,(RW4 d, R4 s, IMM cc))
466 +
467 + LOWFUNC(WRITE,NONE,2,raw_bsf_l_rr,(W4 d, R4 s))
468 + {
469 +        BSFLrr(s, d);
470 + }
471 + LENDFUNC(WRITE,NONE,2,raw_bsf_l_rr,(W4 d, R4 s))
472 +
473 + LOWFUNC(NONE,NONE,2,raw_sign_extend_16_rr,(W4 d, R2 s))
474 + {
475 +        MOVSWLrr(s, d);
476 + }
477 + LENDFUNC(NONE,NONE,2,raw_sign_extend_16_rr,(W4 d, R2 s))
478 +
479 + LOWFUNC(NONE,NONE,2,raw_sign_extend_8_rr,(W4 d, R1 s))
480 + {
481 +        MOVSBLrr(s, d);
482 + }
483 + LENDFUNC(NONE,NONE,2,raw_sign_extend_8_rr,(W4 d, R1 s))
484 +
485 + LOWFUNC(NONE,NONE,2,raw_zero_extend_16_rr,(W4 d, R2 s))
486 + {
487 +        MOVZWLrr(s, d);
488 + }
489 + LENDFUNC(NONE,NONE,2,raw_zero_extend_16_rr,(W4 d, R2 s))
490 +
491 + LOWFUNC(NONE,NONE,2,raw_zero_extend_8_rr,(W4 d, R1 s))
492 + {
493 +        MOVZBLrr(s, d);
494 + }
495 + LENDFUNC(NONE,NONE,2,raw_zero_extend_8_rr,(W4 d, R1 s))
496 +
497 + LOWFUNC(NONE,NONE,2,raw_imul_32_32,(RW4 d, R4 s))
498 + {
499 +        abort();
500 + }
501 + LENDFUNC(NONE,NONE,2,raw_imul_32_32,(RW4 d, R4 s))
502 +
503 + LOWFUNC(NONE,NONE,2,raw_imul_64_32,(RW4 d, RW4 s))
504 + {
505 +        abort();
506 + }
507 + LENDFUNC(NONE,NONE,2,raw_imul_64_32,(RW4 d, RW4 s))
508 +
509 + LOWFUNC(NONE,NONE,2,raw_mul_64_32,(RW4 d, RW4 s))
510 + {
511 +        abort();
512 + }
513 + LENDFUNC(NONE,NONE,2,raw_mul_64_32,(RW4 d, RW4 s))
514 +
515 + LOWFUNC(NONE,NONE,2,raw_mul_32_32,(RW4 d, R4 s))
516 + {
517 +        abort();
518 + }
519 + LENDFUNC(NONE,NONE,2,raw_mul_32_32,(RW4 d, R4 s))
520 +
521 + LOWFUNC(NONE,NONE,2,raw_mov_b_rr,(W1 d, R1 s))
522 + {
523 +        MOVBrr(s, d);
524 + }
525 + LENDFUNC(NONE,NONE,2,raw_mov_b_rr,(W1 d, R1 s))
526 +
527 + LOWFUNC(NONE,NONE,2,raw_mov_w_rr,(W2 d, R2 s))
528 + {
529 +        MOVWrr(s, d);
530 + }
531 + LENDFUNC(NONE,NONE,2,raw_mov_w_rr,(W2 d, R2 s))
532 +
533 + LOWFUNC(NONE,READ,4,raw_mov_l_rrm_indexed,(W4 d,R4 baser, R4 index, IMM factor))
534 + {
535 +        MOVLmr(0, baser, index, factor, d);
536 + }
537 + LENDFUNC(NONE,READ,4,raw_mov_l_rrm_indexed,(W4 d,R4 baser, R4 index, IMM factor))
538 +
539 + LOWFUNC(NONE,READ,4,raw_mov_w_rrm_indexed,(W2 d, R4 baser, R4 index, IMM factor))
540 + {
541 +        MOVWmr(0, baser, index, factor, d);
542 + }
543 + LENDFUNC(NONE,READ,4,raw_mov_w_rrm_indexed,(W2 d, R4 baser, R4 index, IMM factor))
544 +
545 + LOWFUNC(NONE,READ,4,raw_mov_b_rrm_indexed,(W1 d, R4 baser, R4 index, IMM factor))
546 + {
547 +        MOVBmr(0, baser, index, factor, d);
548 + }
549 + LENDFUNC(NONE,READ,4,raw_mov_b_rrm_indexed,(W1 d, R4 baser, R4 index, IMM factor))
550 +
551 + LOWFUNC(NONE,WRITE,4,raw_mov_l_mrr_indexed,(R4 baser, R4 index, IMM factor, R4 s))
552 + {
553 +        MOVLrm(s, 0, baser, index, factor);
554 + }
555 + LENDFUNC(NONE,WRITE,4,raw_mov_l_mrr_indexed,(R4 baser, R4 index, IMM factor, R4 s))
556 +
557 + LOWFUNC(NONE,WRITE,4,raw_mov_w_mrr_indexed,(R4 baser, R4 index, IMM factor, R2 s))
558 + {
559 +        MOVWrm(s, 0, baser, index, factor);
560 + }
561 + LENDFUNC(NONE,WRITE,4,raw_mov_w_mrr_indexed,(R4 baser, R4 index, IMM factor, R2 s))
562 +
563 + LOWFUNC(NONE,WRITE,4,raw_mov_b_mrr_indexed,(R4 baser, R4 index, IMM factor, R1 s))
564 + {
565 +        MOVBrm(s, 0, baser, index, factor);
566 + }
567 + LENDFUNC(NONE,WRITE,4,raw_mov_b_mrr_indexed,(R4 baser, R4 index, IMM factor, R1 s))
568 +
569 + LOWFUNC(NONE,WRITE,5,raw_mov_l_bmrr_indexed,(IMM base, R4 baser, R4 index, IMM factor, R4 s))
570 + {
571 +        MOVLrm(s, base, baser, index, factor);
572 + }
573 + LENDFUNC(NONE,WRITE,5,raw_mov_l_bmrr_indexed,(IMM base, R4 baser, R4 index, IMM factor, R4 s))
574 +
575 + LOWFUNC(NONE,WRITE,5,raw_mov_w_bmrr_indexed,(IMM base, R4 baser, R4 index, IMM factor, R2 s))
576 + {
577 +        MOVWrm(s, base, baser, index, factor);
578 + }
579 + LENDFUNC(NONE,WRITE,5,raw_mov_w_bmrr_indexed,(IMM base, R4 baser, R4 index, IMM factor, R2 s))
580 +
581 + LOWFUNC(NONE,WRITE,5,raw_mov_b_bmrr_indexed,(IMM base, R4 baser, R4 index, IMM factor, R1 s))
582 + {
583 +        MOVBrm(s, base, baser, index, factor);
584 + }
585 + LENDFUNC(NONE,WRITE,5,raw_mov_b_bmrr_indexed,(IMM base, R4 baser, R4 index, IMM factor, R1 s))
586 +
587 + LOWFUNC(NONE,READ,5,raw_mov_l_brrm_indexed,(W4 d, IMM base, R4 baser, R4 index, IMM factor))
588 + {
589 +        MOVLmr(base, baser, index, factor, d);
590 + }
591 + LENDFUNC(NONE,READ,5,raw_mov_l_brrm_indexed,(W4 d, IMM base, R4 baser, R4 index, IMM factor))
592 +
593 + LOWFUNC(NONE,READ,5,raw_mov_w_brrm_indexed,(W2 d, IMM base, R4 baser, R4 index, IMM factor))
594 + {
595 +        MOVWmr(base, baser, index, factor, d);
596 + }
597 + LENDFUNC(NONE,READ,5,raw_mov_w_brrm_indexed,(W2 d, IMM base, R4 baser, R4 index, IMM factor))
598 +
599 + LOWFUNC(NONE,READ,5,raw_mov_b_brrm_indexed,(W1 d, IMM base, R4 baser, R4 index, IMM factor))
600 + {
601 +        MOVBmr(base, baser, index, factor, d);
602 + }
603 + LENDFUNC(NONE,READ,5,raw_mov_b_brrm_indexed,(W1 d, IMM base, R4 baser, R4 index, IMM factor))
604 +
605 + LOWFUNC(NONE,READ,4,raw_mov_l_rm_indexed,(W4 d, IMM base, R4 index, IMM factor))
606 + {
607 +        MOVLmr(base, X86_NOREG, index, factor, d);
608 + }
609 + LENDFUNC(NONE,READ,4,raw_mov_l_rm_indexed,(W4 d, IMM base, R4 index, IMM factor))
610 +
611 + LOWFUNC(NONE,READ,5,raw_cmov_l_rm_indexed,(W4 d, IMM base, R4 index, IMM factor, IMM cond))
612 + {
613 +        CMOVLmr(cond, base, X86_NOREG, index, factor, d);
614 + }
615 + LENDFUNC(NONE,READ,5,raw_cmov_l_rm_indexed,(W4 d, IMM base, R4 index, IMM factor, IMM cond))
616 +
617 + LOWFUNC(NONE,READ,3,raw_cmov_l_rm,(W4 d, IMM mem, IMM cond))
618 + {
619 +        CMOVLmr(cond, mem, X86_NOREG, X86_NOREG, 1, d);
620 + }
621 + LENDFUNC(NONE,READ,3,raw_cmov_l_rm,(W4 d, IMM mem, IMM cond))
622 +
623 + LOWFUNC(NONE,READ,3,raw_mov_l_rR,(W4 d, R4 s, IMM offset))
624 + {
625 +        MOVLmr(offset, s, X86_NOREG, 1, d);
626 + }
627 + LENDFUNC(NONE,READ,3,raw_mov_l_rR,(W4 d, R4 s, IMM offset))
628 +
629 + LOWFUNC(NONE,READ,3,raw_mov_w_rR,(W2 d, R4 s, IMM offset))
630 + {
631 +        MOVWmr(offset, s, X86_NOREG, 1, d);
632 + }
633 + LENDFUNC(NONE,READ,3,raw_mov_w_rR,(W2 d, R4 s, IMM offset))
634 +
635 + LOWFUNC(NONE,READ,3,raw_mov_b_rR,(W1 d, R4 s, IMM offset))
636 + {
637 +        MOVBmr(offset, s, X86_NOREG, 1, d);
638 + }
639 + LENDFUNC(NONE,READ,3,raw_mov_b_rR,(W1 d, R4 s, IMM offset))
640 +
641 + LOWFUNC(NONE,READ,3,raw_mov_l_brR,(W4 d, R4 s, IMM offset))
642 + {
643 +        MOVLmr(offset, s, X86_NOREG, 1, d);
644 + }
645 + LENDFUNC(NONE,READ,3,raw_mov_l_brR,(W4 d, R4 s, IMM offset))
646 +
647 + LOWFUNC(NONE,READ,3,raw_mov_w_brR,(W2 d, R4 s, IMM offset))
648 + {
649 +        MOVWmr(offset, s, X86_NOREG, 1, d);
650 + }
651 + LENDFUNC(NONE,READ,3,raw_mov_w_brR,(W2 d, R4 s, IMM offset))
652 +
653 + LOWFUNC(NONE,READ,3,raw_mov_b_brR,(W1 d, R4 s, IMM offset))
654 + {
655 +        MOVBmr(offset, s, X86_NOREG, 1, d);
656 + }
657 + LENDFUNC(NONE,READ,3,raw_mov_b_brR,(W1 d, R4 s, IMM offset))
658 +
659 + LOWFUNC(NONE,WRITE,3,raw_mov_l_Ri,(R4 d, IMM i, IMM offset))
660 + {
661 +        MOVLim(i, offset, d, X86_NOREG, 1);
662 + }
663 + LENDFUNC(NONE,WRITE,3,raw_mov_l_Ri,(R4 d, IMM i, IMM offset))
664 +
665 + LOWFUNC(NONE,WRITE,3,raw_mov_w_Ri,(R4 d, IMM i, IMM offset))
666 + {
667 +        MOVWim(i, offset, d, X86_NOREG, 1);
668 + }
669 + LENDFUNC(NONE,WRITE,3,raw_mov_w_Ri,(R4 d, IMM i, IMM offset))
670 +
671 + LOWFUNC(NONE,WRITE,3,raw_mov_b_Ri,(R4 d, IMM i, IMM offset))
672 + {
673 +        MOVBim(i, offset, d, X86_NOREG, 1);
674 + }
675 + LENDFUNC(NONE,WRITE,3,raw_mov_b_Ri,(R4 d, IMM i, IMM offset))
676 +
677 + LOWFUNC(NONE,WRITE,3,raw_mov_l_Rr,(R4 d, R4 s, IMM offset))
678 + {
679 +        MOVLrm(s, offset, d, X86_NOREG, 1);
680 + }
681 + LENDFUNC(NONE,WRITE,3,raw_mov_l_Rr,(R4 d, R4 s, IMM offset))
682 +
683 + LOWFUNC(NONE,WRITE,3,raw_mov_w_Rr,(R4 d, R2 s, IMM offset))
684 + {
685 +        MOVWrm(s, offset, d, X86_NOREG, 1);
686 + }
687 + LENDFUNC(NONE,WRITE,3,raw_mov_w_Rr,(R4 d, R2 s, IMM offset))
688 +
689 + LOWFUNC(NONE,WRITE,3,raw_mov_b_Rr,(R4 d, R1 s, IMM offset))
690 + {
691 +        MOVBrm(s, offset, d, X86_NOREG, 1);
692 + }
693 + LENDFUNC(NONE,WRITE,3,raw_mov_b_Rr,(R4 d, R1 s, IMM offset))
694 +
695 + LOWFUNC(NONE,NONE,3,raw_lea_l_brr,(W4 d, R4 s, IMM offset))
696 + {
697 +        LEALmr(offset, s, X86_NOREG, 1, d);
698 + }
699 + LENDFUNC(NONE,NONE,3,raw_lea_l_brr,(W4 d, R4 s, IMM offset))
700 +
701 + LOWFUNC(NONE,NONE,5,raw_lea_l_brr_indexed,(W4 d, R4 s, R4 index, IMM factor, IMM offset))
702 + {
703 +        LEALmr(offset, s, index, factor, d);
704 + }
705 + LENDFUNC(NONE,NONE,5,raw_lea_l_brr_indexed,(W4 d, R4 s, R4 index, IMM factor, IMM offset))
706 +
707 + LOWFUNC(NONE,NONE,4,raw_lea_l_rr_indexed,(W4 d, R4 s, R4 index, IMM factor))
708 + {
709 +        LEALmr(0, s, index, factor, d);
710 + }
711 + LENDFUNC(NONE,NONE,4,raw_lea_l_rr_indexed,(W4 d, R4 s, R4 index, IMM factor))
712 +
713 + LOWFUNC(NONE,WRITE,3,raw_mov_l_bRr,(R4 d, R4 s, IMM offset))
714 + {
715 +        MOVLrm(s, offset, d, X86_NOREG, 1);
716 + }
717 + LENDFUNC(NONE,WRITE,3,raw_mov_l_bRr,(R4 d, R4 s, IMM offset))
718 +
719 + LOWFUNC(NONE,WRITE,3,raw_mov_w_bRr,(R4 d, R2 s, IMM offset))
720 + {
721 +        MOVWrm(s, offset, d, X86_NOREG, 1);
722 + }
723 + LENDFUNC(NONE,WRITE,3,raw_mov_w_bRr,(R4 d, R2 s, IMM offset))
724 +
725 + LOWFUNC(NONE,WRITE,3,raw_mov_b_bRr,(R4 d, R1 s, IMM offset))
726 + {
727 +        MOVBrm(s, offset, d, X86_NOREG, 1);
728 + }
729 + LENDFUNC(NONE,WRITE,3,raw_mov_b_bRr,(R4 d, R1 s, IMM offset))
730 +
731 + LOWFUNC(NONE,NONE,1,raw_bswap_32,(RW4 r))
732 + {
733 +        BSWAPLr(r);
734 + }
735 + LENDFUNC(NONE,NONE,1,raw_bswap_32,(RW4 r))
736 +
737 + LOWFUNC(WRITE,NONE,1,raw_bswap_16,(RW2 r))
738 + {
739 +        ROLWir(8, r);
740 + }
741 + LENDFUNC(WRITE,NONE,1,raw_bswap_16,(RW2 r))
742 +
743 + LOWFUNC(NONE,NONE,2,raw_mov_l_rr,(W4 d, R4 s))
744 + {
745 +        MOVLrr(s, d);
746 + }
747 + LENDFUNC(NONE,NONE,2,raw_mov_l_rr,(W4 d, R4 s))
748 +
749 + LOWFUNC(NONE,WRITE,2,raw_mov_l_mr,(IMM d, R4 s))
750 + {
751 +        MOVLrm(s, d, X86_NOREG, X86_NOREG, 1);
752 + }
753 + LENDFUNC(NONE,WRITE,2,raw_mov_l_mr,(IMM d, R4 s))
754 +
755 + LOWFUNC(NONE,WRITE,2,raw_mov_w_mr,(IMM d, R2 s))
756 + {
757 +        MOVWrm(s, d, X86_NOREG, X86_NOREG, 1);
758 + }
759 + LENDFUNC(NONE,WRITE,2,raw_mov_w_mr,(IMM d, R2 s))
760 +
761 + LOWFUNC(NONE,READ,2,raw_mov_w_rm,(W2 d, IMM s))
762 + {
763 +        MOVWmr(s, X86_NOREG, X86_NOREG, 1, d);
764 + }
765 + LENDFUNC(NONE,READ,2,raw_mov_w_rm,(W2 d, IMM s))
766 +
767 + LOWFUNC(NONE,WRITE,2,raw_mov_b_mr,(IMM d, R1 s))
768 + {
769 +        MOVBrm(s, d, X86_NOREG, X86_NOREG, 1);
770 + }
771 + LENDFUNC(NONE,WRITE,2,raw_mov_b_mr,(IMM d, R1 s))
772 +
773 + LOWFUNC(NONE,READ,2,raw_mov_b_rm,(W1 d, IMM s))
774 + {
775 +        MOVBmr(s, X86_NOREG, X86_NOREG, 1, d);
776 + }
777 + LENDFUNC(NONE,READ,2,raw_mov_b_rm,(W1 d, IMM s))
778 +
779 + LOWFUNC(NONE,NONE,2,raw_mov_l_ri,(W4 d, IMM s))
780 + {
781 +        MOVLir(s, d);
782 + }
783 + LENDFUNC(NONE,NONE,2,raw_mov_l_ri,(W4 d, IMM s))
784 +
785 + LOWFUNC(NONE,NONE,2,raw_mov_w_ri,(W2 d, IMM s))
786 + {
787 +        MOVWir(s, d);
788 + }
789 + LENDFUNC(NONE,NONE,2,raw_mov_w_ri,(W2 d, IMM s))
790 +
791 + LOWFUNC(NONE,NONE,2,raw_mov_b_ri,(W1 d, IMM s))
792 + {
793 +        MOVBir(s, d);
794 + }
795 + LENDFUNC(NONE,NONE,2,raw_mov_b_ri,(W1 d, IMM s))
796 +
797 + LOWFUNC(RMW,RMW,2,raw_adc_l_mi,(MEMRW d, IMM s))
798 + {
799 +        ADCLim(s, d, X86_NOREG, X86_NOREG, 1);
800 + }
801 + LENDFUNC(RMW,RMW,2,raw_adc_l_mi,(MEMRW d, IMM s))
802 +
803 + LOWFUNC(WRITE,RMW,2,raw_add_l_mi,(IMM d, IMM s))
804 + {
805 +        ADDLim(s, d, X86_NOREG, X86_NOREG, 1);
806 + }
807 + LENDFUNC(WRITE,RMW,2,raw_add_l_mi,(IMM d, IMM s))
808 +
809 + LOWFUNC(WRITE,RMW,2,raw_add_w_mi,(IMM d, IMM s))
810 + {
811 +        ADDWim(s, d, X86_NOREG, X86_NOREG, 1);
812 + }
813 + LENDFUNC(WRITE,RMW,2,raw_add_w_mi,(IMM d, IMM s))
814 +
815 + LOWFUNC(WRITE,RMW,2,raw_add_b_mi,(IMM d, IMM s))
816 + {
817 +        ADDBim(s, d, X86_NOREG, X86_NOREG, 1);
818 + }
819 + LENDFUNC(WRITE,RMW,2,raw_add_b_mi,(IMM d, IMM s))
820 +
821 + LOWFUNC(WRITE,NONE,2,raw_test_l_ri,(R4 d, IMM i))
822 + {
823 +        TESTLir(i, d);
824 + }
825 + LENDFUNC(WRITE,NONE,2,raw_test_l_ri,(R4 d, IMM i))
826 +
827 + LOWFUNC(WRITE,NONE,2,raw_test_l_rr,(R4 d, R4 s))
828 + {
829 +        TESTLrr(s, d);
830 + }
831 + LENDFUNC(WRITE,NONE,2,raw_test_l_rr,(R4 d, R4 s))
832 +
833 + LOWFUNC(WRITE,NONE,2,raw_test_w_rr,(R2 d, R2 s))
834 + {
835 +        TESTWrr(s, d);
836 + }
837 + LENDFUNC(WRITE,NONE,2,raw_test_w_rr,(R2 d, R2 s))
838 +
839 + LOWFUNC(WRITE,NONE,2,raw_test_b_rr,(R1 d, R1 s))
840 + {
841 +        TESTBrr(s, d);
842 + }
843 + LENDFUNC(WRITE,NONE,2,raw_test_b_rr,(R1 d, R1 s))
844 +
845 + LOWFUNC(WRITE,NONE,2,raw_and_l_ri,(RW4 d, IMM i))
846 + {
847 +        ANDLir(i, d);
848 + }
849 + LENDFUNC(WRITE,NONE,2,raw_and_l_ri,(RW4 d, IMM i))
850 +
851 + LOWFUNC(WRITE,NONE,2,raw_and_w_ri,(RW2 d, IMM i))
852 + {
853 +        ANDWir(i, d);
854 + }
855 + LENDFUNC(WRITE,NONE,2,raw_and_w_ri,(RW2 d, IMM i))
856 +
857 + LOWFUNC(WRITE,NONE,2,raw_and_l,(RW4 d, R4 s))
858 + {
859 +        ANDLrr(s, d);
860 + }
861 + LENDFUNC(WRITE,NONE,2,raw_and_l,(RW4 d, R4 s))
862 +
863 + LOWFUNC(WRITE,NONE,2,raw_and_w,(RW2 d, R2 s))
864 + {
865 +        ANDWrr(s, d);
866 + }
867 + LENDFUNC(WRITE,NONE,2,raw_and_w,(RW2 d, R2 s))
868 +
869 + LOWFUNC(WRITE,NONE,2,raw_and_b,(RW1 d, R1 s))
870 + {
871 +        ANDBrr(s, d);
872 + }
873 + LENDFUNC(WRITE,NONE,2,raw_and_b,(RW1 d, R1 s))
874 +
875 + LOWFUNC(WRITE,NONE,2,raw_or_l_ri,(RW4 d, IMM i))
876 + {
877 +        ORLir(i, d);
878 + }
879 + LENDFUNC(WRITE,NONE,2,raw_or_l_ri,(RW4 d, IMM i))
880 +
881 + LOWFUNC(WRITE,NONE,2,raw_or_l,(RW4 d, R4 s))
882 + {
883 +        ORLrr(s, d);
884 + }
885 + LENDFUNC(WRITE,NONE,2,raw_or_l,(RW4 d, R4 s))
886 +
887 + LOWFUNC(WRITE,NONE,2,raw_or_w,(RW2 d, R2 s))
888 + {
889 +        ORWrr(s, d);
890 + }
891 + LENDFUNC(WRITE,NONE,2,raw_or_w,(RW2 d, R2 s))
892 +
893 + LOWFUNC(WRITE,NONE,2,raw_or_b,(RW1 d, R1 s))
894 + {
895 +        ORBrr(s, d);
896 + }
897 + LENDFUNC(WRITE,NONE,2,raw_or_b,(RW1 d, R1 s))
898 +
899 + LOWFUNC(RMW,NONE,2,raw_adc_l,(RW4 d, R4 s))
900 + {
901 +        ADCLrr(s, d);
902 + }
903 + LENDFUNC(RMW,NONE,2,raw_adc_l,(RW4 d, R4 s))
904 +
905 + LOWFUNC(RMW,NONE,2,raw_adc_w,(RW2 d, R2 s))
906 + {
907 +        ADCWrr(s, d);
908 + }
909 + LENDFUNC(RMW,NONE,2,raw_adc_w,(RW2 d, R2 s))
910 +
911 + LOWFUNC(RMW,NONE,2,raw_adc_b,(RW1 d, R1 s))
912 + {
913 +        ADCBrr(s, d);
914 + }
915 + LENDFUNC(RMW,NONE,2,raw_adc_b,(RW1 d, R1 s))
916 +
917 + LOWFUNC(WRITE,NONE,2,raw_add_l,(RW4 d, R4 s))
918 + {
919 +        ADDLrr(s, d);
920 + }
921 + LENDFUNC(WRITE,NONE,2,raw_add_l,(RW4 d, R4 s))
922 +
923 + LOWFUNC(WRITE,NONE,2,raw_add_w,(RW2 d, R2 s))
924 + {
925 +        ADDWrr(s, d);
926 + }
927 + LENDFUNC(WRITE,NONE,2,raw_add_w,(RW2 d, R2 s))
928 +
929 + LOWFUNC(WRITE,NONE,2,raw_add_b,(RW1 d, R1 s))
930 + {
931 +        ADDBrr(s, d);
932 + }
933 + LENDFUNC(WRITE,NONE,2,raw_add_b,(RW1 d, R1 s))
934 +
935 + LOWFUNC(WRITE,NONE,2,raw_sub_l_ri,(RW4 d, IMM i))
936 + {
937 +        SUBLir(i, d);
938 + }
939 + LENDFUNC(WRITE,NONE,2,raw_sub_l_ri,(RW4 d, IMM i))
940 +
941 + LOWFUNC(WRITE,NONE,2,raw_sub_b_ri,(RW1 d, IMM i))
942 + {
943 +        SUBBir(i, d);
944 + }
945 + LENDFUNC(WRITE,NONE,2,raw_sub_b_ri,(RW1 d, IMM i))
946 +
947 + LOWFUNC(WRITE,NONE,2,raw_add_l_ri,(RW4 d, IMM i))
948 + {
949 +        ADDLir(i, d);
950 + }
951 + LENDFUNC(WRITE,NONE,2,raw_add_l_ri,(RW4 d, IMM i))
952 +
953 + LOWFUNC(WRITE,NONE,2,raw_add_w_ri,(RW2 d, IMM i))
954 + {
955 +        ADDWir(i, d);
956 + }
957 + LENDFUNC(WRITE,NONE,2,raw_add_w_ri,(RW2 d, IMM i))
958 +
959 + LOWFUNC(WRITE,NONE,2,raw_add_b_ri,(RW1 d, IMM i))
960 + {
961 +        ADDBir(i, d);
962 + }
963 + LENDFUNC(WRITE,NONE,2,raw_add_b_ri,(RW1 d, IMM i))
964 +
965 + LOWFUNC(RMW,NONE,2,raw_sbb_l,(RW4 d, R4 s))
966 + {
967 +        SBBLrr(s, d);
968 + }
969 + LENDFUNC(RMW,NONE,2,raw_sbb_l,(RW4 d, R4 s))
970 +
971 + LOWFUNC(RMW,NONE,2,raw_sbb_w,(RW2 d, R2 s))
972 + {
973 +        SBBWrr(s, d);
974 + }
975 + LENDFUNC(RMW,NONE,2,raw_sbb_w,(RW2 d, R2 s))
976 +
977 + LOWFUNC(RMW,NONE,2,raw_sbb_b,(RW1 d, R1 s))
978 + {
979 +        SBBBrr(s, d);
980 + }
981 + LENDFUNC(RMW,NONE,2,raw_sbb_b,(RW1 d, R1 s))
982 +
983 + LOWFUNC(WRITE,NONE,2,raw_sub_l,(RW4 d, R4 s))
984 + {
985 +        SUBLrr(s, d);
986 + }
987 + LENDFUNC(WRITE,NONE,2,raw_sub_l,(RW4 d, R4 s))
988 +
989 + LOWFUNC(WRITE,NONE,2,raw_sub_w,(RW2 d, R2 s))
990 + {
991 +        SUBWrr(s, d);
992 + }
993 + LENDFUNC(WRITE,NONE,2,raw_sub_w,(RW2 d, R2 s))
994 +
995 + LOWFUNC(WRITE,NONE,2,raw_sub_b,(RW1 d, R1 s))
996 + {
997 +        SUBBrr(s, d);
998 + }
999 + LENDFUNC(WRITE,NONE,2,raw_sub_b,(RW1 d, R1 s))
1000 +
1001 + LOWFUNC(WRITE,NONE,2,raw_cmp_l,(R4 d, R4 s))
1002 + {
1003 +        CMPLrr(s, d);
1004 + }
1005 + LENDFUNC(WRITE,NONE,2,raw_cmp_l,(R4 d, R4 s))
1006 +
1007 + LOWFUNC(WRITE,NONE,2,raw_cmp_l_ri,(R4 r, IMM i))
1008 + {
1009 +        CMPLir(i, r);
1010 + }
1011 + LENDFUNC(WRITE,NONE,2,raw_cmp_l_ri,(R4 r, IMM i))
1012 +
1013 + LOWFUNC(WRITE,NONE,2,raw_cmp_w,(R2 d, R2 s))
1014 + {
1015 +        CMPWrr(s, d);
1016 + }
1017 + LENDFUNC(WRITE,NONE,2,raw_cmp_w,(R2 d, R2 s))
1018 +
1019 + LOWFUNC(WRITE,READ,2,raw_cmp_b_mi,(MEMR d, IMM s))
1020 + {
1021 +        CMPBim(s, d, X86_NOREG, X86_NOREG, 1);
1022 + }
1023 + LENDFUNC(WRITE,READ,2,raw_cmp_l_mi,(MEMR d, IMM s))
1024 +
1025 + LOWFUNC(WRITE,NONE,2,raw_cmp_b_ri,(R1 d, IMM i))
1026 + {
1027 +        CMPBir(i, d);
1028 + }
1029 + LENDFUNC(WRITE,NONE,2,raw_cmp_b_ri,(R1 d, IMM i))
1030 +
1031 + LOWFUNC(WRITE,NONE,2,raw_cmp_b,(R1 d, R1 s))
1032 + {
1033 +        CMPBrr(s, d);
1034 + }
1035 + LENDFUNC(WRITE,NONE,2,raw_cmp_b,(R1 d, R1 s))
1036 +
1037 + LOWFUNC(WRITE,READ,4,raw_cmp_l_rm_indexed,(R4 d, IMM offset, R4 index, IMM factor))
1038 + {
1039 +        CMPLmr(offset, X86_NOREG, index, factor, d);
1040 + }
1041 + LENDFUNC(WRITE,READ,4,raw_cmp_l_rm_indexed,(R4 d, IMM offset, R4 index, IMM factor))
1042 +
1043 + LOWFUNC(WRITE,NONE,2,raw_xor_l,(RW4 d, R4 s))
1044 + {
1045 +        XORLrr(s, d);
1046 + }
1047 + LENDFUNC(WRITE,NONE,2,raw_xor_l,(RW4 d, R4 s))
1048 +
1049 + LOWFUNC(WRITE,NONE,2,raw_xor_w,(RW2 d, R2 s))
1050 + {
1051 +        XORWrr(s, d);
1052 + }
1053 + LENDFUNC(WRITE,NONE,2,raw_xor_w,(RW2 d, R2 s))
1054 +
1055 + LOWFUNC(WRITE,NONE,2,raw_xor_b,(RW1 d, R1 s))
1056 + {
1057 +        XORBrr(s, d);
1058 + }
1059 + LENDFUNC(WRITE,NONE,2,raw_xor_b,(RW1 d, R1 s))
1060 +
1061 + LOWFUNC(WRITE,RMW,2,raw_sub_l_mi,(MEMRW d, IMM s))
1062 + {
1063 +        SUBLim(s, d, X86_NOREG, X86_NOREG, 1);
1064 + }
1065 + LENDFUNC(WRITE,RMW,2,raw_sub_l_mi,(MEMRW d, IMM s))
1066 +
1067 + LOWFUNC(WRITE,READ,2,raw_cmp_l_mi,(MEMR d, IMM s))
1068 + {
1069 +        CMPLim(s, d, X86_NOREG, X86_NOREG, 1);
1070 + }
1071 + LENDFUNC(WRITE,READ,2,raw_cmp_l_mi,(MEMR d, IMM s))
1072 +
1073 + LOWFUNC(NONE,NONE,2,raw_xchg_l_rr,(RW4 r1, RW4 r2))
1074 + {
1075 +        XCHGLrr(r2, r1);
1076 + }
1077 + LENDFUNC(NONE,NONE,2,raw_xchg_l_rr,(RW4 r1, RW4 r2))
1078 +
1079 + LOWFUNC(READ,WRITE,0,raw_pushfl,(void))
1080 + {
1081 +        PUSHFD();
1082 + }
1083 + LENDFUNC(READ,WRITE,0,raw_pushfl,(void))
1084 +
1085 + LOWFUNC(WRITE,READ,0,raw_popfl,(void))
1086 + {
1087 +        POPFD();
1088 + }
1089 + LENDFUNC(WRITE,READ,0,raw_popfl,(void))
1090 +
1091 + #else
1092 +
1093   const bool optimize_accum               = true;
1094   const bool optimize_imm8                = true;
1095   const bool optimize_shift_once  = true;
# Line 1867 | Line 2833 | LOWFUNC(NONE,NONE,2,raw_xchg_l_rr,(RW4 r
2833   LENDFUNC(NONE,NONE,2,raw_xchg_l_rr,(RW4 r1, RW4 r2))
2834  
2835   /*************************************************************************
1870 * FIXME: string-related instructions                                    *
1871 *************************************************************************/
1872
1873 LOWFUNC(WRITE,NONE,0,raw_cld,(void))
1874 {
1875        emit_byte(0xfc);
1876 }
1877 LENDFUNC(WRITE,NONE,0,raw_cld,(void))
1878
1879 LOWFUNC(WRITE,NONE,0,raw_std,(void))
1880 {
1881        emit_byte(0xfd);
1882 }
1883 LENDFUNC(WRITE,NONE,0,raw_std,(void))
1884
1885 LOWFUNC(NONE,RMW,0,raw_movs_b,(void))
1886 {
1887        emit_byte(0xa4);
1888 }
1889 LENDFUNC(NONE,RMW,0,raw_movs_b,(void))
1890
1891 LOWFUNC(NONE,RMW,0,raw_movs_l,(void))
1892 {
1893        emit_byte(0xa5);
1894 }
1895 LENDFUNC(NONE,RMW,0,raw_movs_l,(void))
1896
1897 LOWFUNC(NONE,RMW,0,raw_rep,(void))
1898 {
1899        emit_byte(0xf3);
1900 }
1901 LENDFUNC(NONE,RMW,0,raw_rep,(void))
1902
1903 LOWFUNC(NONE,RMW,0,raw_rep_movsb,(void))
1904 {
1905        raw_rep();
1906        raw_movs_b();
1907 }
1908 LENDFUNC(NONE,RMW,0,raw_rep_movsb,(void))
1909
1910 LOWFUNC(NONE,RMW,0,raw_rep_movsl,(void))
1911 {
1912        raw_rep();
1913        raw_movs_l();
1914 }
1915 LENDFUNC(NONE,RMW,0,raw_rep_movsl,(void))
1916
1917 /*************************************************************************
2836   * FIXME: mem access modes probably wrong                                *
2837   *************************************************************************/
2838  
# Line 1930 | Line 2848 | LOWFUNC(WRITE,READ,0,raw_popfl,(void))
2848   }
2849   LENDFUNC(WRITE,READ,0,raw_popfl,(void))
2850  
2851 + #endif
2852 +
2853   /*************************************************************************
2854   * Unoptimizable stuff --- jump                                          *
2855   *************************************************************************/

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